diff options
| author | Michael Snyder <msnyder@specifix.com> | 2003-07-23 21:23:32 +0000 |
|---|---|---|
| committer | Michael Snyder <msnyder@specifix.com> | 2003-07-23 21:23:32 +0000 |
| commit | 6f81a4f102e93b4dfeffadf7795a8702b4bddcb1 (patch) | |
| tree | d4336b25ee1a06469d4aa06cd579116be828edd2 /sim/sh | |
| parent | e4aae444cb90e1a42c6048b67a0f7565dd88ed50 (diff) | |
| download | gdb-6f81a4f102e93b4dfeffadf7795a8702b4bddcb1.tar.gz | |
2003-06-27 Michael Snyder <msnyder@redhat.com>
* gencode.c (op tab): Implement movca.l.
Diffstat (limited to 'sim/sh')
| -rw-r--r-- | sim/sh/ChangeLog | 1 | ||||
| -rw-r--r-- | sim/sh/gencode.c | 7 |
2 files changed, 5 insertions, 3 deletions
diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog index ad4bd8fcfa0..2b6624d8973 100644 --- a/sim/sh/ChangeLog +++ b/sim/sh/ChangeLog @@ -4,6 +4,7 @@ 2003-06-27 Michael Snyder <msnyder@redhat.com> + * gencode.c (op tab): Implement movca.l. * gencode.c (op movsxy_tab): Fix an error in the bit pattern. * gencode.c (gensim_caselist): The movy instructions use registers R6 and R7 (not R4 and R5 like the movx insns). diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c index e8e780fec9f..ea6d323eab0 100644 --- a/sim/sh/gencode.c +++ b/sim/sh/gencode.c @@ -750,9 +750,10 @@ op tab[] = "R0 = ((i + 4 + PH2T (PC)) & ~0x3);", }, - { "0", "", "movca.l @R0, <REG_N>", "0000nnnn11000011", - "/* FIXME: Not implemented */", - "RAISE_EXCEPTION (SIGILL);", + { "", "n0", "movca.l R0, @<REG_N>", "0000nnnn11000011", + "/* We don't simulate cache, so this insn is identical to mov. */", + "MA (1);", + "WLAT (R[n], R[0]);", }, { "n", "", "movt <REG_N>", "0000nnnn00101001", |