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| author | Ben Elliston <bje@au.ibm.com> | 2002-02-01 11:44:32 +0000 |
|---|---|---|
| committer | Ben Elliston <bje@au.ibm.com> | 2002-02-01 11:44:32 +0000 |
| commit | 3da25b5a2a8931f5143b423021e4e95f57c78c52 (patch) | |
| tree | 8cfe23621092082a7b1f18f9cd5bd7287fe47807 /sim/testsuite/sim/sh64/compact/ldsl-fpscr.cgs | |
| parent | a50dc7f4d7e5d1474295a119df0c4ec7c715f277 (diff) | |
| download | gdb-3da25b5a2a8931f5143b423021e4e95f57c78c52.tar.gz | |
* Contribute Hitachi SH5 simulator.
Diffstat (limited to 'sim/testsuite/sim/sh64/compact/ldsl-fpscr.cgs')
| -rw-r--r-- | sim/testsuite/sim/sh64/compact/ldsl-fpscr.cgs | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/sim/testsuite/sim/sh64/compact/ldsl-fpscr.cgs b/sim/testsuite/sim/sh64/compact/ldsl-fpscr.cgs new file mode 100644 index 00000000000..642f15dc527 --- /dev/null +++ b/sim/testsuite/sim/sh64/compact/ldsl-fpscr.cgs @@ -0,0 +1,43 @@ +# sh testcase for lds.l @${rn}+, fpscr -*- Asm -*- +# mach: all +# as: -isa=shcompact +# ld: -m shelf32 + + .include "compact/testutils.inc" + + start + + mov #40, r0 + shll8 r0 + # save address for later examination. + mov r0, r1 + + # Build up a distinctive bit pattern. + mov #1, r2 + shll8 r2 + add #12, r2 + shll8 r2 + add #85, r2 + shll8 r2 + add #170, r2 + # Store it in memory. + mov.l r2, @r0 + + lds.l @r0+, fpscr + +check: + # Read it back. + sts fpscr, r3 + cmp/eq r2, r3 + bf wrong + +inc: + # Test for proper post-increment. + add #4, r1 + cmp/eq r0, r1 + bf wrong + +okay: + pass +wrong: + fail |