import gdb-19990422 snapshot

5 files changed, 32 insertions, 25 deletions

diff --git a/sim/testsuite/sim/fr30/and.cgs b/sim/testsuite/sim/fr30/and.cgs
index 49db6fd2ee1..3148a311915 100644
--- a/sim/testsuite/sim/fr30/and.cgs
+++ b/sim/testsuite/sim/fr30/and.cgs
@@ -42,10 +42,16 @@ and:
 	test_cc		1 0 0 0
 	test_h_mem 	0xaaaa0000,sp
 
-	mvi_h_mem  	0xffff,sp
-	set_cc          0x0d		; Set mask opposite of expected
+	mvr_h_gr	sp,r9
+	inci_h_gr	4,r9
+	mvi_h_mem  	0xffffffff,sp
+	mvi_h_mem  	0xffff0000,r9
+	inci_h_gr	1,sp		; test unaligned access
+	set_cc          0x05		; Set mask opposite of expected
 	and		r7,@sp
-	test_cc		0 0 0 1
-	test_h_mem 	0xaaaa,sp
+	test_cc		1 0 0 1
+	inci_h_gr	-1,sp
+	test_h_mem 	0xaaaaaaaa,sp
+	test_h_mem 	0xffff0000,r9
 
 	pass
diff --git a/sim/testsuite/sim/fr30/ldub.cgs b/sim/testsuite/sim/fr30/ldub.cgs
index 97e00d9e00a..8d42cfa8595 100644
--- a/sim/testsuite/sim/fr30/ldub.cgs
+++ b/sim/testsuite/sim/fr30/ldub.cgs
@@ -84,31 +84,31 @@ ldub:
 	add_h_gr	r8,r14
 
 	set_cc          0x0f		; condition codes should not change
-	lduh		@(r14,0x7f),r7
+	ldub		@(r14,0x7f),r7
 	test_cc		1 1 1 1
 	test_h_gr  	0xde,r7
 
-	inci_h_gr	0x3e,r14
+	inci_h_gr	0x3f,r14
 	set_cc          0x07		; condition codes should not change
-	lduh    	@(r14,0x40),r7
+	ldub    	@(r14,0x40),r7
 	test_cc		0 1 1 1
 	test_h_gr  	0xde,r7
 
 	inci_h_gr	0x40,r14
 	set_cc          0x0b		; condition codes should not change
-	lduh		@(r14,0x0),r7
+	ldub		@(r14,0x0),r7
 	test_cc		1 0 1 1
 	test_h_gr  	0xde,r7
 
 	inci_h_gr	0x40,r14
 	set_cc          0x0d		; condition codes should not change
-	lduh      	@(r14,-0x40),r7
+	ldub      	@(r14,-0x40),r7
 	test_cc		1 1 0 1
 	test_h_gr  	0xde,r7
 
 	inci_h_gr	0x40,r14
 	set_cc          0x0e		; condition codes should not change
-	lduh		@(r14,-0x80),r7
+	ldub		@(r14,-0x80),r7
 	test_cc		1 1 1 0
 	test_h_gr  	0xde,r7
 
diff --git a/sim/testsuite/sim/fr30/stb.cgs b/sim/testsuite/sim/fr30/stb.cgs
index d9d4fd00aed..edbf4f22c7e 100644
--- a/sim/testsuite/sim/fr30/stb.cgs
+++ b/sim/testsuite/sim/fr30/stb.cgs
@@ -55,13 +55,13 @@ stb:
 	mvi_h_gr	0xaaaaaafe,r8
 	mvi_h_mem	0xdeadbeef,sp
 	mvr_h_gr	sp,r14
-	inci_h_gr	-127,r14
+	inci_h_gr	-128,r14	; must be aligned
+	mvi_h_mem	0xdeadbeef,r14
 	mvr_h_gr	r14,r2
+	inci_h_gr	-128,r14	; must be aligned
 	mvi_h_mem	0xdeadbeef,r14
-	inci_h_gr	-128,r14
 	mvr_h_gr	r14,r3
-	mvi_h_mem	0xdeadbeef,r14
-	inci_h_gr	128,r14
+	inci_h_gr	129,r14
 
 	set_cc          0x0b		; Condition codes should not change
 	stb      	r8,@(r14,127)
@@ -72,13 +72,13 @@ stb:
 	set_cc          0x0a		; Condition codes should not change
 	stb      	r8,@(r14,0)
 	test_cc		1 0 1 0
-	test_h_mem	0xfeadbeef,r2
+	test_h_mem	0xdefebeef,r2
 	test_h_gr	0xaaaaaafe,r8
 
 	set_cc          0x09		; Condition codes should not change
 	stb      	r8,@(r14,-128)
 	test_cc		1 0 0 1
-	test_h_mem	0xfeadbeef,r3
+	test_h_mem	0xdefebeef,r3
 	test_h_gr	0xaaaaaafe,r8
 
 	pass
diff --git a/sim/testsuite/sim/fr30/sth.cgs b/sim/testsuite/sim/fr30/sth.cgs
index 64c83e6072f..8c4a1156b92 100644
--- a/sim/testsuite/sim/fr30/sth.cgs
+++ b/sim/testsuite/sim/fr30/sth.cgs
@@ -52,33 +52,33 @@ sth:
 
 	; Test sth $Ri,@(R14,$disp9)
 	mvr_h_gr	r9,sp		; Restore stack pointer
-	mvi_h_gr	0xaaaabeef,r8
+	mvi_h_gr	0xaaaaabcd,r8
 	mvi_h_mem	0xdeadbeef,sp
 	mvr_h_gr	sp,r14
-	inci_h_gr	-254,r14
+	inci_h_gr	-256,r14	; must be aligned
 	mvr_h_gr	r14,r2
 	mvi_h_mem	0xdeadbeef,r14
 	inci_h_gr	-256,r14
 	mvr_h_gr	r14,r3
 	mvi_h_mem	0xdeadbeef,r14
-	inci_h_gr	256,r14
+	inci_h_gr	258,r14
 
 	set_cc          0x0b		; Condition codes should not change
 	sth      	r8,@(r14,254)
 	test_cc		1 0 1 1
-	test_h_mem	0xbeefbeef,r1
-	test_h_gr	0xaaaabeef,r8
+	test_h_mem	0xabcdbeef,r1
+	test_h_gr	0xaaaaabcd,r8
 
 	set_cc          0x0a		; Condition codes should not change
 	sth      	r8,@(r14,0)
 	test_cc		1 0 1 0
-	test_h_mem	0xbeefbeef,r2
-	test_h_gr	0xaaaabeef,r8
+	test_h_mem	0xdeadabcd,r2
+	test_h_gr	0xaaaaabcd,r8
 
 	set_cc          0x09		; Condition codes should not change
 	sth      	r8,@(r14,-256)
 	test_cc		1 0 0 1
-	test_h_mem	0xbeefbeef,r3
-	test_h_gr	0xaaaabeef,r8
+	test_h_mem	0xdeadabcd,r3
+	test_h_gr	0xaaaaabcd,r8
 
 	pass
diff --git a/sim/testsuite/sim/m32r/nop.cgs b/sim/testsuite/sim/m32r/nop.cgs
index 05b44bc552d..e06d656f20e 100644
--- a/sim/testsuite/sim/m32r/nop.cgs
+++ b/sim/testsuite/sim/m32r/nop.cgs
@@ -7,4 +7,5 @@
 
 	.global nop
 nop:
+	nop
 	pass