Initial revision

23 files changed, 459 insertions, 0 deletions

diff --git a/sim/testsuite/d10v-elf/t-ae-ld-d.s b/sim/testsuite/d10v-elf/t-ae-ld-d.s
new file mode 100644
index 00000000000..1be783fe984
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-ld-d.s
@@ -0,0 +1,13 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld
+	
+	ld r8,@0x4000
+test_ld:
+	ld r8,@0x4001
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld-i.s b/sim/testsuite/d10v-elf/t-ae-ld-i.s
new file mode 100644
index 00000000000..42168e1d812
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-ld-i.s
@@ -0,0 +1,16 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld
+	
+	ldi r10, #0x4000
+	ld r8, @r10
+
+	ldi r10, #0x4001
+test_ld:
+	ld r8,@r10
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld-id.s b/sim/testsuite/d10v-elf/t-ae-ld-id.s
new file mode 100644
index 00000000000..86b73823556
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-ld-id.s
@@ -0,0 +1,15 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld
+	
+	ldi r10, #0x4001
+	ld r8, @(1,r10)
+
+test_ld:
+	ld r8,@(2,r10)
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld-im.s b/sim/testsuite/d10v-elf/t-ae-ld-im.s
new file mode 100644
index 00000000000..08e2ba6d38e
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-ld-im.s
@@ -0,0 +1,16 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld
+	
+	ldi r10, #0x4000
+	ld r8, @r10-
+
+	ldi r10, #0x4001
+test_ld:
+	ld r8,@r10-
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld-ip.s b/sim/testsuite/d10v-elf/t-ae-ld-ip.s
new file mode 100644
index 00000000000..cad66600804
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-ld-ip.s
@@ -0,0 +1,16 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld
+	
+	ldi r10, #0x4000
+	ld r8, @r10+
+
+	ldi r10, #0x4001
+test_ld:
+	ld r8,@r10+
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld2w-d.s b/sim/testsuite/d10v-elf/t-ae-ld2w-d.s
new file mode 100644
index 00000000000..c8254ab191f
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-ld2w-d.s
@@ -0,0 +1,13 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld2w
+	
+	ld2w r8,@0x4000
+test_ld2w:
+	ld2w r8,@0x4001
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld2w-i.s b/sim/testsuite/d10v-elf/t-ae-ld2w-i.s
new file mode 100644
index 00000000000..4b32df5cc32
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-ld2w-i.s
@@ -0,0 +1,16 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld2w
+	
+	ldi r10, #0x4000
+	ld2w r8, @r10
+
+	ldi r10, #0x4001
+test_ld2w:
+	ld2w r8,@r10
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld2w-id.s b/sim/testsuite/d10v-elf/t-ae-ld2w-id.s
new file mode 100644
index 00000000000..906b2a0836e
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-ld2w-id.s
@@ -0,0 +1,14 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld2w
+	
+	ldi r10, #0x4001
+	ld2w r8,@(1,r10)
+test_ld2w:
+	ld2w r8,@(2,r10)
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld2w-im.s b/sim/testsuite/d10v-elf/t-ae-ld2w-im.s
new file mode 100644
index 00000000000..71a7286dfcd
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-ld2w-im.s
@@ -0,0 +1,16 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld2w
+	
+	ldi r10, #0x4000
+	ld2w r8, @r10-
+
+	ldi r10, #0x4001
+test_ld2w:
+	ld2w r8,@r10-
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld2w-ip.s b/sim/testsuite/d10v-elf/t-ae-ld2w-ip.s
new file mode 100644
index 00000000000..38cfab622b1
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-ld2w-ip.s
@@ -0,0 +1,16 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld2w
+	
+	ldi r10, #0x4000
+	ld2w r8, @r10+
+
+	ldi r10, #0x4001
+test_ld2w:
+	ld2w r8,@r10+
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st-d.s b/sim/testsuite/d10v-elf/t-ae-st-d.s
new file mode 100644
index 00000000000..1f0edd87f25
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-st-d.s
@@ -0,0 +1,13 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st
+	
+	st r8,@0x4000
+test_st:
+	st r8,@0x4001
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st-i.s b/sim/testsuite/d10v-elf/t-ae-st-i.s
new file mode 100644
index 00000000000..15245981ecf
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-st-i.s
@@ -0,0 +1,16 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st
+	
+	ldi r10,#0x4000
+	st r8, @r10
+
+	ldi r10,#0x4001
+test_st:
+	st r8,@r10
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st-id.s b/sim/testsuite/d10v-elf/t-ae-st-id.s
new file mode 100644
index 00000000000..4caa1b4fafc
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-st-id.s
@@ -0,0 +1,14 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st
+	
+	ldi r10,#0x4001
+	st r8, @(1,r10)
+test_st:
+	st r8,@(2,r10)
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st-im.s b/sim/testsuite/d10v-elf/t-ae-st-im.s
new file mode 100644
index 00000000000..d4c8bafe096
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-st-im.s
@@ -0,0 +1,16 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st
+	
+	ldi r10,#0x4000
+	st r8, @r10-
+
+	ldi r10,#0x4001
+test_st:
+	st r8,@r10-
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st-ip.s b/sim/testsuite/d10v-elf/t-ae-st-ip.s
new file mode 100644
index 00000000000..e3a02ee528d
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-st-ip.s
@@ -0,0 +1,16 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st
+	
+	ldi r10,#0x4000
+	st r8, @r10+
+
+	ldi r10,#0x4001
+test_st:
+	st r8,@r10+
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st-is.s b/sim/testsuite/d10v-elf/t-ae-st-is.s
new file mode 100644
index 00000000000..4868780128c
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-st-is.s
@@ -0,0 +1,16 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st
+	
+	ldi sp,#0x4000
+	st r8, @-SP
+
+	ldi sp,#0x4001
+test_st:
+	st r8,@-SP
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st2w-d.s b/sim/testsuite/d10v-elf/t-ae-st2w-d.s
new file mode 100644
index 00000000000..a0d9c3176e9
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-st2w-d.s
@@ -0,0 +1,13 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st2w
+	
+	st2w r8,@0x4000
+test_st2w:
+	st2w r8,@0x4001
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st2w-i.s b/sim/testsuite/d10v-elf/t-ae-st2w-i.s
new file mode 100644
index 00000000000..8c24bc92d75
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-st2w-i.s
@@ -0,0 +1,16 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st2w
+	
+	ldi r10, #0x4000
+	st2w r8, @r10
+
+	ldi r10, #0x4001
+test_st2w:
+	st2w r8,@r10
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st2w-id.s b/sim/testsuite/d10v-elf/t-ae-st2w-id.s
new file mode 100644
index 00000000000..bfbfd4dd69d
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-st2w-id.s
@@ -0,0 +1,14 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st2w
+	
+	ldi r10, #0x4001
+	st2w r8, @(1,r10)
+test_st2w:
+	st2w r8,@(2,r10)
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st2w-im.s b/sim/testsuite/d10v-elf/t-ae-st2w-im.s
new file mode 100644
index 00000000000..ee0a9ebe10a
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-st2w-im.s
@@ -0,0 +1,16 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st2w
+	
+	ldi r10, #0x4000
+	st2w r8, @r10-
+
+	ldi r10, #0x4001
+test_st2w:
+	st2w r8,@r10-
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st2w-ip.s b/sim/testsuite/d10v-elf/t-ae-st2w-ip.s
new file mode 100644
index 00000000000..dc911f723fb
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-st2w-ip.s
@@ -0,0 +1,16 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st2w
+	
+	ldi r10, #0x4000
+	st2w r8, @r10+
+
+	ldi r10, #0x4001
+test_st2w:
+	st2w r8,@r10+
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st2w-is.s b/sim/testsuite/d10v-elf/t-ae-st2w-is.s
new file mode 100644
index 00000000000..e39d71ce4c0
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ae-st2w-is.s
@@ -0,0 +1,16 @@
+.include "t-macros.i"
+
+	start
+
+	PSW_BITS = 0
+	point_dmap_at_imem
+	check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st2w
+	
+	ldi sp, #0x4004
+	st2w r8, @-SP
+
+	ldi sp, #0x4005
+test_st2w:
+	st2w r8,@-SP
+	nop
+	exit47
diff --git a/sim/testsuite/d10v-elf/t-mod-ld-pre.s b/sim/testsuite/d10v-elf/t-mod-ld-pre.s
new file mode 100644
index 00000000000..4536e0344e1
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-mod-ld-pre.s
@@ -0,0 +1,126 @@
+.include "t-macros.i"
+
+.section        .rodata
+ 
+        .text
+        .globl  main
+        .type   main,@function
+main:
+    mvfc        r0, PSW             ||  ldi.s       r14, #0
+    ldi.l       r2, 0x100               ; MOD_E
+    ldi.l       r3, 0x108               ; MOD_S
+ 
+test_mod_dec_ld:
+    mvtc        r2, MOD_E           ||  bseti       r0, #7
+    mvtc        r3, MOD_S
+    mvtc        r0, PSW                 ; modulo mode enable
+    mv          r1,r3                           ; r1=0x108
+    ld          r4, @r1-        ||      nop     ; r1=0x106
+    ld          r4, @r1-        ||      nop     ; r1=0x104
+    ld          r4, @r1-        ||      nop     ; r1=0x102
+    ld          r4, @r1-        ||      nop     ; r1=0x100
+    ld          r4, @r1-        ||      nop     ; r1=0x108 
+    ld          r4, @r1-        ||      nop     ; r1=0x106 
+ 
+    cmpeqi      r1,#0x106
+    brf0f       _ERR            ;  branch to error
+ 
+test_mod_inc_ld:
+    mvtc        r2, MOD_S
+    mvtc        r3, MOD_E
+    mv          r1,r2                           ; r1=0x100
+    ld          r4, @r1+        ||      nop     ; r1=0x102
+    ld          r4, @r1+        ||      nop     ; r1=0x104
+    ld          r4, @r1+        ||      nop     ; r1=0x106
+    ld          r4, @r1+        ||      nop     ; r1=0x108
+    ld          r4, @r1+        ||      nop     ; r1=0x100
+    ld          r4, @r1+        ||      nop     ; r1=0x102
+ 
+    cmpeqi      r1,#0x102
+    brf0f       _ERR
+ 
+test_mod_dec_ld2w:
+    mvtc        r2, MOD_E
+    mvtc        r3, MOD_S
+    mv          r1,r3                           ; r1=0x108
+    ld2W        r4, @r1-        ||      nop     ; r1=0x104
+    ld2W        r4, @r1-        ||      nop     ; r1=0x100
+    ld2W        r4, @r1-        ||      nop     ; r1=0x108 
+    ld2W        r4, @r1-        ||      nop     ; r1=0x104 
+ 
+    cmpeqi      r1,#0x104
+    brf0f       _ERR            ; <= branch to error
+ 
+test_mod_inc_ld2w:
+    mvtc        r2, MOD_S
+    mvtc        r3, MOD_E           ||  BCLRI       r0, #7
+    mv          r1,r2                           ; r1=0x100
+    ld2W        r4, @r1+        ||      nop     ; r1=0x104
+    ld2W        r4, @r1+        ||      nop     ; r1=0x108
+    ld2W        r4, @r1+        ||      nop     ; r1=0x100
+    ld2W        r4, @r1+        ||      nop     ; r1=0x104
+ 
+    cmpeqi      r1,#0x104
+    brf0f       _ERR
+ 
+test_mod_dec_ld_dis:
+    mvtc        r0, PSW                 ; modulo mode disable
+    mvtc        r2, MOD_E
+    mvtc        r3, MOD_S
+    mv          r1,r3                           ; r1=0x108
+    ld          r4, @r1-        ||      nop     ; r1=0x106
+    ld          r4, @r1-        ||      nop     ; r1=0x104
+    ld          r4, @r1-        ||      nop     ; r1=0x102
+    ld          r4, @r1-        ||      nop     ; r1=0x100
+    ld          r4, @r1-        ||      nop     ; r1=0xFE
+    ld          r4, @r1-        ||      nop     ; r1=0xFC
+ 
+    cmpeqi      r1,#0xFC
+    brf0f       _ERR
+ 
+test_mod_inc_ld_dis:
+    mvtc        r2, MOD_S
+    mvtc        r3, MOD_E
+    mv          r1,r2                           ; r1=0x100
+    ld          r4, @r1+        ||      nop     ; r1=0x102
+    ld          r4, @r1+        ||      nop     ; r1=0x104
+    ld          r4, @r1+        ||      nop     ; r1=0x106
+    ld          r4, @r1+        ||      nop     ; r1=0x108
+    ld          r4, @r1+        ||      nop     ; r1=0x10A
+    ld          r4, @r1+        ||      nop     ; r1=0x10C
+ 
+    cmpeqi      r1,#0x10C
+    brf0f       _ERR
+ 
+test_mod_dec_ld2w_dis:
+    mvtc        r2, MOD_E
+    mvtc        r3, MOD_S
+    mv          r1,r3                           ; r1=0x108
+    ld2W        r4, @r1-        ||      nop     ; r1=0x104
+    ld2W        r4, @r1-        ||      nop     ; r1=0x100
+    ld2W        r4, @r1-        ||      nop     ; r1=0xFC
+    ld2W        r4, @r1-        ||      nop     ; r1=0xF8
+ 
+    cmpeqi      r1,#0xF8
+    brf0f       _ERR
+
+ test_mod_inc_ld2w_dis:
+    mvtc        r2, MOD_S
+    mvtc        r3, MOD_E
+    mv          r1,r2                           ; r1=0x100
+    ld2W        r4, @r1+        ||      nop     ; r1=0x104
+    ld2W        r4, @r1+        ||      nop     ; r1=0x108
+    ld2W        r4, @r1+        ||      nop     ; r1=0x10C
+    ld2W        r4, @r1+        ||      nop     ; r1=0x110
+ 
+    cmpeqi      r1,#0x110
+    brf0f       _ERR 
+
+_OK:
+	exit0
+ 
+_ERR:
+	exit47
+
+ 
+