* compile.c: Fix formatting.

	* inst.h: Likewise.

3 files changed, 51 insertions, 40 deletions

diff --git a/sim/h8300/ChangeLog b/sim/h8300/ChangeLog
index 657a69f4a9c..2a91af984a7 100644
--- a/sim/h8300/ChangeLog
+++ b/sim/h8300/ChangeLog
@@ -1,3 +1,8 @@
+2002-12-26  Kazu Hirata  <kazu@cs.umass.edu>
+
+	* compile.c: Fix formatting.
+	* inst.h: Likewise.
+
 2002-07-29  Andrey Volkov  <avolkov@transas.com>
 
  	* compile.c: Include "gdb/sim-h8300.h"
diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c
index 8e4b55d6a28..3d9e3c8f636 100644
--- a/sim/h8300/compile.c
+++ b/sim/h8300/compile.c
@@ -83,8 +83,9 @@ void sim_set_simcache_size PARAMS ((int));
 #define HIGH_BYTE(x) (((x) >> 8) & 0xff)
 #define P(X,Y) ((X << 8) | Y)
 
-#define BUILDSR()   cpu.ccr = (I << 7) | (UI << 6)| (H<<5) | (U<<4) | \
-                              (N << 3) | (Z << 2) | (V<<1) | C;
+#define BUILDSR()					\
+  cpu.ccr = ((I << 7) | (UI << 6) | (H << 5) | (U << 4)	\
+	     | (N << 3) | (Z << 2) | (V << 1) | C);
 
 #define BUILDEXR()	    \
   if (h8300smode) cpu.exr = (trace<<7) | intMask;
@@ -99,17 +100,19 @@ void sim_set_simcache_size PARAMS ((int));
   ui = ((cpu.ccr >> 6) & 1);\
   intMaskBit = (cpu.ccr >> 7) & 1;
 
-#define GETEXR()	    \
-  if (h8300smode) { \
-    trace = (cpu.exr >> 7) & 1;\
-    intMask = cpu.exr & 7; }
+#define GETEXR()				\
+  if (h8300smode)				\
+    {						\
+      trace = (cpu.exr >> 7) & 1;		\
+      intMask = cpu.exr & 7;			\
+    }
 
 #ifdef __CHAR_IS_SIGNED__
 #define SEXTCHAR(x) ((char) (x))
 #endif
 
 #ifndef SEXTCHAR
-#define SEXTCHAR(x) ((x & 0x80) ? (x | ~0xff): x & 0xff)
+#define SEXTCHAR(x) ((x & 0x80) ? (x | ~0xff) : x & 0xff)
 #endif
 
 #define UEXTCHAR(x) ((x) & 0xff)
@@ -1022,15 +1025,15 @@ sim_resume (sd, step, siggnal)
 
 
 #define ALUOP(STORE, NAME, HOW) \
-    case O (NAME,SB):  HOW; if (STORE)goto alu8;else goto just_flags_alu8;  \
-    case O (NAME, SW): HOW; if (STORE)goto alu16;else goto just_flags_alu16; \
-    case O (NAME,SL):  HOW; if (STORE)goto alu32;else goto just_flags_alu32;
+    case O (NAME, SB): HOW; if (STORE) goto alu8;  else goto just_flags_alu8;  \
+    case O (NAME, SW): HOW; if (STORE) goto alu16; else goto just_flags_alu16; \
+    case O (NAME, SL): HOW; if (STORE) goto alu32; else goto just_flags_alu32;
 
 
-#define LOGOP(NAME, HOW) \
-    case O (NAME,SB): HOW; goto log8;\
-    case O (NAME, SW): HOW; goto log16;\
-    case O (NAME,SL): HOW; goto log32;
+#define LOGOP(NAME, HOW)			\
+    case O (NAME, SB): HOW; goto log8;		\
+    case O (NAME, SW): HOW; goto log16;		\
+    case O (NAME, SL): HOW; goto log32;
 
 
 
@@ -1140,32 +1143,36 @@ sim_resume (sd, step, siggnal)
 
 	case O (O_EEPMOV, SB):
 	case O (O_EEPMOV, SW):
-	  if (h8300hmode||h8300smode)
+	  if (h8300hmode || h8300smode)
 	    {
-	      register unsigned char *_src,*_dst;
-	      unsigned int count = (code->opcode == O(O_EEPMOV, SW))?cpu.regs[R4_REGNUM]&0xffff:
-		cpu.regs[R4_REGNUM]&0xff;
-
-	      _src = cpu.regs[R5_REGNUM] < memory_size ? cpu.memory+cpu.regs[R5_REGNUM] :
-		cpu.eightbit + (cpu.regs[R5_REGNUM] & 0xff);
-	      if ((_src+count)>=(cpu.memory+memory_size))
+	      register unsigned char *_src, *_dst;
+	      unsigned int count = ((code->opcode == O (O_EEPMOV, SW))
+				    ? cpu.regs[R4_REGNUM] & 0xffff
+				    : cpu.regs[R4_REGNUM] & 0xff);
+
+	      _src = (cpu.regs[R5_REGNUM] < memory_size
+		      ? cpu.memory + cpu.regs[R5_REGNUM]
+		      : cpu.eightbit + (cpu.regs[R5_REGNUM] & 0xff));
+	      if ((_src + count) >= (cpu.memory + memory_size))
 		{
-		  if ((_src+count)>=(cpu.eightbit+0x100))
+		  if ((_src + count) >= (cpu.eightbit + 0x100))
 		    goto illegal;
 		}
-	      _dst = cpu.regs[R6_REGNUM] < memory_size ? cpu.memory+cpu.regs[R6_REGNUM] :
-	           				       	      cpu.eightbit + (cpu.regs[R6_REGNUM] & 0xff);
-	      if ((_dst+count)>=(cpu.memory+memory_size))
+	      _dst = (cpu.regs[R6_REGNUM] < memory_size
+		      ? cpu.memory + cpu.regs[R6_REGNUM]
+		      : cpu.eightbit + (cpu.regs[R6_REGNUM] & 0xff));
+	      if ((_dst + count) >= (cpu.memory + memory_size))
 		{
-		  if ((_dst+count)>=(cpu.eightbit+0x100))
+		  if ((_dst + count) >= (cpu.eightbit + 0x100))
 		    goto illegal;
 		}
-	      memcpy(_dst,_src,count);
+	      memcpy (_dst, _src, count);
 
-	      cpu.regs[R5_REGNUM]+=count;
-	      cpu.regs[R6_REGNUM]+=count;
-	      cpu.regs[R4_REGNUM]&=(code->opcode == O(O_EEPMOV, SW))?(~0xffff):(~0xff);
-	      cycles += 2*count;
+	      cpu.regs[R5_REGNUM] += count;
+	      cpu.regs[R6_REGNUM] += count;
+	      cpu.regs[R4_REGNUM] &= ((code->opcode == O (O_EEPMOV, SW))
+				      ? (~0xffff) : (~0xff));
+	      cycles += 2 * count;
 	      goto next;
 	    }
 	  goto illegal;
@@ -1548,7 +1555,7 @@ sim_resume (sd, step, siggnal)
 	      goto illegal;
 	    }
 	  res = fetch (&code->src);
-	  store (&code->src,res|0x80);
+	  store (&code->src, res | 0x80);
 	  goto just_flags_log8;
 
 	case O (O_DIVU, SB):
@@ -1673,7 +1680,7 @@ sim_resume (sd, step, siggnal)
 	  goto next;
 
 	default:
-        illegal:
+	illegal:
 	  cpu.state = SIM_STATE_STOPPED;
 	  cpu.exception = SIGILL;
 	  goto end;
@@ -1995,7 +2002,7 @@ sim_fetch_register (sd, rn, buf, length)
 
   init_pointers ();
 
-  if (!h8300smode && rn >=EXR_REGNUM)
+  if (!h8300smode && rn >= EXR_REGNUM)
     rn++;
   switch (rn)
     {
diff --git a/sim/h8300/inst.h b/sim/h8300/inst.h
index bcf8e4a6b33..7f6e4008859 100644
--- a/sim/h8300/inst.h
+++ b/sim/h8300/inst.h
@@ -14,14 +14,13 @@
    outside of main memory refers to the eightbit area (in theory, this
    can only happen when simulating H8/300H programs).  We make no attempt
    to catch overlapping addresses, wrapped addresses, etc etc.  */
-#define H8300_MSIZE (1<<16)
+#define H8300_MSIZE (1 << 16)
 
 /* avolkov: 
    Next 2 macros are ugly for any workstation, but while they're work.
-   Memory size MUST be configurable.
- */
-#define H8300H_MSIZE (1<<18) 
-#define H8300S_MSIZE (1<<24) 
+   Memory size MUST be configurable.  */
+#define H8300H_MSIZE (1 << 18) 
+#define H8300S_MSIZE (1 << 24) 
 
 #define CSIZE 1000