import gdb-1999-12-07 snapshot

5 files changed, 206 insertions, 102 deletions

diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog
index 1aa9ecc42c4..6b7290ea3d1 100644
--- a/sim/common/ChangeLog
+++ b/sim/common/ChangeLog
@@ -1,3 +1,33 @@
+1999-12-07  Dave Brolley  <brolley@cygnus.com>
+
+	* cgen-par.h (CGEN_FN_MEM_QI_WRITE): New enumerator.
+	(CGEN_FN_MEM_HI_WRITE): New enumerator.
+	(CGEN_FN_MEM_SI_WRITE): New enumerator.
+	(CGEN_FN_MEM_DI_WRITE): New enumerator.
+	(CGEN_FN_MEM_DF_WRITE): New enumerator.
+	(CGEN_FN_MEM_XI_WRITE): New enumerator.
+	(fn_mem_qi_write): New union members.
+	(fn_mem_hi_write): New union members.
+	(fn_mem_si_write): New union members.
+	(fn_mem_di_write): New union members.
+	(fn_mem_df_write): New union members.
+	(fn_mem_xi_write): New union members.
+	(sim_queue_fn_mem_qi_write): New function.
+	(sim_queue_fn_mem_hi_write): New function.
+	(sim_queue_fn_mem_si_write): New function.
+	(sim_queue_fn_mem_di_write): New function.
+	(sim_queue_fn_mem_df_write): New function.
+	(sim_queue_fn_mem_xi_write): New function.
+	* cgen-par.c (sim_queue_fn_mem_qi_write): New function.
+	(sim_queue_fn_mem_hi_write): New function.
+	(sim_queue_fn_mem_si_write): New function.
+	(sim_queue_fn_mem_di_write): New function.
+	(sim_queue_fn_mem_df_write): New function.
+	(sim_queue_fn_mem_xi_write): New function.
+	(cgen_write_queue_element_execute): Handle CGEN_FN_MEM_QI_WRITE,
+	CGEN_FN_MEM_HI_WRITE, CGEN_FN_MEM_SI_WRITE, CGEN_FN_MEM_DI_WRITE,
+	CGEN_FN_MEM_DF_WRITE, CGEN_FN_MEM_XI_WRITE.
+
 1999-12-01  Dave Brolley  <brolley@cygnus.com>
 
 	* cgen-accfp.c (subsf): Check status code.
diff --git a/sim/common/cgen-par.c b/sim/common/cgen-par.c
index 44cc50f005a..baf9f586464 100644
--- a/sim/common/cgen-par.c
+++ b/sim/common/cgen-par.c
@@ -233,6 +233,105 @@ void sim_queue_mem_xi_write (SIM_CPU *cpu, SI address, SI *value)
   element->kinds.mem_xi_write.value[3] = value[3];
 }
 
+void sim_queue_fn_mem_qi_write (
+  SIM_CPU *cpu,
+  void (*write_function)(SIM_CPU *cpu, IADDR, SI, QI),
+  SI address,
+  QI value
+)
+{
+  CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+  CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+  element->kind = CGEN_FN_MEM_QI_WRITE;
+  element->insn_address = CPU_PC_GET (cpu);
+  element->kinds.fn_mem_qi_write.function = write_function;
+  element->kinds.fn_mem_qi_write.address = address;
+  element->kinds.fn_mem_qi_write.value   = value;
+}
+
+void sim_queue_fn_mem_hi_write (
+  SIM_CPU *cpu,
+  void (*write_function)(SIM_CPU *cpu, IADDR, SI, HI),
+  SI address,
+  HI value
+)
+{
+  CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+  CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+  element->kind = CGEN_FN_MEM_HI_WRITE;
+  element->insn_address = CPU_PC_GET (cpu);
+  element->kinds.fn_mem_hi_write.function = write_function;
+  element->kinds.fn_mem_hi_write.address = address;
+  element->kinds.fn_mem_hi_write.value   = value;
+}
+
+void sim_queue_fn_mem_si_write (
+  SIM_CPU *cpu,
+  void (*write_function)(SIM_CPU *cpu, IADDR, SI, SI),
+  SI address,
+  SI value
+)
+{
+  CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+  CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+  element->kind = CGEN_FN_MEM_SI_WRITE;
+  element->insn_address = CPU_PC_GET (cpu);
+  element->kinds.fn_mem_si_write.function = write_function;
+  element->kinds.fn_mem_si_write.address = address;
+  element->kinds.fn_mem_si_write.value   = value;
+}
+
+void sim_queue_fn_mem_di_write (
+  SIM_CPU *cpu,
+  void (*write_function)(SIM_CPU *cpu, IADDR, SI, DI),
+  SI address,
+  DI value
+)
+{
+  CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+  CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+  element->kind = CGEN_FN_MEM_DI_WRITE;
+  element->insn_address = CPU_PC_GET (cpu);
+  element->kinds.fn_mem_di_write.function = write_function;
+  element->kinds.fn_mem_di_write.address = address;
+  element->kinds.fn_mem_di_write.value   = value;
+}
+
+void sim_queue_fn_mem_df_write (
+  SIM_CPU *cpu,
+  void (*write_function)(SIM_CPU *cpu, IADDR, SI, DF),
+  SI address,
+  DF value
+)
+{
+  CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+  CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+  element->kind = CGEN_FN_MEM_DF_WRITE;
+  element->insn_address = CPU_PC_GET (cpu);
+  element->kinds.fn_mem_df_write.function = write_function;
+  element->kinds.fn_mem_df_write.address = address;
+  element->kinds.fn_mem_df_write.value   = value;
+}
+
+void sim_queue_fn_mem_xi_write (
+  SIM_CPU *cpu,
+  void (*write_function)(SIM_CPU *cpu, IADDR, SI, SI *),
+  SI address,
+  SI *value
+)
+{
+  CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+  CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+  element->kind = CGEN_FN_MEM_XI_WRITE;
+  element->insn_address = CPU_PC_GET (cpu);
+  element->kinds.fn_mem_xi_write.function = write_function;
+  element->kinds.fn_mem_xi_write.address = address;
+  element->kinds.fn_mem_xi_write.value[0] = value[0];
+  element->kinds.fn_mem_xi_write.value[1] = value[1];
+  element->kinds.fn_mem_xi_write.value[2] = value[2];
+  element->kinds.fn_mem_xi_write.value[3] = value[3];
+}
+
 /* Execute a write stored on the write queue.  */
 void
 cgen_write_queue_element_execute (SIM_CPU *cpu, CGEN_WRITE_QUEUE_ELEMENT *item)
@@ -319,7 +418,44 @@ cgen_write_queue_element_execute (SIM_CPU *cpu, CGEN_WRITE_QUEUE_ELEMENT *item)
       SETMEMSI (cpu, pc, item->kinds.mem_xi_write.address + 12,
 		item->kinds.mem_xi_write.value[3]);
       break;
+    case CGEN_FN_MEM_QI_WRITE:
+      pc = item->insn_address;
+      item->kinds.fn_mem_qi_write.function (cpu, pc,
+					    item->kinds.fn_mem_qi_write.address,
+					    item->kinds.fn_mem_qi_write.value);
+      break;
+    case CGEN_FN_MEM_HI_WRITE:
+      pc = item->insn_address;
+      item->kinds.fn_mem_hi_write.function (cpu, pc,
+					    item->kinds.fn_mem_hi_write.address,
+					    item->kinds.fn_mem_hi_write.value);
+      break;
+    case CGEN_FN_MEM_SI_WRITE:
+      pc = item->insn_address;
+      item->kinds.fn_mem_si_write.function (cpu, pc,
+					    item->kinds.fn_mem_si_write.address,
+					    item->kinds.fn_mem_si_write.value);
+      break;
+    case CGEN_FN_MEM_DI_WRITE:
+      pc = item->insn_address;
+      item->kinds.fn_mem_di_write.function (cpu, pc,
+					    item->kinds.fn_mem_di_write.address,
+					    item->kinds.fn_mem_di_write.value);
+      break;
+    case CGEN_FN_MEM_DF_WRITE:
+      pc = item->insn_address;
+      item->kinds.fn_mem_df_write.function (cpu, pc,
+					    item->kinds.fn_mem_df_write.address,
+					    item->kinds.fn_mem_df_write.value);
+      break;
+    case CGEN_FN_MEM_XI_WRITE:
+      pc = item->insn_address;
+      item->kinds.fn_mem_xi_write.function (cpu, pc,
+					    item->kinds.fn_mem_xi_write.address,
+					    item->kinds.fn_mem_xi_write.value);
+      break;
     default:
+      abort ();
       break; /* FIXME: for now....print message later.  */
     }
 }
diff --git a/sim/common/cgen-par.h b/sim/common/cgen-par.h
index 3748d947ffd..4e0257a98fa 100644
--- a/sim/common/cgen-par.h
+++ b/sim/common/cgen-par.h
@@ -29,6 +29,8 @@ enum cgen_write_queue_kind {
   CGEN_FN_XI_WRITE, CGEN_FN_PC_WRITE,
   CGEN_MEM_QI_WRITE, CGEN_MEM_HI_WRITE, CGEN_MEM_SI_WRITE, CGEN_MEM_DI_WRITE,
   CGEN_MEM_DF_WRITE, CGEN_MEM_XI_WRITE,
+  CGEN_FN_MEM_QI_WRITE, CGEN_FN_MEM_HI_WRITE, CGEN_FN_MEM_SI_WRITE,
+  CGEN_FN_MEM_DI_WRITE, CGEN_FN_MEM_DF_WRITE, CGEN_FN_MEM_XI_WRITE,
   CGEN_NUM_WRITE_KINDS
 };
 
@@ -103,12 +105,42 @@ typedef struct {
     } mem_di_write;
     struct {
       SI   address;
-      DI   value;
+      DF   value;
     } mem_df_write;
     struct {
       SI   address;
       SI   value[4];
     } mem_xi_write;
+    struct {
+      SI   address;
+      QI   value;
+      void (*function)(SIM_CPU *, IADDR, SI, QI);
+    } fn_mem_qi_write;
+    struct {
+      SI   address;
+      HI   value;
+      void (*function)(SIM_CPU *, IADDR, SI, HI);
+    } fn_mem_hi_write;
+    struct {
+      SI   address;
+      SI   value;
+      void (*function)(SIM_CPU *, IADDR, SI, SI);
+    } fn_mem_si_write;
+    struct {
+      SI   address;
+      DI   value;
+      void (*function)(SIM_CPU *, IADDR, SI, DI);
+    } fn_mem_di_write;
+    struct {
+      SI   address;
+      DF   value;
+      void (*function)(SIM_CPU *, IADDR, SI, DF);
+    } fn_mem_df_write;
+    struct {
+      SI   address;
+      SI   value[4];
+      void (*function)(SIM_CPU *, IADDR, SI, SI *);
+    } fn_mem_xi_write;
   } kinds;
 } CGEN_WRITE_QUEUE_ELEMENT;
 
@@ -162,4 +194,11 @@ extern void sim_queue_mem_di_write (SIM_CPU *, SI, DI);
 extern void sim_queue_mem_df_write (SIM_CPU *, SI, DF);
 extern void sim_queue_mem_xi_write (SIM_CPU *, SI, SI *);
 
+extern void sim_queue_fn_mem_qi_write (SIM_CPU *, void (*)(SIM_CPU *, IADDR, SI, QI), SI, QI);
+extern void sim_queue_fn_mem_hi_write (SIM_CPU *, void (*)(SIM_CPU *, IADDR, SI, HI), SI, HI);
+extern void sim_queue_fn_mem_si_write (SIM_CPU *, void (*)(SIM_CPU *, IADDR, SI, SI), SI, SI);
+extern void sim_queue_fn_mem_di_write (SIM_CPU *, void (*)(SIM_CPU *, IADDR, SI, DI), SI, DI);
+extern void sim_queue_fn_mem_df_write (SIM_CPU *, void (*)(SIM_CPU *, IADDR, SI, DF), SI, DF);
+extern void sim_queue_fn_mem_xi_write (SIM_CPU *, void (*)(SIM_CPU *, IADDR, SI, SI *), SI, SI *);
+
 #endif /* CGEN_PAR_H */
diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog
index b740b761907..d4a49d8c8f9 100644
--- a/sim/m32r/ChangeLog
+++ b/sim/m32r/ChangeLog
@@ -93,21 +93,10 @@ Fri Apr 16 16:47:43 1999  Doug Evans  <devans@charmed.cygnus.com>
 
 	* cpu.c,cpu.h: Rebuild.
 
-start-sanitize-cygnus
-1999-02-12  Doug Evans  <devans@casey.cygnus.com>
-
-	* Makefile.in (stamp-arch,stamp-cpu,stamp-xcpu): CGEN_MAIN_SCM
-	renamed to CGEN_READ_SCM.
-
-end-sanitize-cygnus
 1999-02-09  Doug Evans  <devans@casey.cygnus.com>
 
 	* Makefile.in (SIM_EXTRA_DEPS): Add m32r-desc.h, delete cpu-opc.h.
 	(stamp-xmloop): s/-parallel/-parallel-write/.
-start-sanitize-cygnus
-	(stamp-arch,stamp-cpu): Update FLAGS variable, option syntax changed.
-	(stamp-xcpu): Update FLAGS variable, option syntax changed.
-end-sanitize-cygnus
 	* configure.in (sim_link_files,sim_link_links): Delete.
 	* configure: Rebuild.
 	* decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
@@ -135,9 +124,6 @@ Thu Feb  4 16:04:26 1999  Doug Evans  <devans@canuck.cygnus.com>
 
 1999-01-14  Doug Evans  <devans@casey.cygnus.com>
 
-start-sanitize-cygnus
-	* Makefile.in (stamp-arch): Pass FLAGS to cgen.
-end-sanitize-cygnus
 	* arch.c,arch.h,cpuall.h: Regenerate.
 	* cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
 	* traps.c (sim_engine_invalid_insn): PCADDR->IADDR.
@@ -164,9 +150,6 @@ end-sanitize-cygnus
 	(M32RBF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS.
 	(m32r.o,mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies.
 	(m32rx.o,mloopx.o,cpux.o,decodex.o,semx.o,modelx.o): Ditto.
-start-sanitize-cygnus
-	(stamp-arch): Pass mach=all to cgen-arch.
-end-sanitize-cygnus
 	* cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
 	* m32r-sim.h (m32rbf_h_cr_[gs]et_handler): Declare.
 	([GS]ET_H_CR): Define.
@@ -230,19 +213,10 @@ end-sanitize-cygnus
 
 	* Makefile.in (M32R_OBJS): Delete extract.o.
 	(extract.o): Delete.
-start-sanitize-cygnus
-	(stamp-arch): Depend on $(CGEN_ARCH_SCM).
-	(stamp-cpu): Don't build extract.c.
-end-sanitize-cygnus
 	* cpu.c,cpu.h,decode.c,decode.h,sem-switch.c,sem.c: Rebuild.
 	* mloop.in (extract16): Update type of `insn' arg.
 	Delete call to d->extract.
 	(extract32): Ditto.
-start-sanitize-cygnus
-	* Makefile.in (M32RX_OBJS): Delete extractx.o.
-	(extractx.o): Delete.
-	(stamp-xcpu): Don't build extractx.c.
-end-sanitize-cygnus
 	* cpux.c,cpux.h,decodex.c,decodex.h,semx-switch.c: Rebuild.
 	* mloopx.in (extractx16): Update type of `insn' arg.
 	Delete call to d->extract.  Delete arg pbb_p.  All callers updated.
@@ -282,14 +256,6 @@ Fri Oct 16 09:15:29 1998  Doug Evans  <devans@charmed.cygnus.com>
 
 	* sim-if.c (sim_do_command): Handle "sim info reg {bbpsw,bbpc}".
 
-start-sanitize-cygnus
-Wed Oct 14 14:49:50 1998  Doug Evans  <devans@canuck.cygnus.com>
-
-	* Makefile.in (mloop.o): Don't depend on stamp-cpu, depend on
-	explicit files.
-	(mloopx.o): Ditto for stamp-xcpu.
-
-end-sanitize-cygnus
 Fri Oct  9 16:11:58 1998  Doug Evans  <devans@seba.cygnus.com>
 
 	Add pseudo-basic-block execution support.
@@ -297,9 +263,6 @@ Fri Oct  9 16:11:58 1998  Doug Evans  <devans@seba.cygnus.com>
 	(SIM_EXTRA_DEPS): Add include/opcode/cgen.h.
 	(INCLUDE_DEPS): Delete cpu-sim.h, include/opcode/cgen.h.
 	(mloop.c): Build pseudo-basic-block version.  Depend on stamp-cpu.
-start-sanitize-cygnus
-	(stamp-decode): Delete, build decode files with other cpu files.
-end-sanitize-cygnus
 	* arch.c,arch.h,cpuall.h: Regenerate.
 	* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
 	* sem-switch.c,sem.c: Regenerate.
@@ -330,14 +293,8 @@ end-sanitize-cygnus
 	* configure: Regenerate.
 	* Makefile.in (M32RX_OBJS): Delete semx.o, add extract.o.
 	(mloopx.c): Build pseudo-basic-block version.
-start-sanitize-cygnus
-	Depend on stamp-xcpu.
-end-sanitize-cygnus
 	(semx.o): Delete.
 	(extractx.o): Add.
-start-sanitize-cygnus
-	(stamp-xdecode): Delete, build decode files with other cpu files.
-end-sanitize-cygnus
 	* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c: Regenerate.
 	* readx.c: Delete.
 	* semx.c: Delete.
@@ -390,9 +347,6 @@ Mon Aug  3 12:59:17 1998  Doug Evans  <devans@seba.cygnus.com>
 
 	Rename cpu m32r to m32rb to distinguish from architecture name.
 	* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
-start-sanitize-cygnus
-	(stamp-cpu): Ditto.
-end-sanitize-cygnus
 	* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
 	* tconfig.in (WANT_CPU_M32RB): Ditto.
 	* m32r.c (WANT_CPU_M32RB): Ditto.
@@ -457,14 +411,6 @@ Sat Jun 13 07:49:23 1998  Doug Evans  <devans@fallis.cygnus.com>
 	* mloopx.in: Call cycle init/update fns.
 	* modelx.c: Regenerate.
 
-start-sanitize-cygnus
-Thu Jun 11 23:39:53 1998  Doug Evans  <devans@seba.cygnus.com>
-
-	* Makefile.in (stamp-{arch,cpu,decode}): Pass CGEN_FLAGS_TO_PASS
-	to recursive makes.
-	(stamp-{xcpu,xdecode}): Ditto.
-
-end-sanitize-cygnus
 Wed Jun 10 17:39:29 1998  Doug Evans  <devans@canuck.cygnus.com>
 
 	* traps.c: New file.  Trap support moved here from sim-if.c.
@@ -545,9 +491,6 @@ Wed May  6 14:51:39 1998  Doug Evans  <devans@seba.cygnus.com>
 	* readx.c: Regenerate.  Redo computed goto label handling.
 	* semx.c: Regenerate.  Call PROFILE_COUNT_INSN.  Finish profiling
 	support.
-start-sanitize-cygnus
-	* Makefile.in (stamp-xcpu): Turn on profiling support.
-end-sanitize-cygnus
 
 	* m32r.c (m32r_fetch_register): Change result type and args to
 	conform to sim_fetch_register interface.
@@ -571,15 +514,6 @@ end-sanitize-cygnus
 	* sim-main.h (sim_cia): Change to USI.
 	(sim_cpu): Move m32r_misc_profile before machine generated part.
 
-start-sanitize-cygnus
-Fri May  1 18:25:41 1998  Doug Evans  <devans@seba.cygnus.com>
-
-	* Makefile.in: Replace @MAINT@ with $(CGEN_MAINT).
-	(CGEN_MAINT): New variable.
-	* configure.in: Add support for --enable-cgen-maint.
-	* configure: Regenerate.
-
-end-sanitize-cygnus
 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
 
         * configure: Regenerated to track ../common/aclocal.m4 changes.
@@ -830,9 +764,6 @@ Mon Jan 19 14:13:40 1998  Doug Evans  <devans@seba.cygnus.com>
 	* Makefile.in: Update.
 	* sem-ops.h: Deleted.
 	* mem-ops.h: Deleted.
-start-sanitize-cygnus
-	Add cgen support for generating files.
-end-sanitize-cygnus
 	(arch): Renamed from CPU.
 	* cpu.h: New file.
 	* decode.c: Redone.
diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in
index 256c3e3fddb..71296e52c20 100644
--- a/sim/m32r/Makefile.in
+++ b/sim/m32r/Makefile.in
@@ -116,37 +116,5 @@ modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
 m32r-clean:
 	rm -f mloop.c eng.h stamp-mloop
 	rm -f mloopx.c engx.h stamp-xmloop
-# start-sanitize-cygnus
-	rm -f stamp-arch stamp-cpu stamp-xcpu
-# end-sanitize-cygnus
 	rm -f tmp-*
 
-# start-sanitize-cygnus
-# cgen support, enable with --enable-cgen-maint
-CGEN_MAINT = ; @true
-# The following line is commented in or out depending upon --enable-cgen-maint.
-@CGEN_MAINT@CGEN_MAINT =
-
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srccgen)/m32r.cpu
-	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
-	  FLAGS="with-scache with-profile=fn"
-	touch stamp-arch
-arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
-	@true
-
-stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
-	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
-	  cpu=m32rbf mach=m32r SUFFIX= \
-	  FLAGS="with-scache with-profile=fn" \
-	  EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
-	touch stamp-cpu
-cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
-	@true
-
-stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
-	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
-	  cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
-	touch stamp-xcpu
-cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
-	@true
-# end-sanitize-cygnus