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authorMichael Snyder <msnyder@specifix.com>2003-07-23 21:14:54 +0000
committerMichael Snyder <msnyder@specifix.com>2003-07-23 21:14:54 +0000
commit99878f41a46997e8159a964f83ee647deecc835f (patch)
tree1e52209f0257007fe24a0eca3ff56d815e2e9010 /sim
parent7adfcb0ed8ab72a9f7fccd43d419547b186b7780 (diff)
downloadgdb-99878f41a46997e8159a964f83ee647deecc835f.tar.gz
2003-06-27 Michael Snyder <msnyder@redhat.com>
* gencode.c (gensim_caselist): The movy instructions use registers R6 and R7 (not R4 and R5 like the movx insns).
Diffstat (limited to 'sim')
-rw-r--r--sim/sh/ChangeLog5
-rw-r--r--sim/sh/gencode.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog
index d069a813a2b..0cd05f52f69 100644
--- a/sim/sh/ChangeLog
+++ b/sim/sh/ChangeLog
@@ -4,6 +4,11 @@
2003-06-27 Michael Snyder <msnyder@redhat.com>
+ * gencode.c (gensim_caselist): The movy instructions use
+ registers R6 and R7 (not R4 and R5 like the movx insns).
+
+2003-06-27 Michael Snyder <msnyder@redhat.com>
+
* gencode.c (op movsxy_tab): Fix up some copy/paste errors
in name: s/REG_x/REG_y/.
diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c
index a0f8b59d0d9..e5dee8f987b 100644
--- a/sim/sh/gencode.c
+++ b/sim/sh/gencode.c
@@ -2159,7 +2159,7 @@ gensim_caselist (p)
s += 2;
break;
case 'y':
- printf (" int n = ((iword >> 8) & 1) + 4;\n");
+ printf (" int n = ((iword >> 8) & 1) + 6;\n");
needn = 1;
s += 2;
break;