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authorNick Clifton <nickc@redhat.com>2002-08-29 16:59:20 +0000
committerNick Clifton <nickc@redhat.com>2002-08-29 16:59:20 +0000
commitfb39d1b1c5b7499edecf32fd60f8569f62ec5277 (patch)
tree4c85b404fa628186cba4c25e6a27dfea20473261 /sim
parent516f7836a9b94fa6f89fd56dff0de1ff46ef6f35 (diff)
downloadgdb-fb39d1b1c5b7499edecf32fd60f8569f62ec5277.tar.gz
Makefile.in: Add gen-zero-r0 option.
sim-main.h (GPR_SET, GPR_CLEAR): Define. simops.c (OP_24007E0): Sign extend the imm9 operand of a mul instruction.
Diffstat (limited to 'sim')
-rw-r--r--sim/v850/ChangeLog9
-rw-r--r--sim/v850/Makefile.in1
-rw-r--r--sim/v850/sim-main.h2
-rw-r--r--sim/v850/simops.c2
4 files changed, 13 insertions, 1 deletions
diff --git a/sim/v850/ChangeLog b/sim/v850/ChangeLog
index cb20ad5f864..c8b3aabdc4a 100644
--- a/sim/v850/ChangeLog
+++ b/sim/v850/ChangeLog
@@ -1,3 +1,12 @@
+2002-08-29 Nick Clifton <nickc@redhat.com>
+
+ From 2001-08-23 Catherine Moore <clm@redhat.com>
+
+ * Makefile.in: Add gen-zero-r0 option.
+ * sim-main.h (GPR_SET, GPR_CLEAR): Define.
+ * simops.c (OP_24007E0): Sign extend the imm9
+ operand of a mul instruction.
+
2002-06-17 Andrew Cagney <cagney@redhat.com>
* simops.c (trace_result): Fix printf formatting.
diff --git a/sim/v850/Makefile.in b/sim/v850/Makefile.in
index 110cb1761f9..89029d6a627 100644
--- a/sim/v850/Makefile.in
+++ b/sim/v850/Makefile.in
@@ -82,6 +82,7 @@ tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen
../igen/igen \
$(IGEN_TRACE) \
-G gen-direct-access \
+ -G gen-zero-r0 \
-i $(IGEN_INSN) \
-o $(IGEN_DC) \
-x \
diff --git a/sim/v850/sim-main.h b/sim/v850/sim-main.h
index 37ea31f3f4c..a16ec00a699 100644
--- a/sim/v850/sim-main.h
+++ b/sim/v850/sim-main.h
@@ -366,6 +366,8 @@ do { \
#endif
+#define GPR_SET(N, VAL) (State.regs[(N)] = (VAL))
+#define GPR_CLEAR(N) (State.regs[(N)] = 0)
extern void divun ( unsigned int N,
unsigned long int als,
diff --git a/sim/v850/simops.c b/sim/v850/simops.c
index 9a83d0796a2..d8a4d58ae11 100644
--- a/sim/v850/simops.c
+++ b/sim/v850/simops.c
@@ -2458,7 +2458,7 @@ OP_24007E0 (void)
{
trace_input ("mul", OP_IMM_REG_REG, 0);
- Multiply64 (true, (OP[3] & 0x1f) | ((OP[3] >> 13) & 0x1e0));
+ Multiply64 (true, SEXT9 ((OP[3] & 0x1f) | ((OP[3] >> 13) & 0x1e0)));
trace_output (OP_IMM_REG_REG);