diff options
| author | Jason Molenda <jsm@bugshack.cygnus.com> | 1999-08-02 23:48:37 +0000 |
|---|---|---|
| committer | Jason Molenda <jsm@bugshack.cygnus.com> | 1999-08-02 23:48:37 +0000 |
| commit | 6da787a878c938e680f13808dee254beacefbd43 (patch) | |
| tree | 7c7b4d4f6655b210e33ca51f656f4552c9326ed3 /sim | |
| parent | 1392c9fbbf6fe8811e5374356b7fdf3b389068ab (diff) | |
| download | gdb-6da787a878c938e680f13808dee254beacefbd43.tar.gz | |
import gdb-1999-08-02 snapshot
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/mips/ChangeLog | 6 | ||||
| -rw-r--r-- | sim/mips/interp.c | 56 |
2 files changed, 52 insertions, 10 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index cdea1ae66bb..64751c9f2fc 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,9 @@ +Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com> + + * interp.c (sim_store_register): Handle case where client - GDB - + specifies that a 4 byte register is 8 bytes in size. + (sim_fetch_register): Ditto. + 1999-07-14 Frank Ch. Eigler <fche@cygnus.com> Implement "sim firmware" option, inspired by jimb's version of 1998-01. diff --git a/sim/mips/interp.c b/sim/mips/interp.c index a102eeb4493..590af5e7c26 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -13,8 +13,8 @@ THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - $Revision: 1.184 $ - $Date: 1999/07/15 13:51:46 $ + $Revision: 1.185 $ + $Date: 1999/07/27 07:00:55 $ NOTEs: @@ -850,8 +850,17 @@ sim_store_register (sd,rn,memory,length) cpu->fpr_state[rn - FGRIDX] = fmt_uninterpreted; if (cpu->register_widths[rn] == 32) { - cpu->fgr[rn - FGRIDX] = T2H_4 (*(unsigned32*)memory); - return 4; + if (length == 8) + { + cpu->fgr[rn - FGRIDX] = + (unsigned32) T2H_8 (*(unsigned64*)memory); + return 8; + } + else + { + cpu->fgr[rn - FGRIDX] = T2H_4 (*(unsigned32*)memory); + return 4; + } } else { @@ -862,8 +871,17 @@ sim_store_register (sd,rn,memory,length) if (cpu->register_widths[rn] == 32) { - cpu->registers[rn] = T2H_4 (*(unsigned32*)memory); - return 4; + if (length == 8) + { + cpu->registers[rn] = + (unsigned32) T2H_8 (*(unsigned64*)memory); + return 8; + } + else + { + cpu->registers[rn] = T2H_4 (*(unsigned32*)memory); + return 4; + } } else { @@ -903,8 +921,17 @@ sim_fetch_register (sd,rn,memory,length) { if (cpu->register_widths[rn] == 32) { - *(unsigned32*)memory = H2T_4 (cpu->fgr[rn - FGRIDX]); - return 4; + if (length == 8) + { + *(unsigned64*)memory = + H2T_8 ((unsigned32) (cpu->fgr[rn - FGRIDX])); + return 8; + } + else + { + *(unsigned32*)memory = H2T_4 (cpu->fgr[rn - FGRIDX]); + return 4; + } } else { @@ -915,8 +942,17 @@ sim_fetch_register (sd,rn,memory,length) if (cpu->register_widths[rn] == 32) { - *(unsigned32*)memory = H2T_4 ((unsigned32)(cpu->registers[rn])); - return 4; + if (length == 8) + { + *(unsigned64*)memory = + H2T_8 ((unsigned32) (cpu->registers[rn])); + return 8; + } + else + { + *(unsigned32*)memory = H2T_4 ((unsigned32)(cpu->registers[rn])); + return 4; + } } else { |