diff options
| author | Andrew Cagney <cagney@redhat.com> | 2006-11-29 15:20:55 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 2006-11-29 15:20:55 +0000 |
| commit | 94da37e40feae28d1d243417cebafa756a13252c (patch) | |
| tree | b4eb984488ca8010fff1a3d8481d1b2dea835484 /sim | |
| parent | f0d2bda4f1232266e1d8a159a960c46b63a72bbd (diff) | |
| download | gdb-94da37e40feae28d1d243417cebafa756a13252c.tar.gz | |
2006-11-22 Tom Marn <tom.marn@telargo.com>
Committed by Andrew Cagney.
* ppc-instructions: Implement optional PowerPC stfiwx instruction.
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/ppc/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/ppc/ppc-instructions | 19 |
2 files changed, 17 insertions, 7 deletions
diff --git a/sim/ppc/ChangeLog b/sim/ppc/ChangeLog index 8915bea733d..5e17b8c98b5 100644 --- a/sim/ppc/ChangeLog +++ b/sim/ppc/ChangeLog @@ -1,3 +1,8 @@ +2006-11-22 Tom Marn <tom.marn@telargo.com> + + Committed by Andrew Cagney. + * ppc-instructions: Implement optional PowerPC stfiwx instruction. + 2006-07-12 Fred Fish <fnf@specifix.com> * sim-endian.h (asm/byteorder.h): Don't include private kernel diff --git a/sim/ppc/ppc-instructions b/sim/ppc/ppc-instructions index 1991c49309c..5f3e13319f6 100644 --- a/sim/ppc/ppc-instructions +++ b/sim/ppc/ppc-instructions @@ -3644,6 +3644,18 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia, STORE(EA, 8, *frS); PPC_INSN_INT_FLOAT(0, 0, (RA_BITMASK & ~1) | RB_BITMASK, FRS_BITMASK); +0.31,6.FRS,11.RA,16.RB,21.983,31./:X:f::Store Floating-Point Integer Word Indexed +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 + unsigned_word b; + unsigned_word EA; + if (RA_is_0) b = 0; + else b = *rA; + EA = b + *rB; + STORE(EA, 4, *frS); + PPC_INSN_INT_FLOAT(0, 0, (RA_BITMASK & ~1) | RB_BITMASK, FRS_BITMASK); + 0.55,6.FRS,11.RA,16.D:D:f::Store Floating-Point Double with Update *601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 @@ -4682,13 +4694,6 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia, FPSCR |= bit; FPSCR_END(Rc); - -# -# I.A.1.1 Floating-Point Store Instruction -# -0.31,6.FRS,11.RA,16.RB,21.983,31./:X:f,o::Store Floating-Point as Integer Word Indexed - program_interrupt(processor, cia, optional_instruction_program_interrupt); - # # I.A.1.2 Floating-Point Arithmetic Instructions # |