diff options
| -rw-r--r-- | bfd/ChangeLog | 4 | ||||
| -rw-r--r-- | bfd/elf64-ppc.c | 4 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/iq2000-asm.c | 4 | ||||
| -rw-r--r-- | opcodes/ms1-asm.c | 31 |
5 files changed, 24 insertions, 24 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index e7cdd85e0c5..67a8e795599 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,7 @@ +2005-07-05 Nick Clifton <nickc@redhat.com> + + * elf64-ppc.c (ppc64_elf_info_to_howto): Fix typo. + 2005-05-07 Paul Brook <paul@codesourcery.com> * config.bfd: Add separate case for ppc-vxworks. diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c index 656e8227552..f05262b9c25 100644 --- a/bfd/elf64-ppc.c +++ b/bfd/elf64-ppc.c @@ -2121,8 +2121,8 @@ ppc64_elf_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr, / sizeof (ppc64_elf_howto_table[0]))) { (*_bfd_error_handler) (_("%B: invalid relocation type %d"), - abfd, (int) r_type); - r_type = R_PPC64_NONE; + abfd, (int) type); + type = R_PPC64_NONE; } cache_ptr->howto = ppc64_elf_howto_table[type]; } diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index f78ecf20ad8..87b3942af96 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2005-07-05 Nick Clifton <nickc@redhat.com> + + * iq2000-asm.c: Regenerate. + * ms1-asm.c: Regenerate. + 2005-07-05 Jan Beulich <jbeulich@novell.com> * i386-dis.c (SVME_Fixup): New. diff --git a/opcodes/iq2000-asm.c b/opcodes/iq2000-asm.c index 0bbb4aec89b..caab54f500b 100644 --- a/opcodes/iq2000-asm.c +++ b/opcodes/iq2000-asm.c @@ -255,7 +255,7 @@ static const char * parse_lo16 (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { if (strncasecmp (*strp, "%lo(", 4) == 0) { @@ -287,7 +287,7 @@ static const char * parse_mlo16 (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { if (strncasecmp (*strp, "%lo(", 4) == 0) { diff --git a/opcodes/ms1-asm.c b/opcodes/ms1-asm.c index 7647c1b272d..528a0d5eebe 100644 --- a/opcodes/ms1-asm.c +++ b/opcodes/ms1-asm.c @@ -49,16 +49,6 @@ static const char * parse_insn_normal /* -- assembler routines inserted here. */ /* -- asm.c */ -static int signed_out_of_bounds (long); -static const char * parse_imm16 (CGEN_CPU_DESC, const char **, int, long *); -static const char * parse_dup (CGEN_CPU_DESC, const char **, int, long *); -static const char * parse_ball (CGEN_CPU_DESC, const char **, int, long *); -static const char * parse_xmode (CGEN_CPU_DESC, const char **, int, long *); -static const char * parse_rc (CGEN_CPU_DESC, const char **, int, long *); -static const char * parse_cbrb (CGEN_CPU_DESC, const char **, int, long *); -static const char * parse_rbbc (CGEN_CPU_DESC, const char **, int, long *); -static const char * parse_type (CGEN_CPU_DESC, const char **, int, long *); - /* Range checking for signed numbers. Returns 0 if acceptable and 1 if the value is out of bounds for a signed quantity. */ @@ -74,8 +64,9 @@ static const char * parse_imm16 (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + void *arg) { + signed long * valuep = (signed long *) arg; const char *errmsg; enum cgen_parse_operand_result result_type; bfd_reloc_code_real_type code = BFD_RELOC_NONE; @@ -178,9 +169,9 @@ parse_imm16 (CGEN_CPU_DESC cd, else { /* MS1_OPERAND_IMM16Z. Parse as an unsigned integer. */ - errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep); + errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, (unsigned long *) valuep); - if (opindex == (CGEN_OPERAND_TYPE)MS1_OPERAND_IMM16 + if (opindex == (CGEN_OPERAND_TYPE) MS1_OPERAND_IMM16 && *valuep >= 0x8000 && *valuep <= 0xffff) *valuep -= 0x10000; @@ -195,7 +186,7 @@ static const char * parse_dup (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { const char *errmsg = NULL; @@ -220,7 +211,7 @@ static const char * parse_ball (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { const char *errmsg = NULL; @@ -244,7 +235,7 @@ static const char * parse_xmode (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { const char *errmsg = NULL; @@ -268,7 +259,7 @@ static const char * parse_rc (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { const char *errmsg = NULL; @@ -292,7 +283,7 @@ static const char * parse_cbrb (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { const char *errmsg = NULL; @@ -316,7 +307,7 @@ static const char * parse_rbbc (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { const char *errmsg = NULL; @@ -350,7 +341,7 @@ static const char * parse_type (CGEN_CPU_DESC cd, const char **strp, int opindex, - long *valuep) + unsigned long *valuep) { const char *errmsg = NULL; |