diff options
| -rw-r--r-- | opcodes/ChangeLog | 10 | ||||
| -rw-r--r-- | opcodes/iq2000-asm.c | 26 | ||||
| -rw-r--r-- | opcodes/iq2000-desc.c | 64 | ||||
| -rw-r--r-- | opcodes/iq2000-desc.h | 7 | ||||
| -rw-r--r-- | opcodes/iq2000-dis.c | 6 | ||||
| -rw-r--r-- | opcodes/iq2000-ibld.c | 36 | ||||
| -rw-r--r-- | opcodes/iq2000-opc.c | 60 | ||||
| -rw-r--r-- | opcodes/iq2000-opc.h | 4 |
8 files changed, 114 insertions, 99 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index add6f4357c5..2f3d7e3bcec 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,13 @@ +2004-10-27 Nick Clifton <nickc@redhat.com> + + * opcodes/iq2000-asm.c: Regenerate. + * opcodes/iq2000-desc.c: Regenerate. + * opcodes/iq2000-desc.h: Regenerate. + * opcodes/iq2000-dis.c: Regenerate. + * opcodes/iq2000-ibld.c: Regenerate. + * opcodes/iq2000-opc.c: Regenerate. + * opcodes/iq2000-opc.h: Regenerate. + 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com> * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3, diff --git a/opcodes/iq2000-asm.c b/opcodes/iq2000-asm.c index 62d03f857a6..3db5d90d100 100644 --- a/opcodes/iq2000-asm.c +++ b/opcodes/iq2000-asm.c @@ -48,16 +48,22 @@ static const char * parse_insn_normal /* -- assembler routines inserted here. */ /* -- asm.c */ + +#include "safe-ctype.h" + +static int iq2000_cgen_isa_register PARAMS ((const char **)); +static const char * parse_jtargq10 PARAMS ((CGEN_CPU_DESC, const char **, int, int, enum cgen_parse_operand_result *, unsigned long *)); static const char * parse_mimm PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); static const char * parse_imm PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static const char * parse_hi16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static const char * parse_lo16 PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); +static const char * parse_mlo16 PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); /* Special check to ensure that instruction exists for given machine */ int iq2000_cgen_insn_supported (cd, insn) CGEN_CPU_DESC cd; - CGEN_INSN *insn; + const CGEN_INSN *insn; { int machs = cd->machs; @@ -88,7 +94,7 @@ static int iq2000_cgen_isa_register (strp) return 1; } } - if (**strp == '%' && tolower((*strp)[1]) != 'l' && tolower((*strp)[1]) != 'h') + if (**strp == '%' && TOLOWER((*strp)[1]) != 'l' && TOLOWER((*strp)[1]) != 'h') return 1; return 0; } @@ -103,7 +109,6 @@ parse_mimm (cd, strp, opindex, valuep) long *valuep; { const char *errmsg; - long value; /* Verify this isn't a register */ if (iq2000_cgen_isa_register (strp)) @@ -116,7 +121,7 @@ parse_mimm (cd, strp, opindex, valuep) if (errmsg == NULL) { long x = (-value) & 0xFFFF0000; - if (x != 0 && x != 0xFFFF0000) + if (x != 0 && x != (long) 0xFFFF0000) errmsg = _("immediate value out of range"); else *valuep = (-value & 0xFFFF); @@ -135,7 +140,6 @@ parse_imm (cd, strp, opindex, valuep) unsigned long *valuep; { const char *errmsg; - long value; if (iq2000_cgen_isa_register (strp)) errmsg = _("immediate value cannot be register"); @@ -147,7 +151,7 @@ parse_imm (cd, strp, opindex, valuep) if (errmsg == NULL) { long x = value & 0xFFFF0000; - if (x != 0 && x != 0xFFFF0000) + if (x != 0 && x != (long) 0xFFFF0000) errmsg = _("immediate value out of range"); else *valuep = (value & 0xFFFF); @@ -163,8 +167,8 @@ parse_jtargq10 (cd, strp, opindex, reloc, type_addr, valuep) CGEN_CPU_DESC cd; const char **strp; int opindex; - int reloc; - enum cgen_parse_operand_result *type_addr; + int reloc ATTRIBUTE_UNUSED; + enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED; unsigned long *valuep; { const char *errmsg; @@ -345,6 +349,9 @@ iq2000_cgen_parse_operand (cd, opindex, strp, fields) switch (opindex) { + case IQ2000_OPERAND__INDEX : + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND__INDEX, &fields->f_index); + break; case IQ2000_OPERAND_BASE : errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs); break; @@ -385,9 +392,6 @@ iq2000_cgen_parse_operand (cd, opindex, strp, fields) case IQ2000_OPERAND_EXECODE : errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, &fields->f_excode); break; - case IQ2000_OPERAND_F_INDEX : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_F_INDEX, &fields->f_index); - break; case IQ2000_OPERAND_HI16 : errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, &fields->f_imm); break; diff --git a/opcodes/iq2000-desc.c b/opcodes/iq2000-desc.c index 6c7f3b06b79..56974aebeb3 100644 --- a/opcodes/iq2000-desc.c +++ b/opcodes/iq2000-desc.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. +Copyright 1996-2004 Free Software Foundation, Inc. This file is part of the GNU Binutils and/or GDB, the GNU debugger. @@ -122,7 +122,7 @@ const CGEN_ATTR_TABLE iq2000_cgen_insn_attr_table[] = /* Instruction set variants. */ static const CGEN_ISA iq2000_cgen_isa_table[] = { - { "iq2000", 32, 32, 23, 32 }, + { "iq2000", 32, 32, 32, 32 }, { 0, 0, 0, 0, 0 } }; @@ -394,8 +394,8 @@ const CGEN_OPERAND iq2000_cgen_operand_table[] = { "count", IQ2000_OPERAND_COUNT, HW_H_UINT, 15, 7, { 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_COUNT] } }, { 0, { (1<<MACH_BASE) } } }, -/* f-index: index */ - { "f-index", IQ2000_OPERAND_F_INDEX, HW_H_UINT, 8, 9, +/* _index: index */ + { "_index", IQ2000_OPERAND__INDEX, HW_H_UINT, 8, 9, { 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_INDEX] } }, { 0, { (1<<MACH_BASE) } } }, /* execode: execcode */ @@ -1167,14 +1167,14 @@ static const CGEN_IBASE iq2000_cgen_insn_table[MAX_INSNS] = IQ2000_INSN_PKRL, "pkrl", "pkrl", 32, { 0|A(YIELD_INSN)|A(USES_RT)|A(USES_RD), { (1<<MACH_IQ2000) } } }, -/* pkrlr1 $rt,$count */ +/* pkrlr1 $rt,$_index,$count */ { - IQ2000_INSN_PKRLR1, "pkrlr1", "pkrlr1", 23, + IQ2000_INSN_PKRLR1, "pkrlr1", "pkrlr1", 32, { 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } } }, -/* pkrlr30 $rt,$count */ +/* pkrlr30 $rt,$_index,$count */ { - IQ2000_INSN_PKRLR30, "pkrlr30", "pkrlr30", 23, + IQ2000_INSN_PKRLR30, "pkrlr30", "pkrlr30", 32, { 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } } }, /* rb $rd,$rt */ @@ -1182,14 +1182,14 @@ static const CGEN_IBASE iq2000_cgen_insn_table[MAX_INSNS] = IQ2000_INSN_RB, "rb", "rb", 32, { 0|A(YIELD_INSN)|A(USES_RT)|A(USES_RD), { (1<<MACH_IQ2000) } } }, -/* rbr1 $rt,$count */ +/* rbr1 $rt,$_index,$count */ { - IQ2000_INSN_RBR1, "rbr1", "rbr1", 23, + IQ2000_INSN_RBR1, "rbr1", "rbr1", 32, { 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } } }, -/* rbr30 $rt,$count */ +/* rbr30 $rt,$_index,$count */ { - IQ2000_INSN_RBR30, "rbr30", "rbr30", 23, + IQ2000_INSN_RBR30, "rbr30", "rbr30", 32, { 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } } }, /* rfe */ @@ -1202,14 +1202,14 @@ static const CGEN_IBASE iq2000_cgen_insn_table[MAX_INSNS] = IQ2000_INSN_RX, "rx", "rx", 32, { 0|A(YIELD_INSN)|A(USES_RT)|A(USES_RD), { (1<<MACH_IQ2000) } } }, -/* rxr1 $rt,$count */ +/* rxr1 $rt,$_index,$count */ { - IQ2000_INSN_RXR1, "rxr1", "rxr1", 23, + IQ2000_INSN_RXR1, "rxr1", "rxr1", 32, { 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } } }, -/* rxr30 $rt,$count */ +/* rxr30 $rt,$_index,$count */ { - IQ2000_INSN_RXR30, "rxr30", "rxr30", 23, + IQ2000_INSN_RXR30, "rxr30", "rxr30", 32, { 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } } }, /* sleep */ @@ -1267,24 +1267,24 @@ static const CGEN_IBASE iq2000_cgen_insn_table[MAX_INSNS] = IQ2000_INSN_WBU, "wbu", "wbu", 32, { 0|A(YIELD_INSN)|A(USES_RT)|A(USES_RD), { (1<<MACH_IQ2000) } } }, -/* wbr1 $rt,$count */ +/* wbr1 $rt,$_index,$count */ { - IQ2000_INSN_WBR1, "wbr1", "wbr1", 23, + IQ2000_INSN_WBR1, "wbr1", "wbr1", 32, { 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } } }, -/* wbr1u $rt,$count */ +/* wbr1u $rt,$_index,$count */ { - IQ2000_INSN_WBR1U, "wbr1u", "wbr1u", 23, + IQ2000_INSN_WBR1U, "wbr1u", "wbr1u", 32, { 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } } }, -/* wbr30 $rt,$count */ +/* wbr30 $rt,$_index,$count */ { - IQ2000_INSN_WBR30, "wbr30", "wbr30", 23, + IQ2000_INSN_WBR30, "wbr30", "wbr30", 32, { 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } } }, -/* wbr30u $rt,$count */ +/* wbr30u $rt,$_index,$count */ { - IQ2000_INSN_WBR30U, "wbr30u", "wbr30u", 23, + IQ2000_INSN_WBR30U, "wbr30u", "wbr30u", 32, { 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } } }, /* wx $rd,$rt */ @@ -1297,24 +1297,24 @@ static const CGEN_IBASE iq2000_cgen_insn_table[MAX_INSNS] = IQ2000_INSN_WXU, "wxu", "wxu", 32, { 0|A(YIELD_INSN)|A(USES_RT)|A(USES_RD), { (1<<MACH_IQ2000) } } }, -/* wxr1 $rt,$count */ +/* wxr1 $rt,$_index,$count */ { - IQ2000_INSN_WXR1, "wxr1", "wxr1", 23, + IQ2000_INSN_WXR1, "wxr1", "wxr1", 32, { 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } } }, -/* wxr1u $rt,$count */ +/* wxr1u $rt,$_index,$count */ { - IQ2000_INSN_WXR1U, "wxr1u", "wxr1u", 23, + IQ2000_INSN_WXR1U, "wxr1u", "wxr1u", 32, { 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } } }, -/* wxr30 $rt,$count */ +/* wxr30 $rt,$_index,$count */ { - IQ2000_INSN_WXR30, "wxr30", "wxr30", 23, + IQ2000_INSN_WXR30, "wxr30", "wxr30", 32, { 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } } }, -/* wxr30u $rt,$count */ +/* wxr30u $rt,$_index,$count */ { - IQ2000_INSN_WXR30U, "wxr30u", "wxr30u", 23, + IQ2000_INSN_WXR30U, "wxr30u", "wxr30u", 32, { 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } } }, /* ldw $rt,$lo16($base) */ diff --git a/opcodes/iq2000-desc.h b/opcodes/iq2000-desc.h index 13b4f56a80b..3106e627a30 100644 --- a/opcodes/iq2000-desc.h +++ b/opcodes/iq2000-desc.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. +Copyright 1996-2004 Free Software Foundation, Inc. This file is part of the GNU Binutils and/or GDB, the GNU debugger. @@ -42,7 +42,7 @@ with this program; if not, write to the Free Software Foundation, Inc., #define CGEN_INSN_LSB0_P 1 /* Minimum size of any insn (in bytes). */ -#define CGEN_MIN_INSN_SIZE 3 +#define CGEN_MIN_INSN_SIZE 4 /* Maximum size of any insn (in bytes). */ #define CGEN_MAX_INSN_SIZE 4 @@ -255,7 +255,7 @@ typedef enum cgen_operand_type { , IQ2000_OPERAND_RD_RS, IQ2000_OPERAND_RD_RT, IQ2000_OPERAND_RT_RS, IQ2000_OPERAND_SHAMT , IQ2000_OPERAND_IMM, IQ2000_OPERAND_OFFSET, IQ2000_OPERAND_BASEOFF, IQ2000_OPERAND_JMPTARG , IQ2000_OPERAND_MASK, IQ2000_OPERAND_MASKQ10, IQ2000_OPERAND_MASKL, IQ2000_OPERAND_COUNT - , IQ2000_OPERAND_F_INDEX, IQ2000_OPERAND_EXECODE, IQ2000_OPERAND_BYTECOUNT, IQ2000_OPERAND_CAM_Y + , IQ2000_OPERAND__INDEX, IQ2000_OPERAND_EXECODE, IQ2000_OPERAND_BYTECOUNT, IQ2000_OPERAND_CAM_Y , IQ2000_OPERAND_CAM_Z, IQ2000_OPERAND_CM_3FUNC, IQ2000_OPERAND_CM_4FUNC, IQ2000_OPERAND_CM_3Z , IQ2000_OPERAND_CM_4Z, IQ2000_OPERAND_BASE, IQ2000_OPERAND_MASKR, IQ2000_OPERAND_BITNUM , IQ2000_OPERAND_HI16, IQ2000_OPERAND_LO16, IQ2000_OPERAND_MLO16, IQ2000_OPERAND_JMPTARGQ10 @@ -296,6 +296,7 @@ extern const CGEN_ATTR_TABLE iq2000_cgen_insn_attr_table[]; extern CGEN_KEYWORD iq2000_cgen_opval_gr_names; +extern const CGEN_HW_ENTRY iq2000_cgen_hw_table[]; diff --git a/opcodes/iq2000-dis.c b/opcodes/iq2000-dis.c index c20e9788517..3c103d83959 100644 --- a/opcodes/iq2000-dis.c +++ b/opcodes/iq2000-dis.c @@ -92,6 +92,9 @@ iq2000_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) switch (opindex) { + case IQ2000_OPERAND__INDEX : + print_normal (cd, info, fields->f_index, 0, pc, length); + break; case IQ2000_OPERAND_BASE : print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rs, 0); break; @@ -128,9 +131,6 @@ iq2000_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) case IQ2000_OPERAND_EXECODE : print_normal (cd, info, fields->f_excode, 0, pc, length); break; - case IQ2000_OPERAND_F_INDEX : - print_normal (cd, info, fields->f_index, 0, pc, length); - break; case IQ2000_OPERAND_HI16 : print_normal (cd, info, fields->f_imm, 0, pc, length); break; diff --git a/opcodes/iq2000-ibld.c b/opcodes/iq2000-ibld.c index f0640f0774f..f8dedf45d43 100644 --- a/opcodes/iq2000-ibld.c +++ b/opcodes/iq2000-ibld.c @@ -571,6 +571,9 @@ iq2000_cgen_insert_operand (cd, opindex, fields, buffer, pc) switch (opindex) { + case IQ2000_OPERAND__INDEX : + errmsg = insert_normal (cd, fields->f_index, 0, 0, 8, 9, 32, total_length, buffer); + break; case IQ2000_OPERAND_BASE : errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer); break; @@ -607,9 +610,6 @@ iq2000_cgen_insert_operand (cd, opindex, fields, buffer, pc) case IQ2000_OPERAND_EXECODE : errmsg = insert_normal (cd, fields->f_excode, 0, 0, 25, 20, 32, total_length, buffer); break; - case IQ2000_OPERAND_F_INDEX : - errmsg = insert_normal (cd, fields->f_index, 0, 0, 8, 9, 32, total_length, buffer); - break; case IQ2000_OPERAND_HI16 : errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer); break; @@ -754,6 +754,9 @@ iq2000_cgen_extract_operand (cd, opindex, ex_info, insn_value, fields, pc) switch (opindex) { + case IQ2000_OPERAND__INDEX : + length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 9, 32, total_length, pc, & fields->f_index); + break; case IQ2000_OPERAND_BASE : length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs); break; @@ -790,9 +793,6 @@ iq2000_cgen_extract_operand (cd, opindex, ex_info, insn_value, fields, pc) case IQ2000_OPERAND_EXECODE : length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 20, 32, total_length, pc, & fields->f_excode); break; - case IQ2000_OPERAND_F_INDEX : - length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 9, 32, total_length, pc, & fields->f_index); - break; case IQ2000_OPERAND_HI16 : length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm); break; @@ -927,6 +927,9 @@ iq2000_cgen_get_int_operand (cd, opindex, fields) switch (opindex) { + case IQ2000_OPERAND__INDEX : + value = fields->f_index; + break; case IQ2000_OPERAND_BASE : value = fields->f_rs; break; @@ -963,9 +966,6 @@ iq2000_cgen_get_int_operand (cd, opindex, fields) case IQ2000_OPERAND_EXECODE : value = fields->f_excode; break; - case IQ2000_OPERAND_F_INDEX : - value = fields->f_index; - break; case IQ2000_OPERAND_HI16 : value = fields->f_imm; break; @@ -1041,6 +1041,9 @@ iq2000_cgen_get_vma_operand (cd, opindex, fields) switch (opindex) { + case IQ2000_OPERAND__INDEX : + value = fields->f_index; + break; case IQ2000_OPERAND_BASE : value = fields->f_rs; break; @@ -1077,9 +1080,6 @@ iq2000_cgen_get_vma_operand (cd, opindex, fields) case IQ2000_OPERAND_EXECODE : value = fields->f_excode; break; - case IQ2000_OPERAND_F_INDEX : - value = fields->f_index; - break; case IQ2000_OPERAND_HI16 : value = fields->f_imm; break; @@ -1164,6 +1164,9 @@ iq2000_cgen_set_int_operand (cd, opindex, fields, value) { switch (opindex) { + case IQ2000_OPERAND__INDEX : + fields->f_index = value; + break; case IQ2000_OPERAND_BASE : fields->f_rs = value; break; @@ -1200,9 +1203,6 @@ iq2000_cgen_set_int_operand (cd, opindex, fields, value) case IQ2000_OPERAND_EXECODE : fields->f_excode = value; break; - case IQ2000_OPERAND_F_INDEX : - fields->f_index = value; - break; case IQ2000_OPERAND_HI16 : fields->f_imm = value; break; @@ -1275,6 +1275,9 @@ iq2000_cgen_set_vma_operand (cd, opindex, fields, value) { switch (opindex) { + case IQ2000_OPERAND__INDEX : + fields->f_index = value; + break; case IQ2000_OPERAND_BASE : fields->f_rs = value; break; @@ -1311,9 +1314,6 @@ iq2000_cgen_set_vma_operand (cd, opindex, fields, value) case IQ2000_OPERAND_EXECODE : fields->f_excode = value; break; - case IQ2000_OPERAND_F_INDEX : - fields->f_index = value; - break; case IQ2000_OPERAND_HI16 : fields->f_imm = value; break; diff --git a/opcodes/iq2000-opc.c b/opcodes/iq2000-opc.c index 35ffdf0a213..729d6c31bf5 100644 --- a/opcodes/iq2000-opc.c +++ b/opcodes/iq2000-opc.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. +Copyright 1996-2004 Free Software Foundation, Inc. This file is part of the GNU Binutils and/or GDB, the GNU debugger. @@ -166,7 +166,7 @@ static const CGEN_IFMT ifmt_lulck = { }; static const CGEN_IFMT ifmt_pkrlr1 = { - 23, 23, 0xffe00000, { { F (F_OPCODE) }, { F (F_RS) }, { F (F_RT) }, { F (F_COUNT) }, { 0 } } + 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_RS) }, { F (F_RT) }, { F (F_COUNT) }, { F (F_INDEX) }, { 0 } } }; static const CGEN_IFMT ifmt_rfe = { @@ -1070,16 +1070,16 @@ static const CGEN_OPCODE iq2000_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, ' ', OP (RD), ',', OP (RT), 0 } }, & ifmt_chkhdr, { 0x4c200007 } }, -/* pkrlr1 $rt,$count */ +/* pkrlr1 $rt,$_index,$count */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } }, + { { MNEM, ' ', OP (RT), ',', OP (_INDEX), ',', OP (COUNT), 0 } }, & ifmt_pkrlr1, { 0x4fa00000 } }, -/* pkrlr30 $rt,$count */ +/* pkrlr30 $rt,$_index,$count */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } }, + { { MNEM, ' ', OP (RT), ',', OP (_INDEX), ',', OP (COUNT), 0 } }, & ifmt_pkrlr1, { 0x4fe00000 } }, /* rb $rd,$rt */ @@ -1088,16 +1088,16 @@ static const CGEN_OPCODE iq2000_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, ' ', OP (RD), ',', OP (RT), 0 } }, & ifmt_chkhdr, { 0x4c200004 } }, -/* rbr1 $rt,$count */ +/* rbr1 $rt,$_index,$count */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } }, + { { MNEM, ' ', OP (RT), ',', OP (_INDEX), ',', OP (COUNT), 0 } }, & ifmt_pkrlr1, { 0x4f000000 } }, -/* rbr30 $rt,$count */ +/* rbr30 $rt,$_index,$count */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } }, + { { MNEM, ' ', OP (RT), ',', OP (_INDEX), ',', OP (COUNT), 0 } }, & ifmt_pkrlr1, { 0x4f400000 } }, /* rfe */ @@ -1112,16 +1112,16 @@ static const CGEN_OPCODE iq2000_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, ' ', OP (RD), ',', OP (RT), 0 } }, & ifmt_chkhdr, { 0x4c200006 } }, -/* rxr1 $rt,$count */ +/* rxr1 $rt,$_index,$count */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } }, + { { MNEM, ' ', OP (RT), ',', OP (_INDEX), ',', OP (COUNT), 0 } }, & ifmt_pkrlr1, { 0x4f800000 } }, -/* rxr30 $rt,$count */ +/* rxr30 $rt,$_index,$count */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } }, + { { MNEM, ' ', OP (RT), ',', OP (_INDEX), ',', OP (COUNT), 0 } }, & ifmt_pkrlr1, { 0x4fc00000 } }, /* sleep */ @@ -1190,28 +1190,28 @@ static const CGEN_OPCODE iq2000_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, ' ', OP (RD), ',', OP (RT), 0 } }, & ifmt_chkhdr, { 0x4c200001 } }, -/* wbr1 $rt,$count */ +/* wbr1 $rt,$_index,$count */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } }, + { { MNEM, ' ', OP (RT), ',', OP (_INDEX), ',', OP (COUNT), 0 } }, & ifmt_pkrlr1, { 0x4e000000 } }, -/* wbr1u $rt,$count */ +/* wbr1u $rt,$_index,$count */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } }, + { { MNEM, ' ', OP (RT), ',', OP (_INDEX), ',', OP (COUNT), 0 } }, & ifmt_pkrlr1, { 0x4e200000 } }, -/* wbr30 $rt,$count */ +/* wbr30 $rt,$_index,$count */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } }, + { { MNEM, ' ', OP (RT), ',', OP (_INDEX), ',', OP (COUNT), 0 } }, & ifmt_pkrlr1, { 0x4e400000 } }, -/* wbr30u $rt,$count */ +/* wbr30u $rt,$_index,$count */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } }, + { { MNEM, ' ', OP (RT), ',', OP (_INDEX), ',', OP (COUNT), 0 } }, & ifmt_pkrlr1, { 0x4e600000 } }, /* wx $rd,$rt */ @@ -1226,28 +1226,28 @@ static const CGEN_OPCODE iq2000_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, ' ', OP (RD), ',', OP (RT), 0 } }, & ifmt_chkhdr, { 0x4c200003 } }, -/* wxr1 $rt,$count */ +/* wxr1 $rt,$_index,$count */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } }, + { { MNEM, ' ', OP (RT), ',', OP (_INDEX), ',', OP (COUNT), 0 } }, & ifmt_pkrlr1, { 0x4e800000 } }, -/* wxr1u $rt,$count */ +/* wxr1u $rt,$_index,$count */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } }, + { { MNEM, ' ', OP (RT), ',', OP (_INDEX), ',', OP (COUNT), 0 } }, & ifmt_pkrlr1, { 0x4ea00000 } }, -/* wxr30 $rt,$count */ +/* wxr30 $rt,$_index,$count */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } }, + { { MNEM, ' ', OP (RT), ',', OP (_INDEX), ',', OP (COUNT), 0 } }, & ifmt_pkrlr1, { 0x4ec00000 } }, -/* wxr30u $rt,$count */ +/* wxr30u $rt,$_index,$count */ { { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } }, + { { MNEM, ' ', OP (RT), ',', OP (_INDEX), ',', OP (COUNT), 0 } }, & ifmt_pkrlr1, { 0x4ee00000 } }, /* ldw $rt,$lo16($base) */ diff --git a/opcodes/iq2000-opc.h b/opcodes/iq2000-opc.h index 1242cea67a0..d2625225a13 100644 --- a/opcodes/iq2000-opc.h +++ b/opcodes/iq2000-opc.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. +Copyright 1996-2004 Free Software Foundation, Inc. This file is part of the GNU Binutils and/or GDB, the GNU debugger. @@ -39,7 +39,7 @@ with this program; if not, write to the Free Software Foundation, Inc., instructions have same mnemonics but different functionality. */ #define CGEN_VALIDATE_INSN_SUPPORTED -extern int iq2000_cgen_insn_supported (CGEN_CPU_DESC cd, CGEN_INSN *insn); +extern int iq2000_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn); /* -- asm.c */ /* Enum declaration for iq2000 instruction types. */ |