summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--gdb/ChangeLog17
-rw-r--r--gdb/corelow.c2
-rw-r--r--gdb/ppc-linux-tdep.c17
-rw-r--r--gdb/ppc-tdep.h21
-rw-r--r--gdb/rs6000-tdep.c118
5 files changed, 171 insertions, 4 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 4826945fb69..c356fb73f71 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,20 @@
+2007-10-29 Carlos Eduardo Seo <cseo@linux.vnet.ibm.com>
+
+ * ppc-linux-tdep.c (ppc32_linux_reg_offsets): Corrected
+ swapped offsets and VRSAVE offset.
+ (ppc64_linux_reg_offsets): Corrected swapped offsets.
+ (ppc32_linux_vrregset): Added.
+ (ppc_linux_regset_from_core_section): Added support for
+ .reg-ppc-vmx section.
+ * ppc-tdep.h (ppc_altivec_support_p): Declare.
+ (ppc_supply_vrregset): Declare.
+ (ppc_collect_vrregset): Declare.
+ * rs6000-tdep.c (ppc_altivec_support_p): Added.
+ (ppc_supply_vrregset): Added.
+ (ppc_collect_vrregset): Added.
+ * corelow.c (get_core_registers): Added support for
+ .reg-ppc-vmx section.
+
2007-10-29 Joel Brobecker <brobecker@adacore.com>
GDB 6.7.1 released.
diff --git a/gdb/corelow.c b/gdb/corelow.c
index af80dc37ff6..1b963caa197 100644
--- a/gdb/corelow.c
+++ b/gdb/corelow.c
@@ -499,6 +499,8 @@ get_core_registers (struct regcache *regcache, int regno)
".reg2", 2, "floating-point", 0);
get_core_register_section (regcache,
".reg-xfp", 3, "extended floating-point", 0);
+ get_core_register_section (regcache,
+ ".reg-ppc-vmx", 3, "ppc Altivec", 0);
/* Supply dummy value for all registers not found in the core. */
for (i = 0; i < gdbarch_num_regs (current_gdbarch); i++)
diff --git a/gdb/ppc-linux-tdep.c b/gdb/ppc-linux-tdep.c
index 324cef74c2a..323078e67a3 100644
--- a/gdb/ppc-linux-tdep.c
+++ b/gdb/ppc-linux-tdep.c
@@ -650,8 +650,8 @@ static const struct ppc_reg_offsets ppc32_linux_reg_offsets =
/* AltiVec registers. */
/* .vr0_offset = */ 0,
- /* .vrsave_offset = */ 512,
- /* .vscr_offset = */ 512 + 12
+ /* .vscr_offset = */ 512 + 12,
+ /* .vrsave_offset = */ 528
};
static const struct ppc_reg_offsets ppc64_linux_reg_offsets =
@@ -675,8 +675,8 @@ static const struct ppc_reg_offsets ppc64_linux_reg_offsets =
/* AltiVec registers. */
/* .vr0_offset = */ 0,
- /* .vrsave_offset = */ 528,
- /* .vscr_offset = */ 512 + 12
+ /* .vscr_offset = */ 512 + 12,
+ /* .vrsave_offset = */ 528
};
static const struct regset ppc32_linux_gregset = {
@@ -700,6 +700,13 @@ static const struct regset ppc32_linux_fpregset = {
NULL
};
+static const struct regset ppc32_linux_vrregset = {
+ &ppc32_linux_reg_offsets,
+ ppc_supply_vrregset,
+ ppc_collect_vrregset,
+ NULL
+};
+
const struct regset *
ppc_linux_gregset (int wordsize)
{
@@ -726,6 +733,8 @@ ppc_linux_regset_from_core_section (struct gdbarch *core_arch,
}
if (strcmp (sect_name, ".reg2") == 0)
return &ppc32_linux_fpregset;
+ if (strcmp (sect_name, ".reg-ppc-vmx") == 0)
+ return &ppc32_linux_vrregset;
return NULL;
}
diff --git a/gdb/ppc-tdep.h b/gdb/ppc-tdep.h
index 2b566dfb254..62f0e7e1663 100644
--- a/gdb/ppc-tdep.h
+++ b/gdb/ppc-tdep.h
@@ -73,6 +73,10 @@ int spe_register_p (int regno);
floating-point registers (f0 --- f31 and fpscr). */
int ppc_floating_point_unit_p (struct gdbarch *gdbarch);
+/* Return non-zero if the architecture described by GDBARCH has
+ Altivec registers (vr0 --- vr31, vrsave and vscr). */
+int ppc_altivec_support_p (struct gdbarch *gdbarch);
+
/* Register set description. */
struct ppc_reg_offsets
@@ -116,6 +120,14 @@ extern void ppc_supply_fpregset (const struct regset *regset,
struct regcache *regcache,
int regnum, const void *fpregs, size_t len);
+/* Supply register REGNUM in the Altivec register set REGSET
+ from the buffer specified by VRREGS and LEN to register cache
+ REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
+
+extern void ppc_supply_vrregset (const struct regset *regset,
+ struct regcache *regcache,
+ int regnum, const void *vrregs, size_t len);
+
/* Collect register REGNUM in the general-purpose register set
REGSET. from register cache REGCACHE into the buffer specified by
GREGS and LEN. If REGNUM is -1, do this for all registers in
@@ -134,6 +146,15 @@ extern void ppc_collect_fpregset (const struct regset *regset,
const struct regcache *regcache,
int regnum, void *fpregs, size_t len);
+/* Collect register REGNUM in the Altivec register set
+ REGSET from register cache REGCACHE into the buffer specified by
+ VRREGS and LEN. If REGNUM is -1, do this for all registers in
+ REGSET. */
+
+extern void ppc_collect_vrregset (const struct regset *regset,
+ const struct regcache *regcache,
+ int regnum, void *vrregs, size_t len);
+
/* Private data that this module attaches to struct gdbarch. */
struct gdbarch_tdep
diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c
index 55f2ee0c77a..f133b78823a 100644
--- a/gdb/rs6000-tdep.c
+++ b/gdb/rs6000-tdep.c
@@ -194,6 +194,16 @@ ppc_floating_point_unit_p (struct gdbarch *gdbarch)
&& tdep->ppc_fpscr_regnum >= 0);
}
+/* Return non-zero if the architecture described by GDBARCH has
+ Altivec registers (vr0 --- vr31, vrsave and vscr). */
+int
+ppc_altivec_support_p (struct gdbarch *gdbarch)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ return (tdep->ppc_vr0_regnum >= 0
+ && tdep->ppc_vrsave_regnum >= 0);
+}
/* Check that TABLE[GDB_REGNO] is not already initialized, and then
set it to SIM_REGNO.
@@ -436,6 +446,24 @@ ppc_fpreg_offset (struct gdbarch_tdep *tdep,
return -1;
}
+static int
+ppc_vrreg_offset (struct gdbarch_tdep *tdep,
+ const struct ppc_reg_offsets *offsets,
+ int regnum)
+{
+ if (regnum >= tdep->ppc_vr0_regnum
+ && regnum < tdep->ppc_vr0_regnum + ppc_num_vrs)
+ return offsets->vr0_offset + (regnum - tdep->ppc_vr0_regnum) * 16;
+
+ if (regnum == tdep->ppc_vrsave_regnum - 1)
+ return offsets->vscr_offset;
+
+ if (regnum == tdep->ppc_vrsave_regnum)
+ return offsets->vrsave_offset;
+
+ return -1;
+}
+
/* Supply register REGNUM in the general-purpose register set REGSET
from the buffer specified by GREGS and LEN to register cache
REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
@@ -518,6 +546,50 @@ ppc_supply_fpregset (const struct regset *regset, struct regcache *regcache,
regnum == tdep->ppc_fpscr_regnum ? offsets->fpscr_size : 8);
}
+/* Supply register REGNUM in the Altivec register set REGSET
+ from the buffer specified by VRREGS and LEN to register cache
+ REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
+
+void
+ppc_supply_vrregset (const struct regset *regset, struct regcache *regcache,
+ int regnum, const void *vrregs, size_t len)
+{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *tdep;
+ const struct ppc_reg_offsets *offsets;
+ size_t offset;
+
+ if (!ppc_altivec_support_p (gdbarch))
+ return;
+
+ tdep = gdbarch_tdep (gdbarch);
+ offsets = regset->descr;
+ if (regnum == -1)
+ {
+ int i;
+
+ for (i = tdep->ppc_vr0_regnum, offset = offsets->vr0_offset;
+ i < tdep->ppc_vr0_regnum + ppc_num_vrs;
+ i++, offset += 16)
+ ppc_supply_reg (regcache, i, vrregs, offset, 16);
+
+ ppc_supply_reg (regcache, (tdep->ppc_vrsave_regnum - 1),
+ vrregs, offsets->vscr_offset, 4);
+
+ ppc_supply_reg (regcache, tdep->ppc_vrsave_regnum,
+ vrregs, offsets->vrsave_offset, 4);
+ return;
+ }
+
+ offset = ppc_vrreg_offset (tdep, offsets, regnum);
+ if (regnum != tdep->ppc_vrsave_regnum
+ && regnum != tdep->ppc_vrsave_regnum - 1)
+ ppc_supply_reg (regcache, regnum, vrregs, offset, 16);
+ else
+ ppc_supply_reg (regcache, regnum,
+ vrregs, offset, 4);
+}
+
/* Collect register REGNUM in the general-purpose register set
REGSET from register cache REGCACHE into the buffer specified by
GREGS and LEN. If REGNUM is -1, do this for all registers in
@@ -603,6 +675,52 @@ ppc_collect_fpregset (const struct regset *regset,
ppc_collect_reg (regcache, regnum, fpregs, offset,
regnum == tdep->ppc_fpscr_regnum ? offsets->fpscr_size : 8);
}
+
+/* Collect register REGNUM in the Altivec register set
+ REGSET from register cache REGCACHE into the buffer specified by
+ VRREGS and LEN. If REGNUM is -1, do this for all registers in
+ REGSET. */
+
+void
+ppc_collect_vrregset (const struct regset *regset,
+ const struct regcache *regcache,
+ int regnum, void *vrregs, size_t len)
+{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *tdep;
+ const struct ppc_reg_offsets *offsets;
+ size_t offset;
+
+ if (!ppc_altivec_support_p (gdbarch))
+ return;
+
+ tdep = gdbarch_tdep (gdbarch);
+ offsets = regset->descr;
+ if (regnum == -1)
+ {
+ int i;
+
+ for (i = tdep->ppc_vr0_regnum, offset = offsets->vr0_offset;
+ i < tdep->ppc_vr0_regnum + ppc_num_vrs;
+ i++, offset += 16)
+ ppc_collect_reg (regcache, i, vrregs, offset, 16);
+
+ ppc_collect_reg (regcache, (tdep->ppc_vrsave_regnum - 1),
+ vrregs, offsets->vscr_offset, 4);
+
+ ppc_collect_reg (regcache, tdep->ppc_vrsave_regnum,
+ vrregs, offsets->vrsave_offset, 4);
+ return;
+ }
+
+ offset = ppc_vrreg_offset (tdep, offsets, regnum);
+ if (regnum != tdep->ppc_vrsave_regnum
+ && regnum != tdep->ppc_vrsave_regnum - 1)
+ ppc_collect_reg (regcache, regnum, vrregs, offset, 16);
+ else
+ ppc_collect_reg (regcache, regnum,
+ vrregs, offset, 4);
+}
/* Read a LEN-byte address from debugged memory address MEMADDR. */
View Lorry Controller Status