diff options
Diffstat (limited to 'gdb/config')
| -rw-r--r-- | gdb/config/i386/go32.mt | 3 | ||||
| -rw-r--r-- | gdb/config/i386/nm-go32.h | 57 | ||||
| -rw-r--r-- | gdb/config/i386/tm-go32.h | 212 | ||||
| -rw-r--r-- | gdb/config/tic80/tic80.mt | 7 | ||||
| -rw-r--r-- | gdb/config/tic80/tm-tic80.h | 257 |
5 files changed, 536 insertions, 0 deletions
diff --git a/gdb/config/i386/go32.mt b/gdb/config/i386/go32.mt new file mode 100644 index 00000000000..9b82c6426b4 --- /dev/null +++ b/gdb/config/i386/go32.mt @@ -0,0 +1,3 @@ +# Target: Intel 386 running DJGPP +TDEPFILES= i386-tdep.o i387-tdep.o +TM_FILE= tm-go32.h diff --git a/gdb/config/i386/nm-go32.h b/gdb/config/i386/nm-go32.h new file mode 100644 index 00000000000..183b60fa181 --- /dev/null +++ b/gdb/config/i386/nm-go32.h @@ -0,0 +1,57 @@ +/* Native definitions for Intel x86 running DJGPP. + Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc. + +This file is part of GDB. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#define NO_PTRACE_H + +#include "i386/nm-i386v.h" + +#define TARGET_HAS_HARDWARE_WATCHPOINTS + +#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) 1 + +/* After a watchpoint trap, the PC points to the instruction after the + one that caused the trap. Therefore we don't need to step over it. + But we do need to reset the status register to avoid another trap. */ + +#define HAVE_CONTINUABLE_WATCHPOINT + +#define STOPPED_BY_WATCHPOINT(W) \ + go32_stopped_by_watchpoint (inferior_pid) + +/* Use these macros for watchpoint insertion/removal. */ + +#define target_insert_watchpoint(addr, len, type) \ + go32_insert_watchpoint (inferior_pid, addr, len, 2) + +#define target_remove_watchpoint(addr, len, type) \ + go32_remove_watchpoint (inferior_pid, addr, len) + +#define target_insert_hw_breakpoint(addr, shadow) \ + go32_insert_hw_breakpoint(addr, shadow) + +#define target_remove_hw_breakpoint(addr, shadow) \ + go32_remove_hw_breakpoint(addr, shadow) + +#define DECR_PC_AFTER_HW_BREAK 0 + +#undef FLOAT_INFO +#define FLOAT_INFO { i386_go32_float_info (); } + +extern void i386_go32_float_info (void); + diff --git a/gdb/config/i386/tm-go32.h b/gdb/config/i386/tm-go32.h new file mode 100644 index 00000000000..84b82929ec5 --- /dev/null +++ b/gdb/config/i386/tm-go32.h @@ -0,0 +1,212 @@ +/* Target-dependent definitions for Intel x86 running DJGPP. + Copyright 1995, 1996, 1997 Free Software Foundation, Inc. + +This file is part of GDB. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "i386/tm-i386v.h" + +/* Number of machine registers. */ + +#undef NUM_FREGS +#define NUM_FREGS 15 +#undef NUM_REGS +#define NUM_REGS (16+NUM_FREGS) + +/* Initializer for an array of names of registers. There should be + NUM_REGS strings in this initializer. */ + +/* The order of the first 8 registers must match the compiler's + numbering scheme (which is the same as the 386 scheme). */ + +#undef REGISTER_NAMES +#define REGISTER_NAMES { "eax", "ecx", "edx", "ebx", \ + "esp", "ebp", "esi", "edi", \ + "eip", "eflags","cs", "ss", \ + "ds", "es", "fs", "gs", \ + "st0", "st1", "st2", "st3", \ + "st4", "st5", "st6", "st7", \ + "fctrl","fstat", "ftag", "fcs", \ + "fopsel","fip", "fopoff" } + +#undef FP_REGNUM +#define FP_REGNUM 5 /* (ebp) Contains addr of stack frame */ +#undef SP_REGNUM +#define SP_REGNUM 4 /* (usp) Contains address of top of stack */ +#undef PS_REGNUM +#define PS_REGNUM 9 /* (ps) Contains processor status */ +#undef PC_REGNUM +#define PC_REGNUM 8 /* (eip) Contains program counter */ +#undef FP0_REGNUM +#define FP0_REGNUM 16 /* Floating point register 0 */ +#undef FPC_REGNUM +#define FPC_REGNUM 24 /* 80387 control register */ +#undef FPCWD_REGNUM +#define FPCWD_REGNUM FPC_REGNUM +#undef FPSWD_REGNUM +#define FPSWD_REGNUM 25 /* 80387 status register */ +#undef FPTWD_REGNUM +#define FPTWD_REGNUM 26 /* 80387 tag register */ +#undef FPIPO_REGNUM +#define FPIPO_REGNUM 29 /* 80387 instruction pointer offset reg */ +#undef FPIPS_REGNUM +#define FPIPS_REGNUM 27 /* 80387 instruction pointer selector reg */ +#undef FPOOS_REGNUM +#define FPOOS_REGNUM 30 /* 80387 operand pointer offset reg */ +#undef FPOPS_REGNUM +#define FPOPS_REGNUM 28 /* 80387 operand pointer selector reg */ + +/* Total amount of space needed to store our copies of the machine's + register state, the array `registers'. */ + +#undef REGISTER_BYTES +#define REGISTER_BYTES (10*4 + 6*2 + 8*10 + 5*2 + 2*4) + +/* Index within `registers' of the first byte of the space for + register N. */ + +#undef REGISTER_BYTE +#define REGBYTE_0 0 +#define REGBYTE_10 (REGBYTE_0+10*4) +#define REGBYTE_16 (REGBYTE_10+6*2) +#define REGBYTE_24 (REGBYTE_16+8*10) +#define REGBYTE_29 (REGBYTE_24+5*2) +#define REGISTER_BYTE(N) (((N) < 10) ? (N) * 4 : \ + (N) < 16 ? REGBYTE_10 +((N) - 10) * 2 : \ + (N) < 24 ? REGBYTE_16 +((N) - 16) * 10 : \ + (N) < 29 ? REGBYTE_24 +((N) - 24) * 2 : \ + REGBYTE_29 + ((N) - 29) * 4) + +/* Number of bytes of storage in the actual machine representation + for register N. */ + +#undef REGISTER_RAW_SIZE +#define REGISTER_RAW_SIZE(N) ((N) < 10 ? 4 : (N) < 16 ? 2 : (N) < 24 ? 10 : \ + (N) < 29 ? 2 : 4) + +/* Number of bytes of storage in the program's representation + for register N. */ + +#undef REGISTER_VIRTUAL_SIZE +#define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N) + +/* Largest value REGISTER_RAW_SIZE can have. */ + +#undef MAX_REGISTER_RAW_SIZE +#define MAX_REGISTER_RAW_SIZE 10 + +/* Largest value REGISTER_VIRTUAL_SIZE can have. */ + +#undef MAX_REGISTER_VIRTUAL_SIZE +#define MAX_REGISTER_VIRTUAL_SIZE 10 + +/* Nonzero if register N requires conversion + from raw format to virtual format. */ + +#undef REGISTER_CONVERTIBLE +#define REGISTER_CONVERTIBLE(N) ((N) < FP0_REGNUM ? 0 :\ + (N) < FPC_REGNUM ? 1 : 0) + +/* The host and target are i386 machines and the compiler supports + long doubles. Long doubles on the host therefore have the same + layout as a 387 FPU stack register. */ + +#if defined(HAVE_LONG_DOUBLE) && defined(HOST_I386) +#undef LD_I387 +#define LD_I387 +#endif + +/* Allow floating point numbers to be specified by a raw long double + 10 hex bytes number, e.g. 1.0 can be input as + 0x3fff8000000000000000 */ + +#ifdef LD_I387 +#define HEX_LONG_DOUBLE_INPUT(base,p,len,target) \ + ((base) == 16 && (len) == 20 \ + && i387_hex_long_double_input ((p), (target))) +#endif + +extern int i387_hex_long_double_input (char *p, long double *putithere); + +#undef REGISTER_CONVERT_TO_VIRTUAL +#ifdef LD_I387 +#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \ +{ \ + if (TYPE == REGISTER_VIRTUAL_TYPE (REGNUM)) \ + { \ + memcpy (TO, FROM, TYPE_LENGTH (TYPE)); \ + } \ + else \ + { \ + long double val = *((long double *)FROM); \ + store_floating ((TO), TYPE_LENGTH (TYPE), val); \ + } \ +} +#else +/* Convert data from raw format for register REGNUM in buffer FROM to + virtual format with type TYPE in buffer TO. */ +#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \ +{ \ + double val; \ + i387_to_double ((FROM), (char *)&val); \ + store_floating ((TO), TYPE_LENGTH (TYPE), val); \ +} +#endif + +extern void i387_to_double PARAMS ((char *, char *)); + +#undef REGISTER_CONVERT_TO_RAW +#ifdef LD_I387 +#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \ +{ \ + if (TYPE == REGISTER_VIRTUAL_TYPE (REGNUM)) \ + { \ + memcpy (TO, FROM, TYPE_LENGTH (TYPE)); \ + } \ + else \ + { \ + long double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \ + *((long double *)TO) = val; \ + } \ +} +#else +#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \ +{ \ + double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \ + double_to_i387((char *)&val, (TO)); \ +} +#endif + +extern void double_to_i387 PARAMS ((char *, char *)); + +/* Return the GDB type object for the "standard" data type of data in + register N. */ + +#undef REGISTER_VIRTUAL_TYPE +#ifdef LD_I387 +#define REGISTER_VIRTUAL_TYPE(N) \ + ((N < FP0_REGNUM) ? builtin_type_int : \ + (N < FPC_REGNUM) ? builtin_type_long_double : builtin_type_int) +#else +#define REGISTER_VIRTUAL_TYPE(N) \ + ((N < FP0_REGNUM) ? builtin_type_int : \ + (N < FPC_REGNUM) ? builtin_type_double : builtin_type_int) +#endif + +#undef TARGET_LONG_DOUBLE_BIT +#define TARGET_LONG_DOUBLE_BIT 96 + +#define NAMES_HAVE_UNDERSCORE diff --git a/gdb/config/tic80/tic80.mt b/gdb/config/tic80/tic80.mt new file mode 100644 index 00000000000..10be27e2633 --- /dev/null +++ b/gdb/config/tic80/tic80.mt @@ -0,0 +1,7 @@ +# Target: TI TMS320C80 (MVP) processor +TDEPFILES= tic80-tdep.o +TM_FILE= tm-tic80.h +SIM_OBS = remote-sim.o +SIM = ../sim/tic80/libsim.a +GDBSERVER_DEPFILES= low-sim.o +GDBSERVER_LIBS = ../../sim/tic80/libsim.a ../../bfd/libbfd.a ../../libiberty/libiberty.a -lm diff --git a/gdb/config/tic80/tm-tic80.h b/gdb/config/tic80/tm-tic80.h new file mode 100644 index 00000000000..e17ca95b838 --- /dev/null +++ b/gdb/config/tic80/tm-tic80.h @@ -0,0 +1,257 @@ +/* Parameters for execution on a TI TMS320C80 (MVP) processor. + Copyright 1997 + Free Software Foundation, Inc. + +This file is part of GDB. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef TM_TIC80_H +#define TM_TIC80_H + +#ifdef __STDC__ /* Forward declare structs used in prototypes */ +struct frame_info; +struct type; +struct value; +struct symbol; +struct frame_saved_regs; +#endif + +#define TARGET_BYTE_ORDER LITTLE_ENDIAN + +/* Define this if the C compiler puts an underscore at the front + of external names before giving them to the linker. */ + +#define NAMES_HAVE_UNDERSCORE + +#define NUM_REGS 38 + +#define REGISTER_NAMES \ +{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ + "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \ + "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \ + "pc", "npc", \ + "a0", "a1", "a2", "a3", \ +} + +/* Various dedicated register numbers + FIXME: Shadow updates in sim/tic80/sim-calls.c */ + +#define SP_REGNUM 1 /* Contains address of top of stack */ +#define ARG0_REGNUM 2 /* Contains argument 1 (r3 has high word) */ +#define RET_REGNUM 2 /* Contains function return value */ +#define ARGLAST_REGNUM 12 /* Contains argument 6 (r13 has high word) */ +#define FP_REGNUM 30 /* Contains address of executing stack frame */ +#define LR_REGNUM 31 /* Contains address of caller (link register) */ +#define PC_REGNUM 32 /* Contains program counter (FIXME?) */ +#define NPC_REGNUM 33 /* Contains the next program counter (FIXME?) */ +#define A0_REGNUM 34 /* Accumulator register 0 */ +#define A3_REGNUM 37 /* Accumulator register 1 */ + +#define R0_REGNUM 0 /* General Purpose Register 0 - for sim */ +#define Rn_REGNUM 31 /* Last General Purpose Register - for sim */ +#define An_REGNUM A3_REGNUM /* Last Accumulator register - for sim */ + +/* Total amount of space needed to store our copies of the machine's + register state, the array `registers'. */ + +#define REGISTER_BYTES (((NUM_REGS - 4) * 4) + (4 * 8)) + +/* Index within `registers' of the first byte of the space for + register N. */ + +#define REGISTER_BYTE(N) \ + (((N) >= A0_REGNUM) ? (((N) - A0_REGNUM) * 8 + A0_REGNUM * 4) : ((N) * 4)) + +/* Most registers are 4 bytes */ + +#define REGISTER_SIZE 4 + +/* Some registers are 8 bytes. */ + +#define REGISTER_RAW_SIZE(N) \ + (((N) >= A0_REGNUM) ? 8 : 4) + +/* Largest value REGISTER_RAW_SIZE can have. */ + +#define MAX_REGISTER_RAW_SIZE (8) + +/* All regs are 4 bytes. */ + +#define REGISTER_VIRTUAL_SIZE(N) (REGISTER_RAW_SIZE(N)) + +/* Largest value REGISTER_VIRTUAL_SIZE can have. */ + +#define MAX_REGISTER_VIRTUAL_SIZE (MAX_REGISTER_RAW_SIZE) + +/* Return the GDB type object for the "standard" data type + of data in register N. */ + +#define REGISTER_VIRTUAL_TYPE(N) /* FIXME? */ \ + (((N) >= A0_REGNUM) ? builtin_type_float : builtin_type_int) + +/* Offset from address of function to start of its code. + Zero on most machines. */ + +#define FUNCTION_START_OFFSET 0 + +/* Stack grows downward. */ + +#define INNER_THAN(lhs,rhs) ((lhs) < (rhs)) + +/* Sequence of bytes for breakpoint instruction. + This is padded out to the size of a machine word. */ + +#define BREAKPOINT {0x49, 0x80, 0x00, 0x00} /* FIXME! */ + +/* Amount PC must be decremented by after a breakpoint. + This is often the number of bytes in BREAKPOINT + but not always. */ + +#define DECR_PC_AFTER_BREAK 0 /* FIXME! */ + +/* Discard from the stack the innermost frame, restoring all registers. */ + +#define POP_FRAME tic80_pop_frame(get_current_frame ()) +extern struct frame_info *tic80_pop_frame PARAMS ((struct frame_info *frame)); + +/* Return number of bytes at start of arglist that are not really args. */ + +#define FRAME_ARGS_SKIP 0 + +/* Set VAL to the number of args passed to frame described by FI. + Can set VAL to -1, meaning no way to tell. */ +/* We can't tell how many args there are */ + +#define FRAME_NUM_ARGS(val,fi) (val = -1) + +#define FRAME_ARGS_SKIP 0 +#define FRAME_ARGS_ADDRESS(fi) (fi)->frame +#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame + +/* Define other aspects of the stack frame. + We keep the offsets of all saved registers, 'cause we need 'em a lot! + We also keep the current size of the stack frame, and the offset of + the frame pointer from the stack pointer (for frameless functions, and + when we're still in the prologue of a function with a frame) */ + +#define EXTRA_FRAME_INFO \ + struct frame_saved_regs fsr; \ + int framesize; \ + int frameoffset; \ + int framereg; + +extern void tic80_init_extra_frame_info PARAMS ((struct frame_info *fi)); +#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) tic80_init_extra_frame_info (fi) +#define INIT_FRAME_PC /* Not necessary */ + +/* Put here the code to store, into a struct frame_saved_regs, + the addresses of the saved registers of frame described by FRAME_INFO. + This includes special registers such as pc and fp saved in special + ways in the stack frame. sp is even more special: + the address we return for it IS the sp for the next frame. */ + +#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \ + tic80_frame_find_saved_regs(frame_info, &(frame_saved_regs)) +extern void tic80_frame_find_saved_regs PARAMS ((struct frame_info *, struct frame_saved_regs *)); + +/* Advance PC across any function entry prologue instructions + to reach some "real" code. */ + +#define SKIP_PROLOGUE(pc) { (pc) = tic80_skip_prologue (pc); } +extern CORE_ADDR tic80_skip_prologue PARAMS ((CORE_ADDR pc)); + +/* Immediately after a function call, return the saved pc. + Can't always go through the frames for this because on some machines + the new frame is not set up until the new function executes + some instructions. */ + +#define SAVED_PC_AFTER_CALL(frame) read_register (LR_REGNUM) + +/* Describe the pointer in each stack frame to the previous stack frame + (its caller). */ + +/* FRAME_CHAIN takes a frame's nominal address + and produces the frame's chain-pointer. */ + +#define FRAME_CHAIN(thisframe) (CORE_ADDR) tic80_frame_chain (thisframe) +extern CORE_ADDR tic80_frame_chain PARAMS ((struct frame_info *)); + +#define FRAME_SAVED_PC(FRAME) tic80_frame_saved_pc (FRAME) +extern CORE_ADDR tic80_frame_saved_pc PARAMS ((struct frame_info *)); + +/* Store the address of the place in which to copy the structure the + subroutine will return. This is called from call_function. + + We store structs through a pointer passed in R2 */ + +#define STORE_STRUCT_RETURN(STRUCT_ADDR, SP) \ + write_register (ARG0_REGNUM, STRUCT_ADDR) + +/* Extract from an array REGBUF containing the (raw) register state + a function return value of type TYPE, and copy that, in virtual format, + into VALBUF. */ + +#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \ + memcpy ((VALBUF), \ + (char *)(REGBUF) + REGISTER_BYTE (RET_REGNUM) + \ + ((TYPE_LENGTH (TYPE) > 4 ? 8 : 4) - TYPE_LENGTH (TYPE)), \ + TYPE_LENGTH (TYPE)) + +/* Write into appropriate registers a function return value + of type TYPE, given in virtual format. */ + +#define STORE_RETURN_VALUE(TYPE,VALBUF) \ + write_register_bytes(REGISTER_BYTE (RET_REGNUM) + \ + ((TYPE_LENGTH (TYPE) > 4 ? 8:4) - TYPE_LENGTH (TYPE)),\ + (VALBUF), TYPE_LENGTH (TYPE)); + + + +/* PUSH_ARGUMENTS */ +extern CORE_ADDR tic80_push_arguments PARAMS ((int nargs, + struct value **args, + CORE_ADDR sp, + unsigned char struct_return, + CORE_ADDR struct_addr)); + +#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \ + (SP) = tic80_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) + +/* PUSH_RETURN_ADDRESS */ +extern CORE_ADDR tic80_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR)); +#define PUSH_RETURN_ADDRESS(PC, SP) tic80_push_return_address (PC, SP) + +/* override the standard get_saved_register function with + one that takes account of generic CALL_DUMMY frames */ +#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \ + generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval) + +#define USE_GENERIC_DUMMY_FRAMES 1 +#define CALL_DUMMY {0} +#define CALL_DUMMY_LENGTH (0) +#define CALL_DUMMY_START_OFFSET (0) +#define CALL_DUMMY_BREAKPOINT_OFFSET (0) +#define FIX_CALL_DUMMY(DUMMY1, STARTADDR, FUNADDR, NARGS, ARGS, TYPE, GCCP) +#define CALL_DUMMY_LOCATION AT_ENTRY_POINT +#define CALL_DUMMY_ADDRESS() entry_point_address () + +/* generic dummy frame stuff */ + +#define PUSH_DUMMY_FRAME generic_push_dummy_frame () +#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP) + +#endif /* TM_TIC80_H */ |