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-rw-r--r--opcodes/m32r-desc.c75
1 files changed, 28 insertions, 47 deletions
diff --git a/opcodes/m32r-desc.c b/opcodes/m32r-desc.c
index e0d7b1f6b2f..3b8cb56c7c9 100644
--- a/opcodes/m32r-desc.c
+++ b/opcodes/m32r-desc.c
@@ -1209,27 +1209,23 @@ static const CGEN_IBASE m32r_cgen_insn_table[MAX_INSNS] =
#undef A
/* Initialize anything needed to be done once, before any cpu_open call. */
-static void init_tables PARAMS ((void));
static void
-init_tables ()
+init_tables (void)
{
}
-static const CGEN_MACH * lookup_mach_via_bfd_name
- PARAMS ((const CGEN_MACH *, const char *));
-static void build_hw_table PARAMS ((CGEN_CPU_TABLE *));
-static void build_ifield_table PARAMS ((CGEN_CPU_TABLE *));
-static void build_operand_table PARAMS ((CGEN_CPU_TABLE *));
-static void build_insn_table PARAMS ((CGEN_CPU_TABLE *));
-static void m32r_cgen_rebuild_tables PARAMS ((CGEN_CPU_TABLE *));
+static const CGEN_MACH * lookup_mach_via_bfd_name (const CGEN_MACH *, const char *);
+static void build_hw_table (CGEN_CPU_TABLE *);
+static void build_ifield_table (CGEN_CPU_TABLE *);
+static void build_operand_table (CGEN_CPU_TABLE *);
+static void build_insn_table (CGEN_CPU_TABLE *);
+static void m32r_cgen_rebuild_tables (CGEN_CPU_TABLE *);
/* Subroutine of m32r_cgen_cpu_open to look up a mach via its bfd name. */
static const CGEN_MACH *
-lookup_mach_via_bfd_name (table, name)
- const CGEN_MACH *table;
- const char *name;
+lookup_mach_via_bfd_name (const CGEN_MACH *table, const char *name)
{
while (table->name)
{
@@ -1243,8 +1239,7 @@ lookup_mach_via_bfd_name (table, name)
/* Subroutine of m32r_cgen_cpu_open to build the hardware table. */
static void
-build_hw_table (cd)
- CGEN_CPU_TABLE *cd;
+build_hw_table (CGEN_CPU_TABLE *cd)
{
int i;
int machs = cd->machs;
@@ -1270,8 +1265,7 @@ build_hw_table (cd)
/* Subroutine of m32r_cgen_cpu_open to build the hardware table. */
static void
-build_ifield_table (cd)
- CGEN_CPU_TABLE *cd;
+build_ifield_table (CGEN_CPU_TABLE *cd)
{
cd->ifld_table = & m32r_cgen_ifld_table[0];
}
@@ -1279,8 +1273,7 @@ build_ifield_table (cd)
/* Subroutine of m32r_cgen_cpu_open to build the hardware table. */
static void
-build_operand_table (cd)
- CGEN_CPU_TABLE *cd;
+build_operand_table (CGEN_CPU_TABLE *cd)
{
int i;
int machs = cd->machs;
@@ -1288,8 +1281,7 @@ build_operand_table (cd)
/* MAX_OPERANDS is only an upper bound on the number of selected entries.
However each entry is indexed by it's enum so there can be holes in
the table. */
- const CGEN_OPERAND **selected =
- (const CGEN_OPERAND **) xmalloc (MAX_OPERANDS * sizeof (CGEN_OPERAND *));
+ const CGEN_OPERAND **selected = xmalloc (MAX_OPERANDS * sizeof (* selected));
cd->operand_table.init_entries = init;
cd->operand_table.entry_size = sizeof (CGEN_OPERAND);
@@ -1312,12 +1304,11 @@ build_operand_table (cd)
operand elements to be in the table [which they mightn't be]. */
static void
-build_insn_table (cd)
- CGEN_CPU_TABLE *cd;
+build_insn_table (CGEN_CPU_TABLE *cd)
{
int i;
const CGEN_IBASE *ib = & m32r_cgen_insn_table[0];
- CGEN_INSN *insns = (CGEN_INSN *) xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
+ CGEN_INSN *insns = xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN));
for (i = 0; i < MAX_INSNS; ++i)
@@ -1330,8 +1321,7 @@ build_insn_table (cd)
/* Subroutine of m32r_cgen_cpu_open to rebuild the tables. */
static void
-m32r_cgen_rebuild_tables (cd)
- CGEN_CPU_TABLE *cd;
+m32r_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
{
int i;
unsigned int isas = cd->isas;
@@ -1343,7 +1333,7 @@ m32r_cgen_rebuild_tables (cd)
#define UNSET (CGEN_SIZE_UNKNOWN + 1)
cd->default_insn_bitsize = UNSET;
cd->base_insn_bitsize = UNSET;
- cd->min_insn_bitsize = 65535; /* some ridiculously big number */
+ cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */
cd->max_insn_bitsize = 0;
for (i = 0; i < MAX_ISAS; ++i)
if (((1 << i) & isas) != 0)
@@ -1355,7 +1345,7 @@ m32r_cgen_rebuild_tables (cd)
if (cd->default_insn_bitsize == UNSET)
cd->default_insn_bitsize = isa->default_insn_bitsize;
else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
- ; /* this is ok */
+ ; /* This is ok. */
else
cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;
@@ -1364,7 +1354,7 @@ m32r_cgen_rebuild_tables (cd)
if (cd->base_insn_bitsize == UNSET)
cd->base_insn_bitsize = isa->base_insn_bitsize;
else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
- ; /* this is ok */
+ ; /* This is ok. */
else
cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN;
@@ -1476,12 +1466,12 @@ m32r_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
}
va_end (ap);
- /* mach unspecified means "all" */
+ /* Mach unspecified means "all". */
if (machs == 0)
machs = (1 << MAX_MACHS) - 1;
- /* base mach is always selected */
+ /* Base mach is always selected. */
machs |= 1;
- /* isa unspecified means "all" */
+ /* ISA unspecified means "all". */
if (isas == 0)
isas = (1 << MAX_ISAS) - 1;
if (endian == CGEN_ENDIAN_UNKNOWN)
@@ -1514,9 +1504,7 @@ m32r_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
MACH_NAME is the bfd name of the mach. */
CGEN_CPU_DESC
-m32r_cgen_cpu_open_1 (mach_name, endian)
- const char *mach_name;
- enum cgen_endian endian;
+m32r_cgen_cpu_open_1 (const char *mach_name, enum cgen_endian endian)
{
return m32r_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name,
CGEN_CPU_OPEN_ENDIAN, endian,
@@ -1529,8 +1517,7 @@ m32r_cgen_cpu_open_1 (mach_name, endian)
place as some simulator ports use this but they don't use libopcodes. */
void
-m32r_cgen_cpu_close (cd)
- CGEN_CPU_DESC cd;
+m32r_cgen_cpu_close (CGEN_CPU_DESC cd)
{
unsigned int i;
const CGEN_INSN *insns;
@@ -1539,23 +1526,17 @@ m32r_cgen_cpu_close (cd)
{
insns = cd->macro_insn_table.init_entries;
for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
- {
- if (CGEN_INSN_RX ((insns)))
- regfree (CGEN_INSN_RX (insns));
- }
+ if (CGEN_INSN_RX ((insns)))
+ regfree (CGEN_INSN_RX (insns));
}
if (cd->insn_table.init_entries)
{
insns = cd->insn_table.init_entries;
for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
- {
- if (CGEN_INSN_RX (insns))
- regfree (CGEN_INSN_RX (insns));
- }
- }
-
-
+ if (CGEN_INSN_RX (insns))
+ regfree (CGEN_INSN_RX (insns));
+ }
if (cd->macro_insn_table.init_entries)
free ((CGEN_INSN *) cd->macro_insn_table.init_entries);
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