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-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/i386-dis.c6
2 files changed, 11 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9bebc480cd2..ee62f002fee 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (o_mode): New for 16-byte operand.
+ (intel_operand_size): Generate "OWORD PTR " for o_mode.
+ (CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.
+
2006-12-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (CMPXCHG8B_Fixup): New.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 009d0f63589..eb751bce81b 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -356,6 +356,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define const_1_mode 14
#define stack_v_mode 15 /* v_mode for stack-related opcodes. */
#define z_mode 16 /* non-quad operand size depends on prefixes */
+#define o_mode 17 /* 16-byte operand */
#define es_reg 100
#define cs_reg 101
@@ -4183,6 +4184,9 @@ intel_operand_size (int bytemode, int sizeflag)
case x_mode:
oappend ("XMMWORD PTR ");
break;
+ case o_mode:
+ oappend ("OWORD PTR ");
+ break;
default:
break;
}
@@ -5778,7 +5782,7 @@ CMPXCHG8B_Fixup (int bytemode, int sizeflag)
/* Change cmpxchg8b to cmpxchg16b. */
char *p = obuf + strlen (obuf) - 2;
strcpy (p, "16b");
- bytemode = x_mode;
+ bytemode = o_mode;
}
OP_M (bytemode, sizeflag);
}