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-rw-r--r--opcodes/ChangeLog7
-rw-r--r--opcodes/Makefile.am16
-rw-r--r--opcodes/Makefile.in16
-rw-r--r--opcodes/configure.in2
4 files changed, 24 insertions, 17 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d4a2b41ab05..1503fa4dab5 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
+
+ * Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt.
+ * Makefile.in: Rebuilt.
+ * configure.in: Replace ms1 files with mt files.
+ * configure: Rebuilt.
+
2005-12-08 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (MAXLEN): Reduce to architectural limit.
diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am
index 1c3c7870b0c..ff3f0c28a5d 100644
--- a/opcodes/Makefile.am
+++ b/opcodes/Makefile.am
@@ -378,7 +378,7 @@ uninstall_libopcodes:
CLEANFILES = \
stamp-ip2k stamp-m32c stamp-m32r stamp-fr30 stamp-frv \
- stamp-openrisc stamp-iq2000 stamp-ms1 stamp-xstormy16 \
+ stamp-openrisc stamp-iq2000 stamp-mt stamp-xstormy16 \
libopcodes.a stamp-lib dep.sed DEP DEPA DEP1 DEP2
@@ -394,7 +394,7 @@ CGENDEPS = \
$(CGENDIR)/opc-opinst.scm \
cgen-asm.in cgen-dis.in cgen-ibld.in
-CGEN_CPUS = fr30 frv ip2k m32c m32r ms1 openrisc xstormy16
+CGEN_CPUS = fr30 frv ip2k m32c m32r mt openrisc xstormy16
if CGEN_MAINT
IP2K_DEPS = stamp-ip2k
@@ -402,7 +402,7 @@ M32C_DEPS = stamp-m32c
M32R_DEPS = stamp-m32r
FR30_DEPS = stamp-fr30
FRV_DEPS = stamp-frv
-MS1_DEPS = stamp-ms1
+MT_DEPS = stamp-mt
OPENRISC_DEPS = stamp-openrisc
IQ2000_DEPS = stamp-iq2000
XSTORMY16_DEPS = stamp-xstormy16
@@ -412,7 +412,7 @@ M32C_DEPS =
M32R_DEPS =
FR30_DEPS =
FRV_DEPS =
-MS1_DEPS =
+MT_DEPS =
OPENRISC_DEPS =
IQ2000_DEPS =
XSTORMY16_DEPS =
@@ -484,12 +484,12 @@ stamp-frv: $(CGENDEPS) $(srcdir)/../cpu/frv.cpu $(srcdir)/../cpu/frv.opc
$(MAKE) run-cgen arch=frv prefix=frv options= \
archfile=$(srcdir)/../cpu/frv.cpu opcfile=$(srcdir)/../cpu/frv.opc extrafiles=
-$(srcdir)/ms1-desc.h $(srcdir)/ms1-desc.c $(srcdir)/ms1-opc.h $(srcdir)/ms1-opc.c $(srcdir)/ms1-ibld.c $(srcdir)/ms1-asm.c $(srcdir)/ms1-dis.c: $(MS1_DEPS)
+$(srcdir)/ms1-desc.h $(srcdir)/ms1-desc.c $(srcdir)/ms1-opc.h $(srcdir)/ms1-opc.c $(srcdir)/ms1-ibld.c $(srcdir)/ms1-asm.c $(srcdir)/ms1-dis.c: $(MT_DEPS)
@true
-stamp-ms1: $(CGENDEPS) $(srcdir)/../cpu/ms1.cpu $(srcdir)/../cpu/ms1.opc
+stamp-mt: $(CGENDEPS) $(srcdir)/../cpu/mt.cpu $(srcdir)/../cpu/mt.opc
$(MAKE) run-cgen arch=ms1 prefix=ms1 options= \
- archfile=$(srcdir)/../cpu/ms1.cpu \
- opcfile=$(srcdir)/../cpu/ms1.opc extrafiles=
+ archfile=$(srcdir)/../cpu/mt.cpu \
+ opcfile=$(srcdir)/../cpu/mt.opc extrafiles=
$(srcdir)/openrisc-desc.h $(srcdir)/openrisc-desc.c $(srcdir)/openrisc-opc.h $(srcdir)/openrisc-opc.c $(srcdir)/openrisc-ibld.c $(srcdir)/openrisc-asm.c $(srcdir)/openrisc-dis.c: $(OPENRISC_DEPS)
@true
diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in
index e960a7dcb0b..091a85038e0 100644
--- a/opcodes/Makefile.in
+++ b/opcodes/Makefile.in
@@ -554,7 +554,7 @@ noinst_LIBRARIES = libopcodes.a
POTFILES = $(HFILES) $(CFILES)
CLEANFILES = \
stamp-ip2k stamp-m32c stamp-m32r stamp-fr30 stamp-frv \
- stamp-openrisc stamp-iq2000 stamp-ms1 stamp-xstormy16 \
+ stamp-openrisc stamp-iq2000 stamp-mt stamp-xstormy16 \
libopcodes.a stamp-lib dep.sed DEP DEPA DEP1 DEP2
CGENDIR = @cgendir@
@@ -568,7 +568,7 @@ CGENDEPS = \
$(CGENDIR)/opc-opinst.scm \
cgen-asm.in cgen-dis.in cgen-ibld.in
-CGEN_CPUS = fr30 frv ip2k m32c m32r ms1 openrisc xstormy16
+CGEN_CPUS = fr30 frv ip2k m32c m32r mt openrisc xstormy16
@CGEN_MAINT_FALSE@IP2K_DEPS =
@CGEN_MAINT_TRUE@IP2K_DEPS = stamp-ip2k
@CGEN_MAINT_FALSE@M32C_DEPS =
@@ -579,8 +579,8 @@ CGEN_CPUS = fr30 frv ip2k m32c m32r ms1 openrisc xstormy16
@CGEN_MAINT_TRUE@FR30_DEPS = stamp-fr30
@CGEN_MAINT_FALSE@FRV_DEPS =
@CGEN_MAINT_TRUE@FRV_DEPS = stamp-frv
-@CGEN_MAINT_FALSE@MS1_DEPS =
-@CGEN_MAINT_TRUE@MS1_DEPS = stamp-ms1
+@CGEN_MAINT_FALSE@MT_DEPS =
+@CGEN_MAINT_TRUE@MT_DEPS = stamp-mt
@CGEN_MAINT_FALSE@OPENRISC_DEPS =
@CGEN_MAINT_TRUE@OPENRISC_DEPS = stamp-openrisc
@CGEN_MAINT_FALSE@IQ2000_DEPS =
@@ -1026,12 +1026,12 @@ stamp-frv: $(CGENDEPS) $(srcdir)/../cpu/frv.cpu $(srcdir)/../cpu/frv.opc
$(MAKE) run-cgen arch=frv prefix=frv options= \
archfile=$(srcdir)/../cpu/frv.cpu opcfile=$(srcdir)/../cpu/frv.opc extrafiles=
-$(srcdir)/ms1-desc.h $(srcdir)/ms1-desc.c $(srcdir)/ms1-opc.h $(srcdir)/ms1-opc.c $(srcdir)/ms1-ibld.c $(srcdir)/ms1-asm.c $(srcdir)/ms1-dis.c: $(MS1_DEPS)
+$(srcdir)/ms1-desc.h $(srcdir)/ms1-desc.c $(srcdir)/ms1-opc.h $(srcdir)/ms1-opc.c $(srcdir)/ms1-ibld.c $(srcdir)/ms1-asm.c $(srcdir)/ms1-dis.c: $(MT_DEPS)
@true
-stamp-ms1: $(CGENDEPS) $(srcdir)/../cpu/ms1.cpu $(srcdir)/../cpu/ms1.opc
+stamp-mt: $(CGENDEPS) $(srcdir)/../cpu/mt.cpu $(srcdir)/../cpu/mt.opc
$(MAKE) run-cgen arch=ms1 prefix=ms1 options= \
- archfile=$(srcdir)/../cpu/ms1.cpu \
- opcfile=$(srcdir)/../cpu/ms1.opc extrafiles=
+ archfile=$(srcdir)/../cpu/mt.cpu \
+ opcfile=$(srcdir)/../cpu/mt.opc extrafiles=
$(srcdir)/openrisc-desc.h $(srcdir)/openrisc-desc.c $(srcdir)/openrisc-opc.h $(srcdir)/openrisc-opc.c $(srcdir)/openrisc-ibld.c $(srcdir)/openrisc-asm.c $(srcdir)/openrisc-dis.c: $(OPENRISC_DEPS)
@true
diff --git a/opcodes/configure.in b/opcodes/configure.in
index 8823aeff344..7ed93e24cad 100644
--- a/opcodes/configure.in
+++ b/opcodes/configure.in
@@ -187,7 +187,7 @@ if test x${all_targets} = xfalse ; then
bfd_mmix_arch) ta="$ta mmix-dis.lo mmix-opc.lo" ;;
bfd_mn10200_arch) ta="$ta m10200-dis.lo m10200-opc.lo" ;;
bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;;
- bfd_ms1_arch) ta="$ta ms1-asm.lo ms1-desc.lo ms1-dis.lo ms1-ibld.lo ms1-opc.lo" using_cgen=yes ;;
+ bfd_ms1_arch) ta="$ta mt-asm.lo ms1-desc.lo ms1-dis.lo ms1-ibld.lo ms1-opc.lo" using_cgen=yes ;;
bfd_msp430_arch) ta="$ta msp430-dis.lo" ;;
bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;