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Diffstat (limited to 'sim/common/cgen-par.c')
-rw-r--r--sim/common/cgen-par.c41
1 files changed, 36 insertions, 5 deletions
diff --git a/sim/common/cgen-par.c b/sim/common/cgen-par.c
index d6450db0aba..e2af54e873b 100644
--- a/sim/common/cgen-par.c
+++ b/sim/common/cgen-par.c
@@ -29,6 +29,7 @@ void sim_queue_bi_write (SIM_CPU *cpu, BI *target, BI value)
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
element->kind = CGEN_BI_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
element->kinds.bi_write.target = target;
element->kinds.bi_write.value = value;
}
@@ -38,6 +39,7 @@ void sim_queue_qi_write (SIM_CPU *cpu, UQI *target, UQI value)
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
element->kind = CGEN_QI_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
element->kinds.qi_write.target = target;
element->kinds.qi_write.value = value;
}
@@ -47,6 +49,7 @@ void sim_queue_si_write (SIM_CPU *cpu, SI *target, SI value)
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
element->kind = CGEN_SI_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
element->kinds.si_write.target = target;
element->kinds.si_write.value = value;
}
@@ -56,6 +59,7 @@ void sim_queue_sf_write (SIM_CPU *cpu, SI *target, SF value)
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
element->kind = CGEN_SF_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
element->kinds.sf_write.target = target;
element->kinds.sf_write.value = value;
}
@@ -65,6 +69,7 @@ void sim_queue_pc_write (SIM_CPU *cpu, USI value)
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
element->kind = CGEN_PC_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
element->kinds.pc_write.value = value;
}
@@ -78,6 +83,7 @@ void sim_queue_fn_hi_write (
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
element->kind = CGEN_FN_HI_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
element->kinds.fn_hi_write.function = write_function;
element->kinds.fn_hi_write.regno = regno;
element->kinds.fn_hi_write.value = value;
@@ -93,6 +99,7 @@ void sim_queue_fn_si_write (
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
element->kind = CGEN_FN_SI_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
element->kinds.fn_si_write.function = write_function;
element->kinds.fn_si_write.regno = regno;
element->kinds.fn_si_write.value = value;
@@ -108,6 +115,7 @@ void sim_queue_fn_di_write (
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
element->kind = CGEN_FN_DI_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
element->kinds.fn_di_write.function = write_function;
element->kinds.fn_di_write.regno = regno;
element->kinds.fn_di_write.value = value;
@@ -123,16 +131,32 @@ void sim_queue_fn_df_write (
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
element->kind = CGEN_FN_DF_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
element->kinds.fn_df_write.function = write_function;
element->kinds.fn_df_write.regno = regno;
element->kinds.fn_df_write.value = value;
}
+void sim_queue_fn_pc_write (
+ SIM_CPU *cpu,
+ void (*write_function)(SIM_CPU *cpu, USI),
+ USI value
+)
+{
+ CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+ CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+ element->kind = CGEN_FN_PC_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
+ element->kinds.fn_pc_write.function = write_function;
+ element->kinds.fn_pc_write.value = value;
+}
+
void sim_queue_mem_qi_write (SIM_CPU *cpu, SI address, QI value)
{
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
element->kind = CGEN_MEM_QI_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
element->kinds.mem_qi_write.address = address;
element->kinds.mem_qi_write.value = value;
}
@@ -142,6 +166,7 @@ void sim_queue_mem_hi_write (SIM_CPU *cpu, SI address, HI value)
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
element->kind = CGEN_MEM_HI_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
element->kinds.mem_hi_write.address = address;
element->kinds.mem_hi_write.value = value;
}
@@ -151,6 +176,7 @@ void sim_queue_mem_si_write (SIM_CPU *cpu, SI address, SI value)
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
element->kind = CGEN_MEM_SI_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
element->kinds.mem_si_write.address = address;
element->kinds.mem_si_write.value = value;
}
@@ -160,6 +186,7 @@ void sim_queue_mem_di_write (SIM_CPU *cpu, SI address, DI value)
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
element->kind = CGEN_MEM_DI_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
element->kinds.mem_di_write.address = address;
element->kinds.mem_di_write.value = value;
}
@@ -169,6 +196,7 @@ void sim_queue_mem_df_write (SIM_CPU *cpu, SI address, DF value)
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
element->kind = CGEN_MEM_DF_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
element->kinds.mem_df_write.address = address;
element->kinds.mem_df_write.value = value;
}
@@ -215,28 +243,31 @@ cgen_write_queue_element_execute (SIM_CPU *cpu, CGEN_WRITE_QUEUE_ELEMENT *item)
item->kinds.fn_df_write.regno,
item->kinds.fn_df_write.value);
break;
+ case CGEN_FN_PC_WRITE:
+ item->kinds.fn_pc_write.function (cpu, item->kinds.fn_pc_write.value);
+ break;
case CGEN_MEM_QI_WRITE:
- pc = CPU_PC_GET (cpu);
+ pc = item->insn_address;
SETMEMQI (cpu, pc, item->kinds.mem_qi_write.address,
item->kinds.mem_qi_write.value);
break;
case CGEN_MEM_HI_WRITE:
- pc = CPU_PC_GET (cpu);
+ pc = item->insn_address;
SETMEMHI (cpu, pc, item->kinds.mem_hi_write.address,
item->kinds.mem_hi_write.value);
break;
case CGEN_MEM_SI_WRITE:
- pc = CPU_PC_GET (cpu);
+ pc = item->insn_address;
SETMEMSI (cpu, pc, item->kinds.mem_si_write.address,
item->kinds.mem_si_write.value);
break;
case CGEN_MEM_DI_WRITE:
- pc = CPU_PC_GET (cpu);
+ pc = item->insn_address;
SETMEMDI (cpu, pc, item->kinds.mem_di_write.address,
item->kinds.mem_di_write.value);
break;
case CGEN_MEM_DF_WRITE:
- pc = CPU_PC_GET (cpu);
+ pc = item->insn_address;
SETMEMDF (cpu, pc, item->kinds.mem_df_write.address,
item->kinds.mem_df_write.value);
break;
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