diff options
Diffstat (limited to 'sim/fr30')
| -rw-r--r-- | sim/fr30/ChangeLog | 412 | ||||
| -rw-r--r-- | sim/fr30/Makefile.in | 107 | ||||
| -rw-r--r-- | sim/fr30/README | 14 | ||||
| -rw-r--r-- | sim/fr30/TODO | 14 | ||||
| -rw-r--r-- | sim/fr30/arch.c | 35 | ||||
| -rw-r--r-- | sim/fr30/arch.h | 45 | ||||
| -rw-r--r-- | sim/fr30/config.in | 162 | ||||
| -rw-r--r-- | sim/fr30/configure | 4294 | ||||
| -rw-r--r-- | sim/fr30/configure.in | 16 | ||||
| -rw-r--r-- | sim/fr30/cpu.c | 357 | ||||
| -rw-r--r-- | sim/fr30/cpu.h | 890 | ||||
| -rw-r--r-- | sim/fr30/cpuall.h | 66 | ||||
| -rw-r--r-- | sim/fr30/decode.c | 2956 | ||||
| -rw-r--r-- | sim/fr30/decode.h | 125 | ||||
| -rw-r--r-- | sim/fr30/devices.c | 98 | ||||
| -rw-r--r-- | sim/fr30/fr30-sim.h | 96 | ||||
| -rw-r--r-- | sim/fr30/fr30.c | 423 | ||||
| -rw-r--r-- | sim/fr30/mloop.in | 236 | ||||
| -rw-r--r-- | sim/fr30/model.c | 4004 | ||||
| -rw-r--r-- | sim/fr30/sem-switch.c | 5409 | ||||
| -rw-r--r-- | sim/fr30/sem.c | 5730 | ||||
| -rw-r--r-- | sim/fr30/sim-if.c | 208 | ||||
| -rw-r--r-- | sim/fr30/sim-main.h | 70 | ||||
| -rw-r--r-- | sim/fr30/tconfig.in | 42 | ||||
| -rw-r--r-- | sim/fr30/traps.c | 218 |
25 files changed, 0 insertions, 26027 deletions
diff --git a/sim/fr30/ChangeLog b/sim/fr30/ChangeLog deleted file mode 100644 index ed8f8af10d5..00000000000 --- a/sim/fr30/ChangeLog +++ /dev/null @@ -1,412 +0,0 @@ -2001-07-05 Ben Elliston <bje@redhat.com> - - * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR). - (stamp-cpu): Likewise. - -2001-03-05 Dave Brolley <brolley@redhat.com> - - * arch.c: Regenerate. - * arch.h: Regenerate. - * cpu.c: Regenerate. - * cpu.h: Regenerate. - * cpuall.h: Regenerate. - * decode.c: Regenerate. - * decode.h: Regenerate. - * model.c: Regenerate. - * sem-switch.c: Regenerate. - * sem.c: Regenerate. - -2001-01-12 Frank Ch. Eigler <fche@redhat.com> - - * configure: Regenerated with sim_scache fix. - -2000-11-18 Greg McGary <greg@mcgary.org> - - * Makefile.in: remove `@true' commands for rules that have - $(CGEN_MAINT) as a prerequisite. - -2000-10-06 Dave Brolley <brolley@redhat.com> - - * sem.c: Regenerated. - * sem-switch.c: Regenerated. - -2000-08-28 Dave Brolley <brolley@redhat.com> - - * cpu.h: Regenerated. - * decode.c: Regenerated. - -2000-08-21 Frank Ch. Eigler <fche@redhat.com> - - * Makefile.in (fr30-clean): Add stamp-arch, stamp-cpu. - (stamp-arch, stamp-cpu): New targets. - -Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -2000-03-30 Dave Brolley <brolley@redhat.com> - - * configure: Regenerated. - -1999-10-04 Doug Evans <devans@casey.cygnus.com> - - * sem.c,sem-switch.c: Rebuild. - * traps.c (sim_engine_invalid_insn): New arg `vpc'. Change type of - result to SEM_PC. Return vpc. - -Wed Sep 29 14:45:32 1999 Dave Brolley <brolley@cygnus.com> - - * traps.c (sim_engine_invalid_insn): Return PC. - -Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -1999-08-31 Doug Evans <devans@casey.cygnus.com> - - * sem.c: Rebuild. - -1999-08-09 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild. - -1999-08-04 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,cpuall.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild. - -1999-07-06 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,decode.h,model.c,sem-switch.c,sem.c: Rebuild. - -1999-05-08 Felix Lee <flee@cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Fri Apr 16 16:50:31 1999 Doug Evans <devans@charmed.cygnus.com> - - * devices.c (device_io_read_buffer): New arg `sd'. - (device_io_write_buffer): New arg `sd'. - (device_error): Give proper arg spec. - -1999-04-10 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,sem-switch.c,sem.c: Rebuild. - -1999-03-27 Doug Evans <devans@casey.cygnus.com> - - * decode.c: Rebuild. - -1999-03-22 Doug Evans <devans@casey.cygnus.com> - - * arch.c,arch.h,model.c: Rebuild. - * fr30.c (fr30bf_fetch_register): Replace calls to a_fr30_h_* with - calls to fr30bf_h_*. - (fr30bf_store_register): Ditto. - * traps.c (setup_int): Ditto. - * sim-if.c (sim_open): Update call to fr30_cgen_cpu_open. - -Mon Mar 22 13:13:05 1999 Dave Brolley <brolley@cygnus.com> - - * configure.in: Use SIM_AC_OPTION_ALIGNMENT(FORCED_ALIGNMENT). - * configure: Regenerate. - * cpu.h: Regenerate. - -1999-03-11 Doug Evans <devans@casey.cygnus.com> - - * arch.c,arch.h,cpu.c,cpu.h: Rebuild. - * fr30-sim.h (GET_H_SBIT,SET_H_SBIT): Delete. - (GET_H_CCR,SET_H_CCR,GET_H_SCR,SET_H_SCR,GET_H_ILM,SET_H_ILM): Delete. - (GET_H_PS,SET_H_PS,GET_H_DR,SET_H_DR): Delete. - * sim-if.c (sim_open): Update call to fr30_cgen_cpu_open. - -1999-02-25 Doug Evans <devans@casey.cygnus.com> - - * cpu.h: Rebuild. - -1999-02-09 Doug Evans <devans@casey.cygnus.com> - - * Makefile.in (SIM_EXTRA_DEPS): Add fr30-desc.h, delete cpu-opc.h. - * configure.in (sim_link_files,sim_link_links): Delete. - * configure: Rebuild. - * decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild. - * fr30.c (fr30bf_model_fr30_1_u_cti): CGEN_INSN_ATTR renamed to - CGEN_INSN_ATTR_VALUE. - * mloop.in (extract-pbb): Ditto. Use idesc->length to get insn length. - * sim-if.c (sim_open): fr30_cgen_cpu_open renamed from - fr30_cgen_opcode_open. Set disassembler. - (sim_close): fr30_cgen_cpu_open renamed from fr30_cgen_opcode_open. - * sim-main.h: Don't include cpu-opc.h,cpu-sim.h. Include - fr30-desc.h,fr30-opc.h,fr30-sim.h. - -1999-01-27 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild. - -1999-01-15 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,decode.h,model.c: Regenerate. - * fr30.c (fr30bf_model_insn_before): Clear load_regs_pending. - (fr30bf_model_insn_after): Copy load_regs_pending to load_regs. - (fr30bf_model_fr30_1_u_exec): Check for load stalls. - (fr30bf_model_fr30_1_u_{cti,load,store}): Ditto. - -1999-01-14 Doug Evans <devans@casey.cygnus.com> - - * arch.c,arch.h,cpuall.h: Regenerate. - * cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate. - * devices.c (device_io_write_buffer): Remove some m32r cruft. - * fr30-sim.h (FR30_MISC_PROFILE): Delete, plus supporting macros. - (EIT_*,MSPR_*,MLCR_*,MPMR_*): Delete, m32r cruft. - * fr30.c (fr30bf_model_insn_after): Update cycle counts. - (check_load_stall): New function. - (fr30bf_model_fr30_1_u_exec): Update argument list. - (fr30bf_model_fr30_1_u_{cti,load,store,ldm,stm}): New functions. - * sim-if.c (sim_open): Comment out memory mapped device allocation. - Delete FR30_MISC_PROFILE handling. - (print_fr30_misc_cpu): Delete. - * sim-main.h (_sim_cpu): Delete member fr30_misc_profile. - * traps.c (sim_engine_invalid_insn): PCADDR->IADDR. - -1999-01-11 Doug Evans <devans@casey.cygnus.com> - - * Makefile.in (fr30-clean): rm eng.h. - - * sim-main.h: Delete inclusion of ansidecl.h. - Include sim-basics.h before cgen-types.h. - Delete inclusion of cgen-scache.h,cgen-cpu.h,cgen-trace.h,cpuall.h. - * cpu.h,sem-switch.c,sem.c: Regenerate. - -1999-01-05 Doug Evans <devans@casey.cygnus.com> - - * Makefile.in (MAIN_INCLUDE_DEPS): Delete. - (INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete. - (sim-if.o,arch.o,devices.o): Use SIM_MAIN_DEPS. - (FR30BF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS. - (mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies. - * cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate. - * fr30-sim.h (fr30bf_h_sbit_[gs]et_handler): Declare. - ([GS]ET_H_SBIT): Define. - (fr30bf_h_ccr_[gs]et_handler): Declare. - ([GS]ET_H_CCR): Define. - (fr30bf_h_scr_[gs]et_handler): Declare. - ([GS]ET_H_SCR): Define. - (fr30bf_h_ilm_[gs]et_handler): Declare. - ([GS]ET_H_ILM): Define. - (fr30bf_h_ps_[gs]et_handler): Declare. - ([GS]ET_H_PS): Define. - (fr30bf_h_dr_[gs]et_handler): Declare. - ([GS]ET_H_DR): Define. - * fr30.c (all register access fns): Rename to ..._handler. - (fr30bf_h_*_get_handler,fr30bf_h_*_set_handler): Rewrite to use - CPU or GET_H_FOO/SET_H_FOO access macros as appropriate. - * sim-if.c (sim_open): Model probing code moved to sim-model.c. - -Fri Dec 18 17:09:34 1998 Dave Brolley <brolley@cygnus.com> - - * fr30.c (fr30bf_store_register): Call a_fr30_h_dr_set for - dedicated registers. - -Thu Dec 17 17:17:48 1998 Dave Brolley <brolley@cygnus.com> - - * sem-switch.c,sem.c: Regenerate. - -Tue Dec 15 17:39:59 1998 Dave Brolley <brolley@cygnus.com> - - * traps.c (setup_int): Correct calls to SETMEMSI. - (fr30_int): Must calculate new pc after saving old one. - * fr30.c (fr30bf_h_sbit_get): New function. - (fr30bf_h_sbit_set): New function. - (fr30bf_h_ccr_set): Use fr30bf_h_sbit_set and move stack switching - logic to that function. - * cpu.[ch],decode.c,model.c,sem-switch.c,sem.c: Regenerate. - -1998-12-14 Doug Evans <devans@casey.cygnus.com> - - * configure.in: --enable-cgen-maint moved to common/aclocal.m4. - * configure: Regenerate. - - * sem-switch.c,sem.c: Regenerate. - - * traps.c (setup_int): Use enums for register numbers. - (fr30_int): Ditto. - -1998-12-14 Dave Brolley <brolley@cygnus.com> - - * cpu.h,decode.[ch],model.c,sem-switch.c,sem.c: Regenerate. - -Thu Dec 10 18:43:13 1998 Dave Brolley <brolley@cygnus.com> - - * arch.[ch],cpu.[ch],decode.c,model.c,sem-switch.c,sem.c: Regenerate. - * fr30.c (fr30bf_h_scr_get): Implement as separate bits. - (fr30bf_h_scr_set): Implement as separate bits. - -Wed Dec 9 13:25:37 1998 Doug Evans <devans@canuck.cygnus.com> - - * cpu.h,decode.c,sem-switch.c,sem.c: Regenerate. - -Tue Dec 8 13:15:23 1998 Dave Brolley <brolley@cygnus.com> - - * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate. - -Mon Dec 7 14:35:23 1998 Dave Brolley <brolley@cygnus.com> - - * traps.c (fr30_inte): New function. - * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate. - -1998-12-05 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,cpuall.h,decode.c,sem-switch.c,sem.c: Regenerate. - * mloop.in (extract): Make static inline. Rewrite. - (execute): Check ARGBUF_PROFILE_P before profiling. - Update calls to TRACE_INSN_INIT,TRACE_INSN_FINI. - -Fri Dec 4 16:18:25 1998 Doug Evans <devans@canuck.cygnus.com> - - * sem.c,sem-switch.c: Regenerate. - * cpu.h,decode.c: Regenerate. - -Fri Dec 4 17:09:27 1998 Dave Brolley <brolley@cygnus.com> - - * cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate. - -Fri Dec 4 00:22:43 1998 Doug Evans <devans@canuck.cygnus.com> - - * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate. - -Thu Dec 3 17:33:16 1998 Dave Brolley <brolley@cygnus.com> - - * fr30.c (fr30bf_h_ccr_get): New function. - (fr30bf_h_ccr_set): New function. - (fr30bf_h_ps_get): Use ccr access function. - (fr30bf_h_ps_set): Use ccr access function. - (fr30bf_h_scr_get): New function. - (fr30bf_h_scr_set): New function. - (fr30bf_h_ilm_get): New function. - (fr30bf_h_ilm_set): New function - (fr30bf_h_ps_get): Implement src and ilm. - (fr30bf_h_ps_set): Implement src and ilm. - - * arch.c,arch.h,cpu.h,decode.c,decode.h,model.c, - sem-switch.c,sem.c: Regenerate. - -Thu Dec 3 00:15:11 1998 Doug Evans <devans@canuck.cygnus.com> - - * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate. - -1998-11-30 Doug Evans <devans@casey.cygnus.com> - - * mloop.in (extract-pbb): Add delay slot support. - * cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate. - -Thu Nov 26 11:28:30 1998 Dave Brolley <brolley@cygnus.com> - - * cpu.h,decode.c,model.c,sem.c,sem-switch.c: Regenerated. - -Mon Nov 23 18:30:36 1998 Dave Brolley <brolley@cygnus.com> - - * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerated. - -1998-11-20 Doug Evans <devans@tobor.to.cygnus.com> - - * fr30-sim.h (*-REGNUM): Sync up with gdb. - * fr30.c (decode_gdb_dr_regnum): New function. - (fr30bf_fetch_register): Implement. - (fr30bf_store_register): Ditto. - (fr30bf_h_ps_get,fr30bf_h_ps_set): Ditto. - (fr30bf_h_dr_get,fr30bf_h_dr_set): New functions. - * sem-switch.c,sem.c: Rebuild. - * traps.c (setup_int): New function - (fr30_int): Handle all int insn processing here. - Don't save ps,pc if breakpoint trap. - * cpu.c,cpu.h,decode.c,sem-switch.c,sem.c: Regenerate. - -Thu Nov 19 16:05:09 1998 Dave Brolley <brolley@cygnus.com> - - * traps.c (fr30_int): Correct register usage. - * arch.c: Regenerated. - * arch.h: Regenerated. - * cpu.c: Regenerated. - * cpu.h: Regenerated. - * decode.c: Regenerated. - * decode.h: Regenerated. - * model.c: Regenerated. - * sem-switch.c: Regenerated. - * sem.c: Regenerated. - -Wed Nov 18 21:39:37 1998 Dave Brolley <brolley@cygnus.com> - - * fr30-sim.h (TRAP_SYSCALL, TRAP_BREAKPOINT): Redefine for fr30. - * fr30.c (fr30bf_h_ps_get): New function. - (fr30bf_h_ps_set): New function. - * mloop.in: Set up fast-pbb model for fr30. - * traps.c (fr30_int): New function. - * arch.c: Regenerated. - * arch.h: Regenerated. - * cpu.c: Regenerated. - * cpu.h: Regenerated. - * decode.c: Regenerated. - * model.c: Regenerated. - * sem-switch.c: Regenerated. - * sem.c: Regenerated. - -1998-11-18 Doug Evans <devans@casey.cygnus.com> - - * Makefile.in (FR30_OBJS): Delete extract.o. - (FR30BF_INCLUDE_DEPS): Add cgen-engine.h. - (extract.o): Delete rule for. - * mloop.in: Rewrite. - * cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild. - -Wed Nov 18 11:31:21 1998 Dave Brolley <brolley@cygnus.com> - - * sem-switch.c: Regenerated. - * sem.c: Regenerated. - -Mon Nov 16 19:23:44 1998 Dave Brolley <brolley@cygnus.com> - - * arch.c: Regenerated. - * arch.h: Regenerated. - * cpu.c: Regenerated. - * cpu.h: Regenerated. - * decode.c: Regenerated. - * decode.h: Regenerated. - * extract.c: Regenerated. - * model.c: Regenerated. - * sem-switch.c: Regenerated. - * sem.c: Regenerated. - -Thu Nov 12 19:27:50 1998 Dave Brolley <brolley@cygnus.com> - - * arch.c: Regenerated. - * arch.h: Regenerated. - * cpu.c: Regenerated. - * cpu.h: Regenerated. - * decode.c: Regenerated. - * decode.h: Regenerated. - * extract.c: Regenerated. - * model.c: Regenerated. - * sem-switch.c: Regenerated. - * sem.c: Regenerated. - * fr30.c: Get rid of unused functions. - -Mon Nov 9 18:25:47 1998 Dave Brolley <brolley@cygnus.com> - - * arch.c: Regenerated. - * arch.h: Regenerated. - * cpu.c: Regenerated. - * cpu.h: Regenerated. - * decode.c: Regenerated. - * decode.h: Regenerated. - * extract.c: Regenerated. - * model.c: Regenerated. - * sem-switch.c: Regenerated. - * sem.c: Regenerated. - * fr30.c: Get rid of m32r stuff. Flesh out fr30 stuff. - -Thu Nov 5 15:26:22 1998 Dave Brolley <brolley@cygnus.com> - - * cpu.h: Regenerated. - -Tue Oct 27 15:39:48 1996 Dave Brolley <brolley@cygnus.com> - - * Directory created. diff --git a/sim/fr30/Makefile.in b/sim/fr30/Makefile.in deleted file mode 100644 index 2a0ac83e01f..00000000000 --- a/sim/fr30/Makefile.in +++ /dev/null @@ -1,107 +0,0 @@ -# Makefile template for Configure for the fr30 simulator -# Copyright (C) 1998, 2000 Free Software Foundation, Inc. -# Contributed by Cygnus Support. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License along -# with this program; if not, write to the Free Software Foundation, Inc., -# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -## COMMON_PRE_CONFIG_FRAG - -FR30_OBJS = fr30.o cpu.o decode.o sem.o model.o arch.o mloop.o - -CONFIG_DEVICES = dv-sockser.o -CONFIG_DEVICES = - -SIM_OBJS = \ - $(SIM_NEW_COMMON_OBJS) \ - sim-cpu.o \ - sim-hload.o \ - sim-hrw.o \ - sim-model.o \ - sim-reg.o \ - cgen-utils.o cgen-trace.o cgen-scache.o \ - cgen-run.o sim-reason.o sim-engine.o sim-stop.o \ - sim-if.o \ - $(FR30_OBJS) \ - traps.o devices.o \ - $(CONFIG_DEVICES) - -# Extra headers included by sim-main.h. -SIM_EXTRA_DEPS = \ - $(CGEN_INCLUDE_DEPS) \ - arch.h cpuall.h fr30-sim.h $(srcdir)/../../opcodes/fr30-desc.h - -SIM_EXTRA_CFLAGS = - -SIM_RUN_OBJS = nrun.o -SIM_EXTRA_CLEAN = fr30-clean - -# This selects the fr30 newlib/libgloss syscall definitions. -NL_TARGET = -DNL_TARGET_fr30 - -## COMMON_POST_CONFIG_FRAG - -arch = fr30 - -sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h - -arch.o: arch.c $(SIM_MAIN_DEPS) - -devices.o: devices.c $(SIM_MAIN_DEPS) - -# FR30 objs - -FR30BF_INCLUDE_DEPS = \ - $(CGEN_MAIN_CPU_DEPS) \ - cpu.h decode.h eng.h - -fr30.o: fr30.c $(FR30BF_INCLUDE_DEPS) - -# FIXME: Use of `mono' is wip. -mloop.c eng.h: stamp-mloop -stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile - $(SHELL) $(srccom)/genmloop.sh \ - -mono -fast -pbb -switch sem-switch.c \ - -cpu fr30bf -infile $(srcdir)/mloop.in - $(SHELL) $(srcroot)/move-if-change eng.hin eng.h - $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c - touch stamp-mloop -mloop.o: mloop.c sem-switch.c $(FR30BF_INCLUDE_DEPS) - -cpu.o: cpu.c $(FR30BF_INCLUDE_DEPS) -decode.o: decode.c $(FR30BF_INCLUDE_DEPS) -sem.o: sem.c $(FR30BF_INCLUDE_DEPS) -model.o: model.c $(FR30BF_INCLUDE_DEPS) - -fr30-clean: - rm -f mloop.c eng.h stamp-mloop - rm -f tmp-* - rm -f stamp-arch stamp-cpu - -# cgen support, enable with --enable-cgen-maint -CGEN_MAINT = ; @true -# The following line is commented in or out depending upon --enable-cgen-maint. -@CGEN_MAINT@CGEN_MAINT = - -stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/fr30.cpu - $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ - FLAGS="with-scache with-profile=fn" - touch stamp-arch -arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch - -stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/fr30.cpu - $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ - cpu=fr30bf mach=fr30 SUFFIX= FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" - touch stamp-cpu -cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu diff --git a/sim/fr30/README b/sim/fr30/README deleted file mode 100644 index 47bf314943e..00000000000 --- a/sim/fr30/README +++ /dev/null @@ -1,14 +0,0 @@ -This is the fr30 simulator directory. - -It is still work-in-progress. The current sources are reasonably -well tested and lots of features are in. However, there's lots -more yet to come. - -There are lots of machine generated files in the source directory! -They are only generated if you configure with --enable-cgen-maint, -similar in behaviour to Makefile.in, configure under automake/autoconf. - -For details on the generator, see ../../cgen. - -devo/cgen isn't part of the comp-tools module yet. -You'll need to check it out manually (also akin to automake/autoconf). diff --git a/sim/fr30/TODO b/sim/fr30/TODO deleted file mode 100644 index ae4c76078f2..00000000000 --- a/sim/fr30/TODO +++ /dev/null @@ -1,14 +0,0 @@ -m32r-inherited stuff? ----------------------- -- header file dependencies revisit -- hooks cleanup -- testsuites -- FIXME's - - -m32r stuff? ----------------------- -- memory accesses still test if profiling is on even in fast mode -- have semantic code use G/SET_H_FOO if not default [incl fun-access] -- have G/SET_H_FOO macros call function if fun-access -- --> can always use G/S_H_FOO macros diff --git a/sim/fr30/arch.c b/sim/fr30/arch.c deleted file mode 100644 index a8404d83a46..00000000000 --- a/sim/fr30/arch.c +++ /dev/null @@ -1,35 +0,0 @@ -/* Simulator support for fr30. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#include "sim-main.h" -#include "bfd.h" - -const MACH *sim_machs[] = -{ -#ifdef HAVE_CPU_FR30BF - & fr30_mach, -#endif - 0 -}; - diff --git a/sim/fr30/arch.h b/sim/fr30/arch.h deleted file mode 100644 index dc92099e85c..00000000000 --- a/sim/fr30/arch.h +++ /dev/null @@ -1,45 +0,0 @@ -/* Simulator header for fr30. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef FR30_ARCH_H -#define FR30_ARCH_H - -#define TARGET_BIG_ENDIAN 1 - -/* Enum declaration for model types. */ -typedef enum model_type { - MODEL_FR30_1, MODEL_MAX -} MODEL_TYPE; - -#define MAX_MODELS ((int) MODEL_MAX) - -/* Enum declaration for unit types. */ -typedef enum unit_type { - UNIT_NONE, UNIT_FR30_1_U_STM, UNIT_FR30_1_U_LDM, UNIT_FR30_1_U_STORE - , UNIT_FR30_1_U_LOAD, UNIT_FR30_1_U_CTI, UNIT_FR30_1_U_EXEC, UNIT_MAX -} UNIT_TYPE; - -#define MAX_UNITS (3) - -#endif /* FR30_ARCH_H */ diff --git a/sim/fr30/config.in b/sim/fr30/config.in deleted file mode 100644 index 9723b8662c9..00000000000 --- a/sim/fr30/config.in +++ /dev/null @@ -1,162 +0,0 @@ -/* config.in. Generated automatically from configure.in by autoheader. */ - -/* Define if using alloca.c. */ -#undef C_ALLOCA - -/* Define to empty if the keyword does not work. */ -#undef const - -/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems. - This function is required for alloca.c support on those systems. */ -#undef CRAY_STACKSEG_END - -/* Define if you have alloca, as a function or macro. */ -#undef HAVE_ALLOCA - -/* Define if you have <alloca.h> and it should be used (not on Ultrix). */ -#undef HAVE_ALLOCA_H - -/* Define if you have a working `mmap' system call. */ -#undef HAVE_MMAP - -/* Define as __inline if that's what the C compiler calls it. */ -#undef inline - -/* Define to `long' if <sys/types.h> doesn't define. */ -#undef off_t - -/* Define if you need to in order for stat and other things to work. */ -#undef _POSIX_SOURCE - -/* Define as the return type of signal handlers (int or void). */ -#undef RETSIGTYPE - -/* Define to `unsigned' if <sys/types.h> doesn't define. */ -#undef size_t - -/* If using the C implementation of alloca, define if you know the - direction of stack growth for your system; otherwise it will be - automatically deduced at run-time. - STACK_DIRECTION > 0 => grows toward higher addresses - STACK_DIRECTION < 0 => grows toward lower addresses - STACK_DIRECTION = 0 => direction of growth unknown - */ -#undef STACK_DIRECTION - -/* Define if you have the ANSI C header files. */ -#undef STDC_HEADERS - -/* Define if your processor stores words with the most significant - byte first (like Motorola and SPARC, unlike Intel and VAX). */ -#undef WORDS_BIGENDIAN - -/* Define to 1 if NLS is requested. */ -#undef ENABLE_NLS - -/* Define as 1 if you have gettext and don't want to use GNU gettext. */ -#undef HAVE_GETTEXT - -/* Define as 1 if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if your locale.h file contains LC_MESSAGES. */ -#undef HAVE_LC_MESSAGES - -/* Define if you have the __argz_count function. */ -#undef HAVE___ARGZ_COUNT - -/* Define if you have the __argz_next function. */ -#undef HAVE___ARGZ_NEXT - -/* Define if you have the __argz_stringify function. */ -#undef HAVE___ARGZ_STRINGIFY - -/* Define if you have the __setfpucw function. */ -#undef HAVE___SETFPUCW - -/* Define if you have the dcgettext function. */ -#undef HAVE_DCGETTEXT - -/* Define if you have the getcwd function. */ -#undef HAVE_GETCWD - -/* Define if you have the getpagesize function. */ -#undef HAVE_GETPAGESIZE - -/* Define if you have the getrusage function. */ -#undef HAVE_GETRUSAGE - -/* Define if you have the munmap function. */ -#undef HAVE_MUNMAP - -/* Define if you have the putenv function. */ -#undef HAVE_PUTENV - -/* Define if you have the setenv function. */ -#undef HAVE_SETENV - -/* Define if you have the setlocale function. */ -#undef HAVE_SETLOCALE - -/* Define if you have the sigaction function. */ -#undef HAVE_SIGACTION - -/* Define if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if you have the strcasecmp function. */ -#undef HAVE_STRCASECMP - -/* Define if you have the strchr function. */ -#undef HAVE_STRCHR - -/* Define if you have the time function. */ -#undef HAVE_TIME - -/* Define if you have the <argz.h> header file. */ -#undef HAVE_ARGZ_H - -/* Define if you have the <fcntl.h> header file. */ -#undef HAVE_FCNTL_H - -/* Define if you have the <fpu_control.h> header file. */ -#undef HAVE_FPU_CONTROL_H - -/* Define if you have the <limits.h> header file. */ -#undef HAVE_LIMITS_H - -/* Define if you have the <locale.h> header file. */ -#undef HAVE_LOCALE_H - -/* Define if you have the <malloc.h> header file. */ -#undef HAVE_MALLOC_H - -/* Define if you have the <nl_types.h> header file. */ -#undef HAVE_NL_TYPES_H - -/* Define if you have the <stdlib.h> header file. */ -#undef HAVE_STDLIB_H - -/* Define if you have the <string.h> header file. */ -#undef HAVE_STRING_H - -/* Define if you have the <strings.h> header file. */ -#undef HAVE_STRINGS_H - -/* Define if you have the <sys/param.h> header file. */ -#undef HAVE_SYS_PARAM_H - -/* Define if you have the <sys/resource.h> header file. */ -#undef HAVE_SYS_RESOURCE_H - -/* Define if you have the <sys/time.h> header file. */ -#undef HAVE_SYS_TIME_H - -/* Define if you have the <time.h> header file. */ -#undef HAVE_TIME_H - -/* Define if you have the <unistd.h> header file. */ -#undef HAVE_UNISTD_H - -/* Define if you have the <values.h> header file. */ -#undef HAVE_VALUES_H diff --git a/sim/fr30/configure b/sim/fr30/configure deleted file mode 100644 index 2c537d36e6b..00000000000 --- a/sim/fr30/configure +++ /dev/null @@ -1,4294 +0,0 @@ -#! /bin/sh - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -sim_inline="-DDEFAULT_INLINE=0" - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -# This file is derived from `gettext.m4'. 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See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU fr30bf -#define WANT_CPU_FR30BF - -#include "sim-main.h" -#include "cgen-ops.h" - -/* Get the value of h-pc. */ - -USI -fr30bf_h_pc_get (SIM_CPU *current_cpu) -{ - return CPU (h_pc); -} - -/* Set a value for h-pc. */ - -void -fr30bf_h_pc_set (SIM_CPU *current_cpu, USI newval) -{ - CPU (h_pc) = newval; -} - -/* Get the value of h-gr. */ - -SI -fr30bf_h_gr_get (SIM_CPU *current_cpu, UINT regno) -{ - return CPU (h_gr[regno]); -} - -/* Set a value for h-gr. */ - -void -fr30bf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval) -{ - CPU (h_gr[regno]) = newval; -} - -/* Get the value of h-cr. */ - -SI -fr30bf_h_cr_get (SIM_CPU *current_cpu, UINT regno) -{ - return CPU (h_cr[regno]); -} - -/* Set a value for h-cr. */ - -void -fr30bf_h_cr_set (SIM_CPU *current_cpu, UINT regno, SI newval) -{ - CPU (h_cr[regno]) = newval; -} - -/* Get the value of h-dr. */ - -SI -fr30bf_h_dr_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_DR (regno); -} - -/* Set a value for h-dr. */ - -void -fr30bf_h_dr_set (SIM_CPU *current_cpu, UINT regno, SI newval) -{ - SET_H_DR (regno, newval); -} - -/* Get the value of h-ps. */ - -USI -fr30bf_h_ps_get (SIM_CPU *current_cpu) -{ - return GET_H_PS (); -} - -/* Set a value for h-ps. */ - -void -fr30bf_h_ps_set (SIM_CPU *current_cpu, USI newval) -{ - SET_H_PS (newval); -} - -/* Get the value of h-r13. */ - -SI -fr30bf_h_r13_get (SIM_CPU *current_cpu) -{ - return CPU (h_r13); -} - -/* Set a value for h-r13. */ - -void -fr30bf_h_r13_set (SIM_CPU *current_cpu, SI newval) -{ - CPU (h_r13) = newval; -} - -/* Get the value of h-r14. */ - -SI -fr30bf_h_r14_get (SIM_CPU *current_cpu) -{ - return CPU (h_r14); -} - -/* Set a value for h-r14. */ - -void -fr30bf_h_r14_set (SIM_CPU *current_cpu, SI newval) -{ - CPU (h_r14) = newval; -} - -/* Get the value of h-r15. */ - -SI -fr30bf_h_r15_get (SIM_CPU *current_cpu) -{ - return CPU (h_r15); -} - -/* Set a value for h-r15. */ - -void -fr30bf_h_r15_set (SIM_CPU *current_cpu, SI newval) -{ - CPU (h_r15) = newval; -} - -/* Get the value of h-nbit. */ - -BI -fr30bf_h_nbit_get (SIM_CPU *current_cpu) -{ - return CPU (h_nbit); -} - -/* Set a value for h-nbit. */ - -void -fr30bf_h_nbit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_nbit) = newval; -} - -/* Get the value of h-zbit. */ - -BI -fr30bf_h_zbit_get (SIM_CPU *current_cpu) -{ - return CPU (h_zbit); -} - -/* Set a value for h-zbit. */ - -void -fr30bf_h_zbit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_zbit) = newval; -} - -/* Get the value of h-vbit. */ - -BI -fr30bf_h_vbit_get (SIM_CPU *current_cpu) -{ - return CPU (h_vbit); -} - -/* Set a value for h-vbit. */ - -void -fr30bf_h_vbit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_vbit) = newval; -} - -/* Get the value of h-cbit. */ - -BI -fr30bf_h_cbit_get (SIM_CPU *current_cpu) -{ - return CPU (h_cbit); -} - -/* Set a value for h-cbit. */ - -void -fr30bf_h_cbit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_cbit) = newval; -} - -/* Get the value of h-ibit. */ - -BI -fr30bf_h_ibit_get (SIM_CPU *current_cpu) -{ - return CPU (h_ibit); -} - -/* Set a value for h-ibit. */ - -void -fr30bf_h_ibit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_ibit) = newval; -} - -/* Get the value of h-sbit. */ - -BI -fr30bf_h_sbit_get (SIM_CPU *current_cpu) -{ - return GET_H_SBIT (); -} - -/* Set a value for h-sbit. */ - -void -fr30bf_h_sbit_set (SIM_CPU *current_cpu, BI newval) -{ - SET_H_SBIT (newval); -} - -/* Get the value of h-tbit. */ - -BI -fr30bf_h_tbit_get (SIM_CPU *current_cpu) -{ - return CPU (h_tbit); -} - -/* Set a value for h-tbit. */ - -void -fr30bf_h_tbit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_tbit) = newval; -} - -/* Get the value of h-d0bit. */ - -BI -fr30bf_h_d0bit_get (SIM_CPU *current_cpu) -{ - return CPU (h_d0bit); -} - -/* Set a value for h-d0bit. */ - -void -fr30bf_h_d0bit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_d0bit) = newval; -} - -/* Get the value of h-d1bit. */ - -BI -fr30bf_h_d1bit_get (SIM_CPU *current_cpu) -{ - return CPU (h_d1bit); -} - -/* Set a value for h-d1bit. */ - -void -fr30bf_h_d1bit_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_d1bit) = newval; -} - -/* Get the value of h-ccr. */ - -UQI -fr30bf_h_ccr_get (SIM_CPU *current_cpu) -{ - return GET_H_CCR (); -} - -/* Set a value for h-ccr. */ - -void -fr30bf_h_ccr_set (SIM_CPU *current_cpu, UQI newval) -{ - SET_H_CCR (newval); -} - -/* Get the value of h-scr. */ - -UQI -fr30bf_h_scr_get (SIM_CPU *current_cpu) -{ - return GET_H_SCR (); -} - -/* Set a value for h-scr. */ - -void -fr30bf_h_scr_set (SIM_CPU *current_cpu, UQI newval) -{ - SET_H_SCR (newval); -} - -/* Get the value of h-ilm. */ - -UQI -fr30bf_h_ilm_get (SIM_CPU *current_cpu) -{ - return GET_H_ILM (); -} - -/* Set a value for h-ilm. */ - -void -fr30bf_h_ilm_set (SIM_CPU *current_cpu, UQI newval) -{ - SET_H_ILM (newval); -} - -/* Record trace results for INSN. */ - -void -fr30bf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn, - int *indices, TRACE_RECORD *tr) -{ -} diff --git a/sim/fr30/cpu.h b/sim/fr30/cpu.h deleted file mode 100644 index 7a7ee46c415..00000000000 --- a/sim/fr30/cpu.h +++ /dev/null @@ -1,890 +0,0 @@ -/* CPU family header for fr30bf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef CPU_FR30BF_H -#define CPU_FR30BF_H - -/* Maximum number of instructions that are fetched at a time. - This is for LIW type instructions sets (e.g. m32r). */ -#define MAX_LIW_INSNS 1 - -/* Maximum number of instructions that can be executed in parallel. */ -#define MAX_PARALLEL_INSNS 1 - -/* CPU state information. */ -typedef struct { - /* Hardware elements. */ - struct { - /* program counter */ - USI h_pc; -#define GET_H_PC() CPU (h_pc) -#define SET_H_PC(x) (CPU (h_pc) = (x)) - /* general registers */ - SI h_gr[16]; -#define GET_H_GR(a1) CPU (h_gr)[a1] -#define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x)) - /* coprocessor registers */ - SI h_cr[16]; -#define GET_H_CR(a1) CPU (h_cr)[a1] -#define SET_H_CR(a1, x) (CPU (h_cr)[a1] = (x)) - /* dedicated registers */ - SI h_dr[6]; -#define GET_H_DR(index) fr30bf_h_dr_get_handler (current_cpu, index) -#define SET_H_DR(index, x) \ -do { \ -fr30bf_h_dr_set_handler (current_cpu, (index), (x));\ -;} while (0) - /* processor status */ - USI h_ps; -#define GET_H_PS() fr30bf_h_ps_get_handler (current_cpu) -#define SET_H_PS(x) \ -do { \ -fr30bf_h_ps_set_handler (current_cpu, (x));\ -;} while (0) - /* General Register 13 explicitly required */ - SI h_r13; -#define GET_H_R13() CPU (h_r13) -#define SET_H_R13(x) (CPU (h_r13) = (x)) - /* General Register 14 explicitly required */ - SI h_r14; -#define GET_H_R14() CPU (h_r14) -#define SET_H_R14(x) (CPU (h_r14) = (x)) - /* General Register 15 explicitly required */ - SI h_r15; -#define GET_H_R15() CPU (h_r15) -#define SET_H_R15(x) (CPU (h_r15) = (x)) - /* negative bit */ - BI h_nbit; -#define GET_H_NBIT() CPU (h_nbit) -#define SET_H_NBIT(x) (CPU (h_nbit) = (x)) - /* zero bit */ - BI h_zbit; -#define GET_H_ZBIT() CPU (h_zbit) -#define SET_H_ZBIT(x) (CPU (h_zbit) = (x)) - /* overflow bit */ - BI h_vbit; -#define GET_H_VBIT() CPU (h_vbit) -#define SET_H_VBIT(x) (CPU (h_vbit) = (x)) - /* carry bit */ - BI h_cbit; -#define GET_H_CBIT() CPU (h_cbit) -#define SET_H_CBIT(x) (CPU (h_cbit) = (x)) - /* interrupt enable bit */ - BI h_ibit; -#define GET_H_IBIT() CPU (h_ibit) -#define SET_H_IBIT(x) (CPU (h_ibit) = (x)) - /* stack bit */ - BI h_sbit; -#define GET_H_SBIT() fr30bf_h_sbit_get_handler (current_cpu) -#define SET_H_SBIT(x) \ -do { \ -fr30bf_h_sbit_set_handler (current_cpu, (x));\ -;} while (0) - /* trace trap bit */ - BI h_tbit; -#define GET_H_TBIT() CPU (h_tbit) -#define SET_H_TBIT(x) (CPU (h_tbit) = (x)) - /* division 0 bit */ - BI h_d0bit; -#define GET_H_D0BIT() CPU (h_d0bit) -#define SET_H_D0BIT(x) (CPU (h_d0bit) = (x)) - /* division 1 bit */ - BI h_d1bit; -#define GET_H_D1BIT() CPU (h_d1bit) -#define SET_H_D1BIT(x) (CPU (h_d1bit) = (x)) - /* condition code bits */ - UQI h_ccr; -#define GET_H_CCR() fr30bf_h_ccr_get_handler (current_cpu) -#define SET_H_CCR(x) \ -do { \ -fr30bf_h_ccr_set_handler (current_cpu, (x));\ -;} while (0) - /* system condition bits */ - UQI h_scr; -#define GET_H_SCR() fr30bf_h_scr_get_handler (current_cpu) -#define SET_H_SCR(x) \ -do { \ -fr30bf_h_scr_set_handler (current_cpu, (x));\ -;} while (0) - /* interrupt level mask */ - UQI h_ilm; -#define GET_H_ILM() fr30bf_h_ilm_get_handler (current_cpu) -#define SET_H_ILM(x) \ -do { \ -fr30bf_h_ilm_set_handler (current_cpu, (x));\ -;} while (0) - } hardware; -#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware) -} FR30BF_CPU_DATA; - -/* Cover fns for register access. */ -USI fr30bf_h_pc_get (SIM_CPU *); -void fr30bf_h_pc_set (SIM_CPU *, USI); -SI fr30bf_h_gr_get (SIM_CPU *, UINT); -void fr30bf_h_gr_set (SIM_CPU *, UINT, SI); -SI fr30bf_h_cr_get (SIM_CPU *, UINT); -void fr30bf_h_cr_set (SIM_CPU *, UINT, SI); -SI fr30bf_h_dr_get (SIM_CPU *, UINT); -void fr30bf_h_dr_set (SIM_CPU *, UINT, SI); -USI fr30bf_h_ps_get (SIM_CPU *); -void fr30bf_h_ps_set (SIM_CPU *, USI); -SI fr30bf_h_r13_get (SIM_CPU *); -void fr30bf_h_r13_set (SIM_CPU *, SI); -SI fr30bf_h_r14_get (SIM_CPU *); -void fr30bf_h_r14_set (SIM_CPU *, SI); -SI fr30bf_h_r15_get (SIM_CPU *); -void fr30bf_h_r15_set (SIM_CPU *, SI); -BI fr30bf_h_nbit_get (SIM_CPU *); -void fr30bf_h_nbit_set (SIM_CPU *, BI); -BI fr30bf_h_zbit_get (SIM_CPU *); -void fr30bf_h_zbit_set (SIM_CPU *, BI); -BI fr30bf_h_vbit_get (SIM_CPU *); -void fr30bf_h_vbit_set (SIM_CPU *, BI); -BI fr30bf_h_cbit_get (SIM_CPU *); -void fr30bf_h_cbit_set (SIM_CPU *, BI); -BI fr30bf_h_ibit_get (SIM_CPU *); -void fr30bf_h_ibit_set (SIM_CPU *, BI); -BI fr30bf_h_sbit_get (SIM_CPU *); -void fr30bf_h_sbit_set (SIM_CPU *, BI); -BI fr30bf_h_tbit_get (SIM_CPU *); -void fr30bf_h_tbit_set (SIM_CPU *, BI); -BI fr30bf_h_d0bit_get (SIM_CPU *); -void fr30bf_h_d0bit_set (SIM_CPU *, BI); -BI fr30bf_h_d1bit_get (SIM_CPU *); -void fr30bf_h_d1bit_set (SIM_CPU *, BI); -UQI fr30bf_h_ccr_get (SIM_CPU *); -void fr30bf_h_ccr_set (SIM_CPU *, UQI); -UQI fr30bf_h_scr_get (SIM_CPU *); -void fr30bf_h_scr_set (SIM_CPU *, UQI); -UQI fr30bf_h_ilm_get (SIM_CPU *); -void fr30bf_h_ilm_set (SIM_CPU *, UQI); - -/* These must be hand-written. */ -extern CPUREG_FETCH_FN fr30bf_fetch_register; -extern CPUREG_STORE_FN fr30bf_store_register; - -typedef struct { - UINT load_regs; - UINT load_regs_pending; -} MODEL_FR30_1_DATA; - -/* Instruction argument buffer. */ - -union sem_fields { - struct { /* no operands */ - int empty; - } fmt_empty; - struct { /* */ - IADDR i_label9; - } sfmt_brad; - struct { /* */ - UINT f_u8; - } sfmt_int; - struct { /* */ - IADDR i_label12; - } sfmt_call; - struct { /* */ - SI f_s10; - unsigned char in_h_gr_15; - unsigned char out_h_gr_15; - } sfmt_addsp; - struct { /* */ - USI f_dir10; - unsigned char in_h_gr_15; - unsigned char out_h_gr_15; - } sfmt_dmovr15pi; - struct { /* */ - UINT f_dir8; - unsigned char in_h_gr_13; - unsigned char out_h_gr_13; - } sfmt_dmovr13pib; - struct { /* */ - USI f_dir9; - unsigned char in_h_gr_13; - unsigned char out_h_gr_13; - } sfmt_dmovr13pih; - struct { /* */ - USI f_dir10; - unsigned char in_h_gr_13; - unsigned char out_h_gr_13; - } sfmt_dmovr13pi; - struct { /* */ - UINT f_Rs2; - unsigned char in_h_gr_15; - unsigned char out_h_gr_15; - } sfmt_ldr15dr; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - UINT f_Rs1; - unsigned char in_Ri; - } sfmt_mov2dr; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - UINT f_Rs1; - unsigned char out_Ri; - } sfmt_movdr; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - UINT f_i32; - unsigned char out_Ri; - } sfmt_ldi32; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - UINT f_i20; - unsigned char out_Ri; - } sfmt_ldi20; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - UINT f_i8; - unsigned char out_Ri; - } sfmt_ldi8; - struct { /* */ - USI f_u10; - unsigned char in_h_gr_14; - unsigned char in_h_gr_15; - unsigned char out_h_gr_14; - unsigned char out_h_gr_15; - } sfmt_enter; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - unsigned char in_Ri; - unsigned char in_h_gr_15; - unsigned char out_h_gr_15; - } sfmt_str15gr; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - USI f_udisp6; - unsigned char in_Ri; - unsigned char in_h_gr_15; - } sfmt_str15; - struct { /* */ - SI* i_Ri; - INT f_disp8; - UINT f_Ri; - unsigned char in_Ri; - unsigned char in_h_gr_14; - } sfmt_str14b; - struct { /* */ - SI* i_Ri; - SI f_disp9; - UINT f_Ri; - unsigned char in_Ri; - unsigned char in_h_gr_14; - } sfmt_str14h; - struct { /* */ - SI* i_Ri; - SI f_disp10; - UINT f_Ri; - unsigned char in_Ri; - unsigned char in_h_gr_14; - } sfmt_str14; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - unsigned char in_h_gr_15; - unsigned char out_Ri; - unsigned char out_h_gr_15; - } sfmt_ldr15gr; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - USI f_udisp6; - unsigned char in_h_gr_15; - unsigned char out_Ri; - } sfmt_ldr15; - struct { /* */ - SI* i_Ri; - INT f_disp8; - UINT f_Ri; - unsigned char in_h_gr_14; - unsigned char out_Ri; - } sfmt_ldr14ub; - struct { /* */ - SI* i_Ri; - SI f_disp9; - UINT f_Ri; - unsigned char in_h_gr_14; - unsigned char out_Ri; - } sfmt_ldr14uh; - struct { /* */ - SI* i_Ri; - SI f_disp10; - UINT f_Ri; - unsigned char in_h_gr_14; - unsigned char out_Ri; - } sfmt_ldr14; - struct { /* */ - SI* i_Ri; - SI f_m4; - UINT f_Ri; - unsigned char in_Ri; - unsigned char out_Ri; - } sfmt_add2; - struct { /* */ - SI* i_Ri; - UINT f_Ri; - UINT f_u4; - unsigned char in_Ri; - unsigned char out_Ri; - } sfmt_addi; - struct { /* */ - SI* i_Ri; - SI* i_Rj; - UINT f_Ri; - UINT f_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - unsigned char in_h_gr_13; - } sfmt_str13; - struct { /* */ - SI* i_Ri; - SI* i_Rj; - UINT f_Ri; - UINT f_Rj; - unsigned char in_Rj; - unsigned char in_h_gr_13; - unsigned char out_Ri; - } sfmt_ldr13; - struct { /* */ - SI* i_Ri; - SI* i_Rj; - UINT f_Ri; - UINT f_Rj; - unsigned char in_Ri; - unsigned char in_Rj; - unsigned char out_Ri; - } sfmt_add; - struct { /* */ - UINT f_reglist_hi_st; - unsigned char in_h_gr_10; - unsigned char in_h_gr_11; - unsigned char in_h_gr_12; - unsigned char in_h_gr_13; - unsigned char in_h_gr_14; - unsigned char in_h_gr_15; - unsigned char in_h_gr_8; - unsigned char in_h_gr_9; - unsigned char out_h_gr_15; - } sfmt_stm1; - struct { /* */ - UINT f_reglist_hi_ld; - unsigned char in_h_gr_15; - unsigned char out_h_gr_10; - unsigned char out_h_gr_11; - unsigned char out_h_gr_12; - unsigned char out_h_gr_13; - unsigned char out_h_gr_14; - unsigned char out_h_gr_15; - unsigned char out_h_gr_8; - unsigned char out_h_gr_9; - } sfmt_ldm1; - struct { /* */ - UINT f_reglist_low_st; - unsigned char in_h_gr_0; - unsigned char in_h_gr_1; - unsigned char in_h_gr_15; - unsigned char in_h_gr_2; - unsigned char in_h_gr_3; - unsigned char in_h_gr_4; - unsigned char in_h_gr_5; - unsigned char in_h_gr_6; - unsigned char in_h_gr_7; - unsigned char out_h_gr_15; - } sfmt_stm0; - struct { /* */ - UINT f_reglist_low_ld; - unsigned char in_h_gr_15; - unsigned char out_h_gr_0; - unsigned char out_h_gr_1; - unsigned char out_h_gr_15; - unsigned char out_h_gr_2; - unsigned char out_h_gr_3; - unsigned char out_h_gr_4; - unsigned char out_h_gr_5; - unsigned char out_h_gr_6; - unsigned char out_h_gr_7; - } sfmt_ldm0; -#if WITH_SCACHE_PBB - /* Writeback handler. */ - struct { - /* Pointer to argbuf entry for insn whose results need writing back. */ - const struct argbuf *abuf; - } write; - /* x-before handler */ - struct { - /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/ - int first_p; - } before; - /* x-after handler */ - struct { - int empty; - } after; - /* This entry is used to terminate each pbb. */ - struct { - /* Number of insns in pbb. */ - int insn_count; - /* Next pbb to execute. */ - SCACHE *next; - SCACHE *branch_target; - } chain; -#endif -}; - -/* The ARGBUF struct. */ -struct argbuf { - /* These are the baseclass definitions. */ - IADDR addr; - const IDESC *idesc; - char trace_p; - char profile_p; - /* ??? Temporary hack for skip insns. */ - char skip_count; - char unused; - /* cpu specific data follows */ - union sem semantic; - int written; - union sem_fields fields; -}; - -/* A cached insn. - - ??? SCACHE used to contain more than just argbuf. We could delete the - type entirely and always just use ARGBUF, but for future concerns and as - a level of abstraction it is left in. */ - -struct scache { - struct argbuf argbuf; -}; - -/* Macros to simplify extraction, reading and semantic code. - These define and assign the local vars that contain the insn's fields. */ - -#define EXTRACT_IFMT_EMPTY_VARS \ - unsigned int length; -#define EXTRACT_IFMT_EMPTY_CODE \ - length = 0; \ - -#define EXTRACT_IFMT_ADD_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_Rj; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_ADD_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_ADDI_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_u4; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_ADDI_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_ADD2_VARS \ - UINT f_op1; \ - UINT f_op2; \ - SI f_m4; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_ADD2_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_DIV0S_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_op3; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_DIV0S_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_DIV3_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_op3; \ - UINT f_op4; \ - unsigned int length; -#define EXTRACT_IFMT_DIV3_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_op4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDI8_VARS \ - UINT f_op1; \ - UINT f_i8; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_LDI8_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_i8 = EXTRACT_MSB0_UINT (insn, 16, 4, 8); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDI20_VARS \ - UINT f_op1; \ - UINT f_i20_4; \ - UINT f_i20_16; \ - UINT f_i20; \ - UINT f_op2; \ - UINT f_Ri; \ - /* Contents of trailing part of insn. */ \ - UINT word_1; \ - unsigned int length; -#define EXTRACT_IFMT_LDI20_CODE \ - length = 4; \ - word_1 = GETIMEMUHI (current_cpu, pc + 2); \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_i20_4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_i20_16 = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 0)); \ -{\ - f_i20 = ((((f_i20_4) << (16))) | (f_i20_16));\ -}\ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDI32_VARS \ - UINT f_op1; \ - UINT f_i32; \ - UINT f_op2; \ - UINT f_op3; \ - UINT f_Ri; \ - /* Contents of trailing part of insn. */ \ - UINT word_1; \ - UINT word_2; \ - unsigned int length; -#define EXTRACT_IFMT_LDI32_CODE \ - length = 6; \ - word_1 = GETIMEMUHI (current_cpu, pc + 2); \ - word_2 = GETIMEMUHI (current_cpu, pc + 4); \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_i32 = (0|(EXTRACT_MSB0_UINT (word_2, 16, 0, 16) << 0)|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 16)); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDR14_VARS \ - UINT f_op1; \ - SI f_disp10; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_LDR14_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_disp10 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (2)); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDR14UH_VARS \ - UINT f_op1; \ - SI f_disp9; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_LDR14UH_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_disp9 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (1)); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDR14UB_VARS \ - UINT f_op1; \ - INT f_disp8; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_LDR14UB_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_disp8 = EXTRACT_MSB0_INT (insn, 16, 4, 8); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDR15_VARS \ - UINT f_op1; \ - UINT f_op2; \ - USI f_udisp6; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_LDR15_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_udisp6 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) << (2)); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LDR15DR_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_op3; \ - UINT f_Rs2; \ - unsigned int length; -#define EXTRACT_IFMT_LDR15DR_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_MOVDR_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_Rs1; \ - UINT f_Ri; \ - unsigned int length; -#define EXTRACT_IFMT_MOVDR_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_Rs1 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_CALL_VARS \ - UINT f_op1; \ - UINT f_op5; \ - SI f_rel12; \ - unsigned int length; -#define EXTRACT_IFMT_CALL_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op5 = EXTRACT_MSB0_UINT (insn, 16, 4, 1); \ - f_rel12 = ((((EXTRACT_MSB0_INT (insn, 16, 5, 11)) << (1))) + (((pc) + (2)))); \ - -#define EXTRACT_IFMT_INT_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_u8; \ - unsigned int length; -#define EXTRACT_IFMT_INT_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ - -#define EXTRACT_IFMT_BRAD_VARS \ - UINT f_op1; \ - UINT f_cc; \ - SI f_rel9; \ - unsigned int length; -#define EXTRACT_IFMT_BRAD_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_cc = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); \ - -#define EXTRACT_IFMT_DMOVR13_VARS \ - UINT f_op1; \ - UINT f_op2; \ - USI f_dir10; \ - unsigned int length; -#define EXTRACT_IFMT_DMOVR13_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); \ - -#define EXTRACT_IFMT_DMOVR13H_VARS \ - UINT f_op1; \ - UINT f_op2; \ - USI f_dir9; \ - unsigned int length; -#define EXTRACT_IFMT_DMOVR13H_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); \ - -#define EXTRACT_IFMT_DMOVR13B_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_dir8; \ - unsigned int length; -#define EXTRACT_IFMT_DMOVR13B_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ - -#define EXTRACT_IFMT_COPOP_VARS \ - UINT f_op1; \ - UINT f_ccc; \ - UINT f_op2; \ - UINT f_op3; \ - UINT f_CRj; \ - UINT f_u4c; \ - UINT f_CRi; \ - /* Contents of trailing part of insn. */ \ - UINT word_1; \ - unsigned int length; -#define EXTRACT_IFMT_COPOP_CODE \ - length = 4; \ - word_1 = GETIMEMUHI (current_cpu, pc + 2); \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_CRj = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \ - f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - f_CRi = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 16) << 0)); \ - -#define EXTRACT_IFMT_COPLD_VARS \ - UINT f_op1; \ - UINT f_ccc; \ - UINT f_op2; \ - UINT f_op3; \ - UINT f_Rjc; \ - UINT f_u4c; \ - UINT f_CRi; \ - /* Contents of trailing part of insn. */ \ - UINT word_1; \ - unsigned int length; -#define EXTRACT_IFMT_COPLD_CODE \ - length = 4; \ - word_1 = GETIMEMUHI (current_cpu, pc + 2); \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_Rjc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \ - f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - f_CRi = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 16) << 0)); \ - -#define EXTRACT_IFMT_COPST_VARS \ - UINT f_op1; \ - UINT f_ccc; \ - UINT f_op2; \ - UINT f_op3; \ - UINT f_CRj; \ - UINT f_u4c; \ - UINT f_Ric; \ - /* Contents of trailing part of insn. */ \ - UINT word_1; \ - unsigned int length; -#define EXTRACT_IFMT_COPST_CODE \ - length = 4; \ - word_1 = GETIMEMUHI (current_cpu, pc + 2); \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_CRj = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \ - f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - f_Ric = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 16) << 0)); \ - -#define EXTRACT_IFMT_ADDSP_VARS \ - UINT f_op1; \ - UINT f_op2; \ - SI f_s10; \ - unsigned int length; -#define EXTRACT_IFMT_ADDSP_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_s10 = ((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2)); \ - -#define EXTRACT_IFMT_LDM0_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_reglist_low_ld; \ - unsigned int length; -#define EXTRACT_IFMT_LDM0_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_reglist_low_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ - -#define EXTRACT_IFMT_LDM1_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_reglist_hi_ld; \ - unsigned int length; -#define EXTRACT_IFMT_LDM1_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_reglist_hi_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ - -#define EXTRACT_IFMT_STM0_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_reglist_low_st; \ - unsigned int length; -#define EXTRACT_IFMT_STM0_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_reglist_low_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ - -#define EXTRACT_IFMT_STM1_VARS \ - UINT f_op1; \ - UINT f_op2; \ - UINT f_reglist_hi_st; \ - unsigned int length; -#define EXTRACT_IFMT_STM1_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_reglist_hi_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ - -#define EXTRACT_IFMT_ENTER_VARS \ - UINT f_op1; \ - UINT f_op2; \ - USI f_u10; \ - unsigned int length; -#define EXTRACT_IFMT_ENTER_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_u10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); \ - -/* Collection of various things for the trace handler to use. */ - -typedef struct trace_record { - IADDR pc; - /* FIXME:wip */ -} TRACE_RECORD; - -#endif /* CPU_FR30BF_H */ diff --git a/sim/fr30/cpuall.h b/sim/fr30/cpuall.h deleted file mode 100644 index 59646cf481b..00000000000 --- a/sim/fr30/cpuall.h +++ /dev/null @@ -1,66 +0,0 @@ -/* Simulator CPU header for fr30. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef FR30_CPUALL_H -#define FR30_CPUALL_H - -/* Include files for each cpu family. */ - -#ifdef WANT_CPU_FR30BF -#include "eng.h" -#include "cgen-engine.h" -#include "cpu.h" -#include "decode.h" -#endif - -extern const MACH fr30_mach; - -#ifndef WANT_CPU -/* The ARGBUF struct. */ -struct argbuf { - /* These are the baseclass definitions. */ - IADDR addr; - const IDESC *idesc; - char trace_p; - char profile_p; - /* ??? Temporary hack for skip insns. */ - char skip_count; - char unused; - /* cpu specific data follows */ -}; -#endif - -#ifndef WANT_CPU -/* A cached insn. - - ??? SCACHE used to contain more than just argbuf. We could delete the - type entirely and always just use ARGBUF, but for future concerns and as - a level of abstraction it is left in. */ - -struct scache { - struct argbuf argbuf; -}; -#endif - -#endif /* FR30_CPUALL_H */ diff --git a/sim/fr30/decode.c b/sim/fr30/decode.c deleted file mode 100644 index ff01ce5ae2e..00000000000 --- a/sim/fr30/decode.c +++ /dev/null @@ -1,2956 +0,0 @@ -/* Simulator instruction decoder for fr30bf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU fr30bf -#define WANT_CPU_FR30BF - -#include "sim-main.h" -#include "sim-assert.h" - -/* The instruction descriptor array. - This is computed at runtime. Space for it is not malloc'd to save a - teensy bit of cpu in the decoder. Moving it to malloc space is trivial - but won't be done until necessary (we don't currently support the runtime - addition of instructions nor an SMP machine with different cpus). */ -static IDESC fr30bf_insn_data[FR30BF_INSN_MAX]; - -/* Commas between elements are contained in the macros. - Some of these are conditionally compiled out. */ - -static const struct insn_sem fr30bf_insn_sem[] = -{ - { VIRTUAL_INSN_X_INVALID, FR30BF_INSN_X_INVALID, FR30BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, FR30BF_INSN_X_AFTER, FR30BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, FR30BF_INSN_X_BEFORE, FR30BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, FR30BF_INSN_X_CTI_CHAIN, FR30BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, FR30BF_INSN_X_CHAIN, FR30BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, FR30BF_INSN_X_BEGIN, FR30BF_SFMT_EMPTY }, - { FR30_INSN_ADD, FR30BF_INSN_ADD, FR30BF_SFMT_ADD }, - { FR30_INSN_ADDI, FR30BF_INSN_ADDI, FR30BF_SFMT_ADDI }, - { FR30_INSN_ADD2, FR30BF_INSN_ADD2, FR30BF_SFMT_ADD2 }, - { FR30_INSN_ADDC, FR30BF_INSN_ADDC, FR30BF_SFMT_ADDC }, - { FR30_INSN_ADDN, FR30BF_INSN_ADDN, FR30BF_SFMT_ADDN }, - { FR30_INSN_ADDNI, FR30BF_INSN_ADDNI, FR30BF_SFMT_ADDNI }, - { FR30_INSN_ADDN2, FR30BF_INSN_ADDN2, FR30BF_SFMT_ADDN2 }, - { FR30_INSN_SUB, FR30BF_INSN_SUB, FR30BF_SFMT_ADD }, - { FR30_INSN_SUBC, FR30BF_INSN_SUBC, FR30BF_SFMT_ADDC }, - { FR30_INSN_SUBN, FR30BF_INSN_SUBN, FR30BF_SFMT_ADDN }, - { FR30_INSN_CMP, FR30BF_INSN_CMP, FR30BF_SFMT_CMP }, - { FR30_INSN_CMPI, FR30BF_INSN_CMPI, FR30BF_SFMT_CMPI }, - { FR30_INSN_CMP2, FR30BF_INSN_CMP2, FR30BF_SFMT_CMP2 }, - { FR30_INSN_AND, FR30BF_INSN_AND, FR30BF_SFMT_AND }, - { FR30_INSN_OR, FR30BF_INSN_OR, FR30BF_SFMT_AND }, - { FR30_INSN_EOR, FR30BF_INSN_EOR, FR30BF_SFMT_AND }, - { FR30_INSN_ANDM, FR30BF_INSN_ANDM, FR30BF_SFMT_ANDM }, - { FR30_INSN_ANDH, FR30BF_INSN_ANDH, FR30BF_SFMT_ANDH }, - { FR30_INSN_ANDB, FR30BF_INSN_ANDB, FR30BF_SFMT_ANDB }, - { FR30_INSN_ORM, FR30BF_INSN_ORM, FR30BF_SFMT_ANDM }, - { FR30_INSN_ORH, FR30BF_INSN_ORH, FR30BF_SFMT_ANDH }, - { FR30_INSN_ORB, FR30BF_INSN_ORB, FR30BF_SFMT_ANDB }, - { FR30_INSN_EORM, FR30BF_INSN_EORM, FR30BF_SFMT_ANDM }, - { FR30_INSN_EORH, FR30BF_INSN_EORH, FR30BF_SFMT_ANDH }, - { FR30_INSN_EORB, FR30BF_INSN_EORB, FR30BF_SFMT_ANDB }, - { FR30_INSN_BANDL, FR30BF_INSN_BANDL, FR30BF_SFMT_BANDL }, - { FR30_INSN_BORL, FR30BF_INSN_BORL, FR30BF_SFMT_BANDL }, - { FR30_INSN_BEORL, FR30BF_INSN_BEORL, FR30BF_SFMT_BANDL }, - { FR30_INSN_BANDH, FR30BF_INSN_BANDH, FR30BF_SFMT_BANDL }, - { FR30_INSN_BORH, FR30BF_INSN_BORH, FR30BF_SFMT_BANDL }, - { FR30_INSN_BEORH, FR30BF_INSN_BEORH, FR30BF_SFMT_BANDL }, - { FR30_INSN_BTSTL, FR30BF_INSN_BTSTL, FR30BF_SFMT_BTSTL }, - { FR30_INSN_BTSTH, FR30BF_INSN_BTSTH, FR30BF_SFMT_BTSTL }, - { FR30_INSN_MUL, FR30BF_INSN_MUL, FR30BF_SFMT_MUL }, - { FR30_INSN_MULU, FR30BF_INSN_MULU, FR30BF_SFMT_MULU }, - { FR30_INSN_MULH, FR30BF_INSN_MULH, FR30BF_SFMT_MULH }, - { FR30_INSN_MULUH, FR30BF_INSN_MULUH, FR30BF_SFMT_MULH }, - { FR30_INSN_DIV0S, FR30BF_INSN_DIV0S, FR30BF_SFMT_DIV0S }, - { FR30_INSN_DIV0U, FR30BF_INSN_DIV0U, FR30BF_SFMT_DIV0U }, - { FR30_INSN_DIV1, FR30BF_INSN_DIV1, FR30BF_SFMT_DIV1 }, - { FR30_INSN_DIV2, FR30BF_INSN_DIV2, FR30BF_SFMT_DIV2 }, - { FR30_INSN_DIV3, FR30BF_INSN_DIV3, FR30BF_SFMT_DIV3 }, - { FR30_INSN_DIV4S, FR30BF_INSN_DIV4S, FR30BF_SFMT_DIV4S }, - { FR30_INSN_LSL, FR30BF_INSN_LSL, FR30BF_SFMT_LSL }, - { FR30_INSN_LSLI, FR30BF_INSN_LSLI, FR30BF_SFMT_LSLI }, - { FR30_INSN_LSL2, FR30BF_INSN_LSL2, FR30BF_SFMT_LSLI }, - { FR30_INSN_LSR, FR30BF_INSN_LSR, FR30BF_SFMT_LSL }, - { FR30_INSN_LSRI, FR30BF_INSN_LSRI, FR30BF_SFMT_LSLI }, - { FR30_INSN_LSR2, FR30BF_INSN_LSR2, FR30BF_SFMT_LSLI }, - { FR30_INSN_ASR, FR30BF_INSN_ASR, FR30BF_SFMT_LSL }, - { FR30_INSN_ASRI, FR30BF_INSN_ASRI, FR30BF_SFMT_LSLI }, - { FR30_INSN_ASR2, FR30BF_INSN_ASR2, FR30BF_SFMT_LSLI }, - { FR30_INSN_LDI8, FR30BF_INSN_LDI8, FR30BF_SFMT_LDI8 }, - { FR30_INSN_LDI20, FR30BF_INSN_LDI20, FR30BF_SFMT_LDI20 }, - { FR30_INSN_LDI32, FR30BF_INSN_LDI32, FR30BF_SFMT_LDI32 }, - { FR30_INSN_LD, FR30BF_INSN_LD, FR30BF_SFMT_LD }, - { FR30_INSN_LDUH, FR30BF_INSN_LDUH, FR30BF_SFMT_LD }, - { FR30_INSN_LDUB, FR30BF_INSN_LDUB, FR30BF_SFMT_LD }, - { FR30_INSN_LDR13, FR30BF_INSN_LDR13, FR30BF_SFMT_LDR13 }, - { FR30_INSN_LDR13UH, FR30BF_INSN_LDR13UH, FR30BF_SFMT_LDR13 }, - { FR30_INSN_LDR13UB, FR30BF_INSN_LDR13UB, FR30BF_SFMT_LDR13 }, - { FR30_INSN_LDR14, FR30BF_INSN_LDR14, FR30BF_SFMT_LDR14 }, - { FR30_INSN_LDR14UH, FR30BF_INSN_LDR14UH, FR30BF_SFMT_LDR14UH }, - { FR30_INSN_LDR14UB, FR30BF_INSN_LDR14UB, FR30BF_SFMT_LDR14UB }, - { FR30_INSN_LDR15, FR30BF_INSN_LDR15, FR30BF_SFMT_LDR15 }, - { FR30_INSN_LDR15GR, FR30BF_INSN_LDR15GR, FR30BF_SFMT_LDR15GR }, - { FR30_INSN_LDR15DR, FR30BF_INSN_LDR15DR, FR30BF_SFMT_LDR15DR }, - { FR30_INSN_LDR15PS, FR30BF_INSN_LDR15PS, FR30BF_SFMT_LDR15PS }, - { FR30_INSN_ST, FR30BF_INSN_ST, FR30BF_SFMT_ST }, - { FR30_INSN_STH, FR30BF_INSN_STH, FR30BF_SFMT_ST }, - { FR30_INSN_STB, FR30BF_INSN_STB, FR30BF_SFMT_ST }, - { FR30_INSN_STR13, FR30BF_INSN_STR13, FR30BF_SFMT_STR13 }, - { FR30_INSN_STR13H, FR30BF_INSN_STR13H, FR30BF_SFMT_STR13 }, - { FR30_INSN_STR13B, FR30BF_INSN_STR13B, FR30BF_SFMT_STR13 }, - { FR30_INSN_STR14, FR30BF_INSN_STR14, FR30BF_SFMT_STR14 }, - { FR30_INSN_STR14H, FR30BF_INSN_STR14H, FR30BF_SFMT_STR14H }, - { FR30_INSN_STR14B, FR30BF_INSN_STR14B, FR30BF_SFMT_STR14B }, - { FR30_INSN_STR15, FR30BF_INSN_STR15, FR30BF_SFMT_STR15 }, - { FR30_INSN_STR15GR, FR30BF_INSN_STR15GR, FR30BF_SFMT_STR15GR }, - { FR30_INSN_STR15DR, FR30BF_INSN_STR15DR, FR30BF_SFMT_STR15DR }, - { FR30_INSN_STR15PS, FR30BF_INSN_STR15PS, FR30BF_SFMT_STR15PS }, - { FR30_INSN_MOV, FR30BF_INSN_MOV, FR30BF_SFMT_MOV }, - { FR30_INSN_MOVDR, FR30BF_INSN_MOVDR, FR30BF_SFMT_MOVDR }, - { FR30_INSN_MOVPS, FR30BF_INSN_MOVPS, FR30BF_SFMT_MOVPS }, - { FR30_INSN_MOV2DR, FR30BF_INSN_MOV2DR, FR30BF_SFMT_MOV2DR }, - { FR30_INSN_MOV2PS, FR30BF_INSN_MOV2PS, FR30BF_SFMT_MOV2PS }, - { FR30_INSN_JMP, FR30BF_INSN_JMP, FR30BF_SFMT_JMP }, - { FR30_INSN_JMPD, FR30BF_INSN_JMPD, FR30BF_SFMT_JMP }, - { FR30_INSN_CALLR, FR30BF_INSN_CALLR, FR30BF_SFMT_CALLR }, - { FR30_INSN_CALLRD, FR30BF_INSN_CALLRD, FR30BF_SFMT_CALLR }, - { FR30_INSN_CALL, FR30BF_INSN_CALL, FR30BF_SFMT_CALL }, - { FR30_INSN_CALLD, FR30BF_INSN_CALLD, FR30BF_SFMT_CALL }, - { FR30_INSN_RET, FR30BF_INSN_RET, FR30BF_SFMT_RET }, - { FR30_INSN_RET_D, FR30BF_INSN_RET_D, FR30BF_SFMT_RET }, - { FR30_INSN_INT, FR30BF_INSN_INT, FR30BF_SFMT_INT }, - { FR30_INSN_INTE, FR30BF_INSN_INTE, FR30BF_SFMT_INTE }, - { FR30_INSN_RETI, FR30BF_INSN_RETI, FR30BF_SFMT_RETI }, - { FR30_INSN_BRAD, FR30BF_INSN_BRAD, FR30BF_SFMT_BRAD }, - { FR30_INSN_BRA, FR30BF_INSN_BRA, FR30BF_SFMT_BRAD }, - { FR30_INSN_BNOD, FR30BF_INSN_BNOD, FR30BF_SFMT_BNOD }, - { FR30_INSN_BNO, FR30BF_INSN_BNO, FR30BF_SFMT_BNOD }, - { FR30_INSN_BEQD, FR30BF_INSN_BEQD, FR30BF_SFMT_BEQD }, - { FR30_INSN_BEQ, FR30BF_INSN_BEQ, FR30BF_SFMT_BEQD }, - { FR30_INSN_BNED, FR30BF_INSN_BNED, FR30BF_SFMT_BEQD }, - { FR30_INSN_BNE, FR30BF_INSN_BNE, FR30BF_SFMT_BEQD }, - { FR30_INSN_BCD, FR30BF_INSN_BCD, FR30BF_SFMT_BCD }, - { FR30_INSN_BC, FR30BF_INSN_BC, FR30BF_SFMT_BCD }, - { FR30_INSN_BNCD, FR30BF_INSN_BNCD, FR30BF_SFMT_BCD }, - { FR30_INSN_BNC, FR30BF_INSN_BNC, FR30BF_SFMT_BCD }, - { FR30_INSN_BND, FR30BF_INSN_BND, FR30BF_SFMT_BND }, - { FR30_INSN_BN, FR30BF_INSN_BN, FR30BF_SFMT_BND }, - { FR30_INSN_BPD, FR30BF_INSN_BPD, FR30BF_SFMT_BND }, - { FR30_INSN_BP, FR30BF_INSN_BP, FR30BF_SFMT_BND }, - { FR30_INSN_BVD, FR30BF_INSN_BVD, FR30BF_SFMT_BVD }, - { FR30_INSN_BV, FR30BF_INSN_BV, FR30BF_SFMT_BVD }, - { FR30_INSN_BNVD, FR30BF_INSN_BNVD, FR30BF_SFMT_BVD }, - { FR30_INSN_BNV, FR30BF_INSN_BNV, FR30BF_SFMT_BVD }, - { FR30_INSN_BLTD, FR30BF_INSN_BLTD, FR30BF_SFMT_BLTD }, - { FR30_INSN_BLT, FR30BF_INSN_BLT, FR30BF_SFMT_BLTD }, - { FR30_INSN_BGED, FR30BF_INSN_BGED, FR30BF_SFMT_BLTD }, - { FR30_INSN_BGE, FR30BF_INSN_BGE, FR30BF_SFMT_BLTD }, - { FR30_INSN_BLED, FR30BF_INSN_BLED, FR30BF_SFMT_BLED }, - { FR30_INSN_BLE, FR30BF_INSN_BLE, FR30BF_SFMT_BLED }, - { FR30_INSN_BGTD, FR30BF_INSN_BGTD, FR30BF_SFMT_BLED }, - { FR30_INSN_BGT, FR30BF_INSN_BGT, FR30BF_SFMT_BLED }, - { FR30_INSN_BLSD, FR30BF_INSN_BLSD, FR30BF_SFMT_BLSD }, - { FR30_INSN_BLS, FR30BF_INSN_BLS, FR30BF_SFMT_BLSD }, - { FR30_INSN_BHID, FR30BF_INSN_BHID, FR30BF_SFMT_BLSD }, - { FR30_INSN_BHI, FR30BF_INSN_BHI, FR30BF_SFMT_BLSD }, - { FR30_INSN_DMOVR13, FR30BF_INSN_DMOVR13, FR30BF_SFMT_DMOVR13 }, - { FR30_INSN_DMOVR13H, FR30BF_INSN_DMOVR13H, FR30BF_SFMT_DMOVR13H }, - { FR30_INSN_DMOVR13B, FR30BF_INSN_DMOVR13B, FR30BF_SFMT_DMOVR13B }, - { FR30_INSN_DMOVR13PI, FR30BF_INSN_DMOVR13PI, FR30BF_SFMT_DMOVR13PI }, - { FR30_INSN_DMOVR13PIH, FR30BF_INSN_DMOVR13PIH, FR30BF_SFMT_DMOVR13PIH }, - { FR30_INSN_DMOVR13PIB, FR30BF_INSN_DMOVR13PIB, FR30BF_SFMT_DMOVR13PIB }, - { FR30_INSN_DMOVR15PI, FR30BF_INSN_DMOVR15PI, FR30BF_SFMT_DMOVR15PI }, - { FR30_INSN_DMOV2R13, FR30BF_INSN_DMOV2R13, FR30BF_SFMT_DMOV2R13 }, - { FR30_INSN_DMOV2R13H, FR30BF_INSN_DMOV2R13H, FR30BF_SFMT_DMOV2R13H }, - { FR30_INSN_DMOV2R13B, FR30BF_INSN_DMOV2R13B, FR30BF_SFMT_DMOV2R13B }, - { FR30_INSN_DMOV2R13PI, FR30BF_INSN_DMOV2R13PI, FR30BF_SFMT_DMOV2R13PI }, - { FR30_INSN_DMOV2R13PIH, FR30BF_INSN_DMOV2R13PIH, FR30BF_SFMT_DMOV2R13PIH }, - { FR30_INSN_DMOV2R13PIB, FR30BF_INSN_DMOV2R13PIB, FR30BF_SFMT_DMOV2R13PIB }, - { FR30_INSN_DMOV2R15PD, FR30BF_INSN_DMOV2R15PD, FR30BF_SFMT_DMOV2R15PD }, - { FR30_INSN_LDRES, FR30BF_INSN_LDRES, FR30BF_SFMT_LDRES }, - { FR30_INSN_STRES, FR30BF_INSN_STRES, FR30BF_SFMT_LDRES }, - { FR30_INSN_COPOP, FR30BF_INSN_COPOP, FR30BF_SFMT_COPOP }, - { FR30_INSN_COPLD, FR30BF_INSN_COPLD, FR30BF_SFMT_COPOP }, - { FR30_INSN_COPST, FR30BF_INSN_COPST, FR30BF_SFMT_COPOP }, - { FR30_INSN_COPSV, FR30BF_INSN_COPSV, FR30BF_SFMT_COPOP }, - { FR30_INSN_NOP, FR30BF_INSN_NOP, FR30BF_SFMT_BNOD }, - { FR30_INSN_ANDCCR, FR30BF_INSN_ANDCCR, FR30BF_SFMT_ANDCCR }, - { FR30_INSN_ORCCR, FR30BF_INSN_ORCCR, FR30BF_SFMT_ANDCCR }, - { FR30_INSN_STILM, FR30BF_INSN_STILM, FR30BF_SFMT_STILM }, - { FR30_INSN_ADDSP, FR30BF_INSN_ADDSP, FR30BF_SFMT_ADDSP }, - { FR30_INSN_EXTSB, FR30BF_INSN_EXTSB, FR30BF_SFMT_EXTSB }, - { FR30_INSN_EXTUB, FR30BF_INSN_EXTUB, FR30BF_SFMT_EXTUB }, - { FR30_INSN_EXTSH, FR30BF_INSN_EXTSH, FR30BF_SFMT_EXTSH }, - { FR30_INSN_EXTUH, FR30BF_INSN_EXTUH, FR30BF_SFMT_EXTUH }, - { FR30_INSN_LDM0, FR30BF_INSN_LDM0, FR30BF_SFMT_LDM0 }, - { FR30_INSN_LDM1, FR30BF_INSN_LDM1, FR30BF_SFMT_LDM1 }, - { FR30_INSN_STM0, FR30BF_INSN_STM0, FR30BF_SFMT_STM0 }, - { FR30_INSN_STM1, FR30BF_INSN_STM1, FR30BF_SFMT_STM1 }, - { FR30_INSN_ENTER, FR30BF_INSN_ENTER, FR30BF_SFMT_ENTER }, - { FR30_INSN_LEAVE, FR30BF_INSN_LEAVE, FR30BF_SFMT_LEAVE }, - { FR30_INSN_XCHB, FR30BF_INSN_XCHB, FR30BF_SFMT_XCHB }, -}; - -static const struct insn_sem fr30bf_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, FR30BF_INSN_X_INVALID, FR30BF_SFMT_EMPTY -}; - -/* Initialize an IDESC from the compile-time computable parts. */ - -static INLINE void -init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) -{ - const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; - - id->num = t->index; - id->sfmt = t->sfmt; - if ((int) t->type <= 0) - id->idata = & cgen_virtual_insn_table[- (int) t->type]; - else - id->idata = & insn_table[t->type]; - id->attrs = CGEN_INSN_ATTRS (id->idata); - /* Oh my god, a magic number. */ - id->length = CGEN_INSN_BITSIZE (id->idata) / 8; - -#if WITH_PROFILE_MODEL_P - id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; - { - SIM_DESC sd = CPU_STATE (cpu); - SIM_ASSERT (t->index == id->timing->num); - } -#endif - - /* Semantic pointers are initialized elsewhere. */ -} - -/* Initialize the instruction descriptor table. */ - -void -fr30bf_init_idesc_table (SIM_CPU *cpu) -{ - IDESC *id,*tabend; - const struct insn_sem *t,*tend; - int tabsize = FR30BF_INSN_MAX; - IDESC *table = fr30bf_insn_data; - - memset (table, 0, tabsize * sizeof (IDESC)); - - /* First set all entries to the `invalid insn'. */ - t = & fr30bf_insn_sem_invalid; - for (id = table, tabend = table + tabsize; id < tabend; ++id) - init_idesc (cpu, id, t); - - /* Now fill in the values for the chosen cpu. */ - for (t = fr30bf_insn_sem, tend = t + sizeof (fr30bf_insn_sem) / sizeof (*t); - t != tend; ++t) - { - init_idesc (cpu, & table[t->index], t); - } - - /* Link the IDESC table into the cpu. */ - CPU_IDESC (cpu) = table; -} - -/* Given an instruction, return a pointer to its IDESC entry. */ - -const IDESC * -fr30bf_decode (SIM_CPU *current_cpu, IADDR pc, - CGEN_INSN_INT base_insn, - ARGBUF *abuf) -{ - /* Result of decoder. */ - FR30BF_INSN_TYPE itype; - CGEN_INSN_INT insn = base_insn; - - { - - { - unsigned int val = (((insn >> 8) & (255 << 0))); - switch (val) - { - case 0 : itype = FR30BF_INSN_LDR13; goto extract_sfmt_ldr13; case 1 : itype = FR30BF_INSN_LDR13UH; goto extract_sfmt_ldr13; case 2 : itype = FR30BF_INSN_LDR13UB; goto extract_sfmt_ldr13; case 3 : itype = FR30BF_INSN_LDR15; goto extract_sfmt_ldr15; case 4 : itype = FR30BF_INSN_LD; goto extract_sfmt_ld; case 5 : itype = FR30BF_INSN_LDUH; goto extract_sfmt_ld; case 6 : itype = FR30BF_INSN_LDUB; goto extract_sfmt_ld; case 7 : - { - unsigned int val = (((insn >> 6) & (1 << 1)) | ((insn >> 4) & (1 << 0))); - switch (val) - { - case 0 : itype = FR30BF_INSN_LDR15GR; goto extract_sfmt_ldr15gr; case 1 : itype = FR30BF_INSN_MOV2PS; goto extract_sfmt_mov2ps; case 2 : itype = FR30BF_INSN_LDR15DR; goto extract_sfmt_ldr15dr; case 3 : itype = FR30BF_INSN_LDR15PS; goto extract_sfmt_ldr15ps; default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 8 : itype = FR30BF_INSN_DMOV2R13; goto extract_sfmt_dmov2r13; case 9 : itype = FR30BF_INSN_DMOV2R13H; goto extract_sfmt_dmov2r13h; case 10 : itype = FR30BF_INSN_DMOV2R13B; goto extract_sfmt_dmov2r13b; case 11 : itype = FR30BF_INSN_DMOV2R15PD; goto extract_sfmt_dmov2r15pd; case 12 : itype = FR30BF_INSN_DMOV2R13PI; goto extract_sfmt_dmov2r13pi; case 13 : itype = FR30BF_INSN_DMOV2R13PIH; goto extract_sfmt_dmov2r13pih; case 14 : itype = FR30BF_INSN_DMOV2R13PIB; goto extract_sfmt_dmov2r13pib; case 15 : itype = FR30BF_INSN_ENTER; goto extract_sfmt_enter; case 16 : itype = FR30BF_INSN_STR13; goto extract_sfmt_str13; case 17 : itype = FR30BF_INSN_STR13H; goto extract_sfmt_str13; case 18 : itype = FR30BF_INSN_STR13B; goto extract_sfmt_str13; case 19 : itype = FR30BF_INSN_STR15; goto extract_sfmt_str15; case 20 : itype = FR30BF_INSN_ST; goto extract_sfmt_st; case 21 : itype = FR30BF_INSN_STH; goto extract_sfmt_st; case 22 : itype = FR30BF_INSN_STB; goto extract_sfmt_st; case 23 : - { - unsigned int val = (((insn >> 6) & (1 << 1)) | ((insn >> 4) & (1 << 0))); - switch (val) - { - case 0 : itype = FR30BF_INSN_STR15GR; goto extract_sfmt_str15gr; case 1 : itype = FR30BF_INSN_MOVPS; goto extract_sfmt_movps; case 2 : itype = FR30BF_INSN_STR15DR; goto extract_sfmt_str15dr; case 3 : itype = FR30BF_INSN_STR15PS; goto extract_sfmt_str15ps; default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 24 : itype = FR30BF_INSN_DMOVR13; goto extract_sfmt_dmovr13; case 25 : itype = FR30BF_INSN_DMOVR13H; goto extract_sfmt_dmovr13h; case 26 : itype = FR30BF_INSN_DMOVR13B; goto extract_sfmt_dmovr13b; case 27 : itype = FR30BF_INSN_DMOVR15PI; goto extract_sfmt_dmovr15pi; case 28 : itype = FR30BF_INSN_DMOVR13PI; goto extract_sfmt_dmovr13pi; case 29 : itype = FR30BF_INSN_DMOVR13PIH; goto extract_sfmt_dmovr13pih; case 30 : itype = FR30BF_INSN_DMOVR13PIB; goto extract_sfmt_dmovr13pib; case 31 : itype = FR30BF_INSN_INT; goto extract_sfmt_int; case 32 : /* fall through */ - case 33 : /* fall through */ - case 34 : /* fall through */ - case 35 : /* fall through */ - case 36 : /* fall through */ - case 37 : /* fall through */ - case 38 : /* fall through */ - case 39 : /* fall through */ - case 40 : /* fall through */ - case 41 : /* fall through */ - case 42 : /* fall through */ - case 43 : /* fall through */ - case 44 : /* fall through */ - case 45 : /* fall through */ - case 46 : /* fall through */ - case 47 : itype = FR30BF_INSN_LDR14; goto extract_sfmt_ldr14; case 48 : /* fall through */ - case 49 : /* fall through */ - case 50 : /* fall through */ - case 51 : /* fall through */ - case 52 : /* fall through */ - case 53 : /* fall through */ - case 54 : /* fall through */ - case 55 : /* fall through */ - case 56 : /* fall through */ - case 57 : /* fall through */ - case 58 : /* fall through */ - case 59 : /* fall through */ - case 60 : /* fall through */ - case 61 : /* fall through */ - case 62 : /* fall through */ - case 63 : itype = FR30BF_INSN_STR14; goto extract_sfmt_str14; case 64 : /* fall through */ - case 65 : /* fall through */ - case 66 : /* fall through */ - case 67 : /* fall through */ - case 68 : /* fall through */ - case 69 : /* fall through */ - case 70 : /* fall through */ - case 71 : /* fall through */ - case 72 : /* fall through */ - case 73 : /* fall through */ - case 74 : /* fall through */ - case 75 : /* fall through */ - case 76 : /* fall through */ - case 77 : /* fall through */ - case 78 : /* fall through */ - case 79 : itype = FR30BF_INSN_LDR14UH; goto extract_sfmt_ldr14uh; case 80 : /* fall through */ - case 81 : /* fall through */ - case 82 : /* fall through */ - case 83 : /* fall through */ - case 84 : /* fall through */ - case 85 : /* fall through */ - case 86 : /* fall through */ - case 87 : /* fall through */ - case 88 : /* fall through */ - case 89 : /* fall through */ - case 90 : /* fall through */ - case 91 : /* fall through */ - case 92 : /* fall through */ - case 93 : /* fall through */ - case 94 : /* fall through */ - case 95 : itype = FR30BF_INSN_STR14H; goto extract_sfmt_str14h; case 96 : /* fall through */ - case 97 : /* fall through */ - case 98 : /* fall through */ - case 99 : /* fall through */ - case 100 : /* fall through */ - case 101 : /* fall through */ - case 102 : /* fall through */ - case 103 : /* fall through */ - case 104 : /* fall through */ - case 105 : /* fall through */ - case 106 : /* fall through */ - case 107 : /* fall through */ - case 108 : /* fall through */ - case 109 : /* fall through */ - case 110 : /* fall through */ - case 111 : itype = FR30BF_INSN_LDR14UB; goto extract_sfmt_ldr14ub; case 112 : /* fall through */ - case 113 : /* fall through */ - case 114 : /* fall through */ - case 115 : /* fall through */ - case 116 : /* fall through */ - case 117 : /* fall through */ - case 118 : /* fall through */ - case 119 : /* fall through */ - case 120 : /* fall through */ - case 121 : /* fall through */ - case 122 : /* fall through */ - case 123 : /* fall through */ - case 124 : /* fall through */ - case 125 : /* fall through */ - case 126 : /* fall through */ - case 127 : itype = FR30BF_INSN_STR14B; goto extract_sfmt_str14b; case 128 : itype = FR30BF_INSN_BANDL; goto extract_sfmt_bandl; case 129 : itype = FR30BF_INSN_BANDH; goto extract_sfmt_bandl; case 130 : itype = FR30BF_INSN_AND; goto extract_sfmt_and; case 131 : itype = FR30BF_INSN_ANDCCR; goto extract_sfmt_andccr; case 132 : itype = FR30BF_INSN_ANDM; goto extract_sfmt_andm; case 133 : itype = FR30BF_INSN_ANDH; goto extract_sfmt_andh; case 134 : itype = FR30BF_INSN_ANDB; goto extract_sfmt_andb; case 135 : itype = FR30BF_INSN_STILM; goto extract_sfmt_stilm; case 136 : itype = FR30BF_INSN_BTSTL; goto extract_sfmt_btstl; case 137 : itype = FR30BF_INSN_BTSTH; goto extract_sfmt_btstl; case 138 : itype = FR30BF_INSN_XCHB; goto extract_sfmt_xchb; case 139 : itype = FR30BF_INSN_MOV; goto extract_sfmt_mov; case 140 : itype = FR30BF_INSN_LDM0; goto extract_sfmt_ldm0; case 141 : itype = FR30BF_INSN_LDM1; goto extract_sfmt_ldm1; case 142 : itype = FR30BF_INSN_STM0; goto extract_sfmt_stm0; case 143 : itype = FR30BF_INSN_STM1; goto extract_sfmt_stm1; case 144 : itype = FR30BF_INSN_BORL; goto extract_sfmt_bandl; case 145 : itype = FR30BF_INSN_BORH; goto extract_sfmt_bandl; case 146 : itype = FR30BF_INSN_OR; goto extract_sfmt_and; case 147 : itype = FR30BF_INSN_ORCCR; goto extract_sfmt_andccr; case 148 : itype = FR30BF_INSN_ORM; goto extract_sfmt_andm; case 149 : itype = FR30BF_INSN_ORH; goto extract_sfmt_andh; case 150 : itype = FR30BF_INSN_ORB; goto extract_sfmt_andb; case 151 : - { - unsigned int val = (((insn >> 4) & (15 << 0))); - switch (val) - { - case 0 : itype = FR30BF_INSN_JMP; goto extract_sfmt_jmp; case 1 : itype = FR30BF_INSN_CALLR; goto extract_sfmt_callr; case 2 : itype = FR30BF_INSN_RET; goto extract_sfmt_ret; case 3 : itype = FR30BF_INSN_RETI; goto extract_sfmt_reti; case 4 : itype = FR30BF_INSN_DIV0S; goto extract_sfmt_div0s; case 5 : itype = FR30BF_INSN_DIV0U; goto extract_sfmt_div0u; case 6 : itype = FR30BF_INSN_DIV1; goto extract_sfmt_div1; case 7 : itype = FR30BF_INSN_DIV2; goto extract_sfmt_div2; case 8 : itype = FR30BF_INSN_EXTSB; goto extract_sfmt_extsb; case 9 : itype = FR30BF_INSN_EXTUB; goto extract_sfmt_extub; case 10 : itype = FR30BF_INSN_EXTSH; goto extract_sfmt_extsh; case 11 : itype = FR30BF_INSN_EXTUH; goto extract_sfmt_extuh; default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 152 : itype = FR30BF_INSN_BEORL; goto extract_sfmt_bandl; case 153 : itype = FR30BF_INSN_BEORH; goto extract_sfmt_bandl; case 154 : itype = FR30BF_INSN_EOR; goto extract_sfmt_and; case 155 : itype = FR30BF_INSN_LDI20; goto extract_sfmt_ldi20; case 156 : itype = FR30BF_INSN_EORM; goto extract_sfmt_andm; case 157 : itype = FR30BF_INSN_EORH; goto extract_sfmt_andh; case 158 : itype = FR30BF_INSN_EORB; goto extract_sfmt_andb; case 159 : - { - unsigned int val = (((insn >> 4) & (15 << 0))); - switch (val) - { - case 0 : itype = FR30BF_INSN_JMPD; goto extract_sfmt_jmp; case 1 : itype = FR30BF_INSN_CALLRD; goto extract_sfmt_callr; case 2 : itype = FR30BF_INSN_RET_D; goto extract_sfmt_ret; case 3 : itype = FR30BF_INSN_INTE; goto extract_sfmt_inte; case 6 : itype = FR30BF_INSN_DIV3; goto extract_sfmt_div3; case 7 : itype = FR30BF_INSN_DIV4S; goto extract_sfmt_div4s; case 8 : itype = FR30BF_INSN_LDI32; goto extract_sfmt_ldi32; case 9 : itype = FR30BF_INSN_LEAVE; goto extract_sfmt_leave; case 10 : itype = FR30BF_INSN_NOP; goto extract_sfmt_bnod; case 12 : itype = FR30BF_INSN_COPOP; goto extract_sfmt_copop; case 13 : itype = FR30BF_INSN_COPLD; goto extract_sfmt_copop; case 14 : itype = FR30BF_INSN_COPST; goto extract_sfmt_copop; case 15 : itype = FR30BF_INSN_COPSV; goto extract_sfmt_copop; default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 160 : itype = FR30BF_INSN_ADDNI; goto extract_sfmt_addni; case 161 : itype = FR30BF_INSN_ADDN2; goto extract_sfmt_addn2; case 162 : itype = FR30BF_INSN_ADDN; goto extract_sfmt_addn; case 163 : itype = FR30BF_INSN_ADDSP; goto extract_sfmt_addsp; case 164 : itype = FR30BF_INSN_ADDI; goto extract_sfmt_addi; case 165 : itype = FR30BF_INSN_ADD2; goto extract_sfmt_add2; case 166 : itype = FR30BF_INSN_ADD; goto extract_sfmt_add; case 167 : itype = FR30BF_INSN_ADDC; goto extract_sfmt_addc; case 168 : itype = FR30BF_INSN_CMPI; goto extract_sfmt_cmpi; case 169 : itype = FR30BF_INSN_CMP2; goto extract_sfmt_cmp2; case 170 : itype = FR30BF_INSN_CMP; goto extract_sfmt_cmp; case 171 : itype = FR30BF_INSN_MULU; goto extract_sfmt_mulu; case 172 : itype = FR30BF_INSN_SUB; goto extract_sfmt_add; case 173 : itype = FR30BF_INSN_SUBC; goto extract_sfmt_addc; case 174 : itype = FR30BF_INSN_SUBN; goto extract_sfmt_addn; case 175 : itype = FR30BF_INSN_MUL; goto extract_sfmt_mul; case 176 : itype = FR30BF_INSN_LSRI; goto extract_sfmt_lsli; case 177 : itype = FR30BF_INSN_LSR2; goto extract_sfmt_lsli; case 178 : itype = FR30BF_INSN_LSR; goto extract_sfmt_lsl; case 179 : itype = FR30BF_INSN_MOV2DR; goto extract_sfmt_mov2dr; case 180 : itype = FR30BF_INSN_LSLI; goto extract_sfmt_lsli; case 181 : itype = FR30BF_INSN_LSL2; goto extract_sfmt_lsli; case 182 : itype = FR30BF_INSN_LSL; goto extract_sfmt_lsl; case 183 : itype = FR30BF_INSN_MOVDR; goto extract_sfmt_movdr; case 184 : itype = FR30BF_INSN_ASRI; goto extract_sfmt_lsli; case 185 : itype = FR30BF_INSN_ASR2; goto extract_sfmt_lsli; case 186 : itype = FR30BF_INSN_ASR; goto extract_sfmt_lsl; case 187 : itype = FR30BF_INSN_MULUH; goto extract_sfmt_mulh; case 188 : itype = FR30BF_INSN_LDRES; goto extract_sfmt_ldres; case 189 : itype = FR30BF_INSN_STRES; goto extract_sfmt_ldres; case 191 : itype = FR30BF_INSN_MULH; goto extract_sfmt_mulh; case 192 : /* fall through */ - case 193 : /* fall through */ - case 194 : /* fall through */ - case 195 : /* fall through */ - case 196 : /* fall through */ - case 197 : /* fall through */ - case 198 : /* fall through */ - case 199 : /* fall through */ - case 200 : /* fall through */ - case 201 : /* fall through */ - case 202 : /* fall through */ - case 203 : /* fall through */ - case 204 : /* fall through */ - case 205 : /* fall through */ - case 206 : /* fall through */ - case 207 : itype = FR30BF_INSN_LDI8; goto extract_sfmt_ldi8; case 208 : /* fall through */ - case 209 : /* fall through */ - case 210 : /* fall through */ - case 211 : /* fall through */ - case 212 : /* fall through */ - case 213 : /* fall through */ - case 214 : /* fall through */ - case 215 : itype = FR30BF_INSN_CALL; goto extract_sfmt_call; case 216 : /* fall through */ - case 217 : /* fall through */ - case 218 : /* fall through */ - case 219 : /* fall through */ - case 220 : /* fall through */ - case 221 : /* fall through */ - case 222 : /* fall through */ - case 223 : itype = FR30BF_INSN_CALLD; goto extract_sfmt_call; case 224 : itype = FR30BF_INSN_BRA; goto extract_sfmt_brad; case 225 : itype = FR30BF_INSN_BNO; goto extract_sfmt_bnod; case 226 : itype = FR30BF_INSN_BEQ; goto extract_sfmt_beqd; case 227 : itype = FR30BF_INSN_BNE; goto extract_sfmt_beqd; case 228 : itype = FR30BF_INSN_BC; goto extract_sfmt_bcd; case 229 : itype = FR30BF_INSN_BNC; goto extract_sfmt_bcd; case 230 : itype = FR30BF_INSN_BN; goto extract_sfmt_bnd; case 231 : itype = FR30BF_INSN_BP; goto extract_sfmt_bnd; case 232 : itype = FR30BF_INSN_BV; goto extract_sfmt_bvd; case 233 : itype = FR30BF_INSN_BNV; goto extract_sfmt_bvd; case 234 : itype = FR30BF_INSN_BLT; goto extract_sfmt_bltd; case 235 : itype = FR30BF_INSN_BGE; goto extract_sfmt_bltd; case 236 : itype = FR30BF_INSN_BLE; goto extract_sfmt_bled; case 237 : itype = FR30BF_INSN_BGT; goto extract_sfmt_bled; case 238 : itype = FR30BF_INSN_BLS; goto extract_sfmt_blsd; case 239 : itype = FR30BF_INSN_BHI; goto extract_sfmt_blsd; case 240 : itype = FR30BF_INSN_BRAD; goto extract_sfmt_brad; case 241 : itype = FR30BF_INSN_BNOD; goto extract_sfmt_bnod; case 242 : itype = FR30BF_INSN_BEQD; goto extract_sfmt_beqd; case 243 : itype = FR30BF_INSN_BNED; goto extract_sfmt_beqd; case 244 : itype = FR30BF_INSN_BCD; goto extract_sfmt_bcd; case 245 : itype = FR30BF_INSN_BNCD; goto extract_sfmt_bcd; case 246 : itype = FR30BF_INSN_BND; goto extract_sfmt_bnd; case 247 : itype = FR30BF_INSN_BPD; goto extract_sfmt_bnd; case 248 : itype = FR30BF_INSN_BVD; goto extract_sfmt_bvd; case 249 : itype = FR30BF_INSN_BNVD; goto extract_sfmt_bvd; case 250 : itype = FR30BF_INSN_BLTD; goto extract_sfmt_bltd; case 251 : itype = FR30BF_INSN_BGED; goto extract_sfmt_bltd; case 252 : itype = FR30BF_INSN_BLED; goto extract_sfmt_bled; case 253 : itype = FR30BF_INSN_BGTD; goto extract_sfmt_bled; case 254 : itype = FR30BF_INSN_BLSD; goto extract_sfmt_blsd; case 255 : itype = FR30BF_INSN_BHID; goto extract_sfmt_blsd; default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - } - - /* The instruction has been decoded, now extract the fields. */ - - extract_sfmt_empty: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_add: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addi: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_u4; - UINT f_Ri; - - f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_u4) = f_u4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_add2: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_add2.f - SI f_m4; - UINT f_Ri; - - f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_m4) = f_m4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add2", "f_Ri 0x%x", 'x', f_Ri, "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addc: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addc", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addn: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addn", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addni: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_u4; - UINT f_Ri; - - f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_u4) = f_u4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addni", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addn2: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_add2.f - SI f_m4; - UINT f_Ri; - - f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_m4) = f_m4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addn2", "f_Ri 0x%x", 'x', f_Ri, "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmp: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpi: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_u4; - UINT f_Ri; - - f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_u4) = f_u4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmp2: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_add2.f - SI f_m4; - UINT f_Ri; - - f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_m4) = f_m4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp2", "f_Ri 0x%x", 'x', f_Ri, "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_and: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_andm: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andm", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_andh: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andh", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_andb: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andb", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bandl: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_u4; - UINT f_Ri; - - f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_u4) = f_u4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bandl", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_btstl: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_u4; - UINT f_Ri; - - f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_u4) = f_u4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btstl", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mul: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mul", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mulu: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulu", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mulh: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulh", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_div0s: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_mov2dr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div0s", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_div0u: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div0u", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_div1: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_mov2dr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div1", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_div2: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_mov2dr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div2", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_div3: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div3", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_div4s: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div4s", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_lsl: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lsl", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_lsli: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_u4; - UINT f_Ri; - - f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_u4) = f_u4; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lsli", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldi8: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldi8.f - UINT f_i8; - UINT f_Ri; - - f_i8 = EXTRACT_MSB0_UINT (insn, 16, 4, 8); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_i8) = f_i8; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_i8 0x%x", 'x', f_i8, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldi20: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldi20.f - UINT f_i20_16; - UINT f_i20_4; - UINT f_Ri; - UINT f_i20; - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUHI (current_cpu, pc + 2); - f_i20_16 = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 0)); - f_i20_4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); -{ - f_i20 = ((((f_i20_4) << (16))) | (f_i20_16)); -} - - /* Record the fields for the semantic handler. */ - FLD (f_i20) = f_i20; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi20", "f_i20 0x%x", 'x', f_i20, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldi32: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldi32.f - UINT f_i32; - UINT f_Ri; - /* Contents of trailing part of insn. */ - UINT word_1; - UINT word_2; - - word_1 = GETIMEMUHI (current_cpu, pc + 2); - word_2 = GETIMEMUHI (current_cpu, pc + 4); - f_i32 = (0|(EXTRACT_MSB0_UINT (word_2, 16, 0, 16) << 0)|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 16)); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_i32) = f_i32; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi32", "f_i32 0x%x", 'x', f_i32, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldr13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rj) = f_Rj; - FLD (f_Ri) = f_Ri; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr13: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldr13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rj) = f_Rj; - FLD (f_Ri) = f_Ri; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr13", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Rj) = f_Rj; - FLD (in_h_gr_13) = 13; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr14: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldr14.f - SI f_disp10; - UINT f_Ri; - - f_disp10 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (2)); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_disp10) = f_disp10; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14", "f_disp10 0x%x", 'x', f_disp10, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_14) = 14; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr14uh: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldr14uh.f - SI f_disp9; - UINT f_Ri; - - f_disp9 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (1)); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_disp9) = f_disp9; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14uh", "f_disp9 0x%x", 'x', f_disp9, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_14) = 14; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr14ub: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldr14ub.f - INT f_disp8; - UINT f_Ri; - - f_disp8 = EXTRACT_MSB0_INT (insn, 16, 4, 8); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_disp8) = f_disp8; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14ub", "f_disp8 0x%x", 'x', f_disp8, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_14) = 14; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr15: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldr15.f - USI f_udisp6; - UINT f_Ri; - - f_udisp6 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) << (2)); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_udisp6) = f_udisp6; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15", "f_udisp6 0x%x", 'x', f_udisp6, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_15) = 15; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr15gr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldr15gr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15gr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_15) = 15; - FLD (out_Ri) = f_Ri; - FLD (out_h_gr_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr15dr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - UINT f_Rs2; - - f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rs2) = f_Rs2; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_15) = 15; - FLD (out_h_gr_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldr15ps: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_addsp.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15ps", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_15) = 15; - FLD (out_h_gr_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str13: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_str13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str13", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (in_h_gr_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str14: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_str14.f - SI f_disp10; - UINT f_Ri; - - f_disp10 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (2)); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_disp10) = f_disp10; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14", "f_Ri 0x%x", 'x', f_Ri, "f_disp10 0x%x", 'x', f_disp10, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_h_gr_14) = 14; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str14h: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_str14h.f - SI f_disp9; - UINT f_Ri; - - f_disp9 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (1)); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_disp9) = f_disp9; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14h", "f_Ri 0x%x", 'x', f_Ri, "f_disp9 0x%x", 'x', f_disp9, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_h_gr_14) = 14; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str14b: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_str14b.f - INT f_disp8; - UINT f_Ri; - - f_disp8 = EXTRACT_MSB0_INT (insn, 16, 4, 8); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_disp8) = f_disp8; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14b", "f_Ri 0x%x", 'x', f_Ri, "f_disp8 0x%x", 'x', f_disp8, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_h_gr_14) = 14; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str15: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_str15.f - USI f_udisp6; - UINT f_Ri; - - f_udisp6 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) << (2)); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_udisp6) = f_udisp6; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15", "f_Ri 0x%x", 'x', f_Ri, "f_udisp6 0x%x", 'x', f_udisp6, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_h_gr_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str15gr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_str15gr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15gr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_h_gr_15) = 15; - FLD (out_h_gr_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str15dr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - UINT f_Rs2; - - f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rs2) = f_Rs2; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_15) = 15; - FLD (out_h_gr_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_str15ps: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_addsp.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15ps", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_15) = 15; - FLD (out_h_gr_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mov: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldr13.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rj) = f_Rj; - FLD (f_Ri) = f_Ri; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_movdr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_movdr.f - UINT f_Rs1; - UINT f_Ri; - - f_Rs1 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Rs1) = f_Rs1; - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movdr", "f_Rs1 0x%x", 'x', f_Rs1, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_movps: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_movdr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movps", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mov2dr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_mov2dr.f - UINT f_Rs1; - UINT f_Ri; - - f_Rs1 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rs1) = f_Rs1; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov2dr", "f_Ri 0x%x", 'x', f_Ri, "f_Rs1 0x%x", 'x', f_Rs1, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mov2ps: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_mov2dr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov2ps", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_jmp: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_mov2dr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_callr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_mov2dr.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_call: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_call.f - SI f_rel12; - - f_rel12 = ((((EXTRACT_MSB0_INT (insn, 16, 5, 11)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label12) = f_rel12; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_call", "label12 0x%x", 'x', f_rel12, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ret: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ret", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_int: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_int.f - UINT f_u8; - - f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_u8) = f_u8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_int", "f_u8 0x%x", 'x', f_u8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_inte: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_inte", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_reti: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_reti", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_brad: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_brad", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bnod: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bnod", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_beqd: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqd", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bcd: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcd", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bnd: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bnd", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bvd: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bvd", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bltd: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bltd", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bled: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bled", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_blsd: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_brad.f - SI f_rel9; - - f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); - - /* Record the fields for the semantic handler. */ - FLD (i_label9) = f_rel9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_blsd", "label9 0x%x", 'x', f_rel9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmovr13: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - USI f_dir10; - - f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmovr13h: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - USI f_dir9; - - f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir9) = f_dir9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmovr13b: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - UINT f_dir8; - - f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_dir8) = f_dir8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmovr13pi: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - USI f_dir10; - - f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_13) = 13; - FLD (out_h_gr_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmovr13pih: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - USI f_dir9; - - f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir9) = f_dir9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_13) = 13; - FLD (out_h_gr_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmovr13pib: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - UINT f_dir8; - - f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_dir8) = f_dir8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_13) = 13; - FLD (out_h_gr_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmovr15pi: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - USI f_dir10; - - f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr15pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_15) = 15; - FLD (out_h_gr_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmov2r13: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - USI f_dir10; - - f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_h_gr_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmov2r13h: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - USI f_dir9; - - f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir9) = f_dir9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_h_gr_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmov2r13b: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - UINT f_dir8; - - f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_dir8) = f_dir8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_h_gr_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmov2r13pi: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - USI f_dir10; - - f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_13) = 13; - FLD (out_h_gr_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmov2r13pih: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - USI f_dir9; - - f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir9) = f_dir9; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_13) = 13; - FLD (out_h_gr_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmov2r13pib: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - UINT f_dir8; - - f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_dir8) = f_dir8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_13) = 13; - FLD (out_h_gr_13) = 13; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_dmov2r15pd: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - USI f_dir10; - - f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_dir10) = f_dir10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r15pd", "f_dir10 0x%x", 'x', f_dir10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_15) = 15; - FLD (out_h_gr_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldres: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_add2.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldres", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_copop: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - /* Contents of trailing part of insn. */ - UINT word_1; - - word_1 = GETIMEMUHI (current_cpu, pc + 2); - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_copop", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_andccr: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_int.f - UINT f_u8; - - f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_u8) = f_u8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andccr", "f_u8 0x%x", 'x', f_u8, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_stilm: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_int.f - UINT f_u8; - - f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_u8) = f_u8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stilm", "f_u8 0x%x", 'x', f_u8, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_addsp: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_addsp.f - SI f_s10; - - f_s10 = ((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_s10) = f_s10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addsp", "f_s10 0x%x", 'x', f_s10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_15) = 15; - FLD (out_h_gr_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_extsb: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_add2.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extsb", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_extub: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_add2.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extub", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_extsh: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_add2.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extsh", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_extuh: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_add2.f - UINT f_Ri; - - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extuh", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldm0: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldm0.f - UINT f_reglist_low_ld; - - f_reglist_low_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_reglist_low_ld) = f_reglist_low_ld; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldm0", "f_reglist_low_ld 0x%x", 'x', f_reglist_low_ld, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_15) = 15; - FLD (out_h_gr_0) = 0; - FLD (out_h_gr_1) = 1; - FLD (out_h_gr_15) = 15; - FLD (out_h_gr_2) = 2; - FLD (out_h_gr_3) = 3; - FLD (out_h_gr_4) = 4; - FLD (out_h_gr_5) = 5; - FLD (out_h_gr_6) = 6; - FLD (out_h_gr_7) = 7; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldm1: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_ldm1.f - UINT f_reglist_hi_ld; - - f_reglist_hi_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_reglist_hi_ld) = f_reglist_hi_ld; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldm1", "f_reglist_hi_ld 0x%x", 'x', f_reglist_hi_ld, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_15) = 15; - FLD (out_h_gr_10) = 10; - FLD (out_h_gr_11) = 11; - FLD (out_h_gr_12) = 12; - FLD (out_h_gr_13) = 13; - FLD (out_h_gr_14) = 14; - FLD (out_h_gr_15) = 15; - FLD (out_h_gr_8) = 8; - FLD (out_h_gr_9) = 9; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stm0: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_stm0.f - UINT f_reglist_low_st; - - f_reglist_low_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_reglist_low_st) = f_reglist_low_st; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stm0", "f_reglist_low_st 0x%x", 'x', f_reglist_low_st, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_0) = 0; - FLD (in_h_gr_1) = 1; - FLD (in_h_gr_15) = 15; - FLD (in_h_gr_2) = 2; - FLD (in_h_gr_3) = 3; - FLD (in_h_gr_4) = 4; - FLD (in_h_gr_5) = 5; - FLD (in_h_gr_6) = 6; - FLD (in_h_gr_7) = 7; - FLD (out_h_gr_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stm1: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_stm1.f - UINT f_reglist_hi_st; - - f_reglist_hi_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_reglist_hi_st) = f_reglist_hi_st; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stm1", "f_reglist_hi_st 0x%x", 'x', f_reglist_hi_st, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_10) = 10; - FLD (in_h_gr_11) = 11; - FLD (in_h_gr_12) = 12; - FLD (in_h_gr_13) = 13; - FLD (in_h_gr_14) = 14; - FLD (in_h_gr_15) = 15; - FLD (in_h_gr_8) = 8; - FLD (in_h_gr_9) = 9; - FLD (out_h_gr_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_enter: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_enter.f - USI f_u10; - - f_u10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); - - /* Record the fields for the semantic handler. */ - FLD (f_u10) = f_u10; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_enter", "f_u10 0x%x", 'x', f_u10, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_14) = 14; - FLD (in_h_gr_15) = 15; - FLD (out_h_gr_14) = 14; - FLD (out_h_gr_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_leave: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_enter.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_leave", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_h_gr_14) = 14; - FLD (in_h_gr_15) = 15; - FLD (out_h_gr_14) = 14; - FLD (out_h_gr_15) = 15; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_xchb: - { - const IDESC *idesc = &fr30bf_insn_data[itype]; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_Rj; - UINT f_Ri; - - f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); - f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_Ri) = f_Ri; - FLD (f_Rj) = f_Rj; - FLD (i_Ri) = & CPU (h_gr)[f_Ri]; - FLD (i_Rj) = & CPU (h_gr)[f_Rj]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_xchb", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_Ri) = f_Ri; - FLD (in_Rj) = f_Rj; - FLD (out_Ri) = f_Ri; - } -#endif -#undef FLD - return idesc; - } - -} diff --git a/sim/fr30/decode.h b/sim/fr30/decode.h deleted file mode 100644 index 4cc1ffbc3c2..00000000000 --- a/sim/fr30/decode.h +++ /dev/null @@ -1,125 +0,0 @@ -/* Decode header for fr30bf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef FR30BF_DECODE_H -#define FR30BF_DECODE_H - -extern const IDESC *fr30bf_decode (SIM_CPU *, IADDR, - CGEN_INSN_INT, - ARGBUF *); -extern void fr30bf_init_idesc_table (SIM_CPU *); -extern void fr30bf_sem_init_idesc_table (SIM_CPU *); -extern void fr30bf_semf_init_idesc_table (SIM_CPU *); - -/* Enum declaration for instructions in cpu family fr30bf. */ -typedef enum fr30bf_insn_type { - FR30BF_INSN_X_INVALID, FR30BF_INSN_X_AFTER, FR30BF_INSN_X_BEFORE, FR30BF_INSN_X_CTI_CHAIN - , FR30BF_INSN_X_CHAIN, FR30BF_INSN_X_BEGIN, FR30BF_INSN_ADD, FR30BF_INSN_ADDI - , FR30BF_INSN_ADD2, FR30BF_INSN_ADDC, FR30BF_INSN_ADDN, FR30BF_INSN_ADDNI - , FR30BF_INSN_ADDN2, FR30BF_INSN_SUB, FR30BF_INSN_SUBC, FR30BF_INSN_SUBN - , FR30BF_INSN_CMP, FR30BF_INSN_CMPI, FR30BF_INSN_CMP2, FR30BF_INSN_AND - , FR30BF_INSN_OR, FR30BF_INSN_EOR, FR30BF_INSN_ANDM, FR30BF_INSN_ANDH - , FR30BF_INSN_ANDB, FR30BF_INSN_ORM, FR30BF_INSN_ORH, FR30BF_INSN_ORB - , FR30BF_INSN_EORM, FR30BF_INSN_EORH, FR30BF_INSN_EORB, FR30BF_INSN_BANDL - , FR30BF_INSN_BORL, FR30BF_INSN_BEORL, FR30BF_INSN_BANDH, FR30BF_INSN_BORH - , FR30BF_INSN_BEORH, FR30BF_INSN_BTSTL, FR30BF_INSN_BTSTH, FR30BF_INSN_MUL - , FR30BF_INSN_MULU, FR30BF_INSN_MULH, FR30BF_INSN_MULUH, FR30BF_INSN_DIV0S - , FR30BF_INSN_DIV0U, FR30BF_INSN_DIV1, FR30BF_INSN_DIV2, FR30BF_INSN_DIV3 - , FR30BF_INSN_DIV4S, FR30BF_INSN_LSL, FR30BF_INSN_LSLI, FR30BF_INSN_LSL2 - , FR30BF_INSN_LSR, FR30BF_INSN_LSRI, FR30BF_INSN_LSR2, FR30BF_INSN_ASR - , FR30BF_INSN_ASRI, FR30BF_INSN_ASR2, FR30BF_INSN_LDI8, FR30BF_INSN_LDI20 - , FR30BF_INSN_LDI32, FR30BF_INSN_LD, FR30BF_INSN_LDUH, FR30BF_INSN_LDUB - , FR30BF_INSN_LDR13, FR30BF_INSN_LDR13UH, FR30BF_INSN_LDR13UB, FR30BF_INSN_LDR14 - , FR30BF_INSN_LDR14UH, FR30BF_INSN_LDR14UB, FR30BF_INSN_LDR15, FR30BF_INSN_LDR15GR - , FR30BF_INSN_LDR15DR, FR30BF_INSN_LDR15PS, FR30BF_INSN_ST, FR30BF_INSN_STH - , FR30BF_INSN_STB, FR30BF_INSN_STR13, FR30BF_INSN_STR13H, FR30BF_INSN_STR13B - , FR30BF_INSN_STR14, FR30BF_INSN_STR14H, FR30BF_INSN_STR14B, FR30BF_INSN_STR15 - , FR30BF_INSN_STR15GR, FR30BF_INSN_STR15DR, FR30BF_INSN_STR15PS, FR30BF_INSN_MOV - , FR30BF_INSN_MOVDR, FR30BF_INSN_MOVPS, FR30BF_INSN_MOV2DR, FR30BF_INSN_MOV2PS - , FR30BF_INSN_JMP, FR30BF_INSN_JMPD, FR30BF_INSN_CALLR, FR30BF_INSN_CALLRD - , FR30BF_INSN_CALL, FR30BF_INSN_CALLD, FR30BF_INSN_RET, FR30BF_INSN_RET_D - , FR30BF_INSN_INT, FR30BF_INSN_INTE, FR30BF_INSN_RETI, FR30BF_INSN_BRAD - , FR30BF_INSN_BRA, FR30BF_INSN_BNOD, FR30BF_INSN_BNO, FR30BF_INSN_BEQD - , FR30BF_INSN_BEQ, FR30BF_INSN_BNED, FR30BF_INSN_BNE, FR30BF_INSN_BCD - , FR30BF_INSN_BC, FR30BF_INSN_BNCD, FR30BF_INSN_BNC, FR30BF_INSN_BND - , FR30BF_INSN_BN, FR30BF_INSN_BPD, FR30BF_INSN_BP, FR30BF_INSN_BVD - , FR30BF_INSN_BV, FR30BF_INSN_BNVD, FR30BF_INSN_BNV, FR30BF_INSN_BLTD - , FR30BF_INSN_BLT, FR30BF_INSN_BGED, FR30BF_INSN_BGE, FR30BF_INSN_BLED - , FR30BF_INSN_BLE, FR30BF_INSN_BGTD, FR30BF_INSN_BGT, FR30BF_INSN_BLSD - , FR30BF_INSN_BLS, FR30BF_INSN_BHID, FR30BF_INSN_BHI, FR30BF_INSN_DMOVR13 - , FR30BF_INSN_DMOVR13H, FR30BF_INSN_DMOVR13B, FR30BF_INSN_DMOVR13PI, FR30BF_INSN_DMOVR13PIH - , FR30BF_INSN_DMOVR13PIB, FR30BF_INSN_DMOVR15PI, FR30BF_INSN_DMOV2R13, FR30BF_INSN_DMOV2R13H - , FR30BF_INSN_DMOV2R13B, FR30BF_INSN_DMOV2R13PI, FR30BF_INSN_DMOV2R13PIH, FR30BF_INSN_DMOV2R13PIB - , FR30BF_INSN_DMOV2R15PD, FR30BF_INSN_LDRES, FR30BF_INSN_STRES, FR30BF_INSN_COPOP - , FR30BF_INSN_COPLD, FR30BF_INSN_COPST, FR30BF_INSN_COPSV, FR30BF_INSN_NOP - , FR30BF_INSN_ANDCCR, FR30BF_INSN_ORCCR, FR30BF_INSN_STILM, FR30BF_INSN_ADDSP - , FR30BF_INSN_EXTSB, FR30BF_INSN_EXTUB, FR30BF_INSN_EXTSH, FR30BF_INSN_EXTUH - , FR30BF_INSN_LDM0, FR30BF_INSN_LDM1, FR30BF_INSN_STM0, FR30BF_INSN_STM1 - , FR30BF_INSN_ENTER, FR30BF_INSN_LEAVE, FR30BF_INSN_XCHB, FR30BF_INSN_MAX -} FR30BF_INSN_TYPE; - -/* Enum declaration for semantic formats in cpu family fr30bf. */ -typedef enum fr30bf_sfmt_type { - FR30BF_SFMT_EMPTY, FR30BF_SFMT_ADD, FR30BF_SFMT_ADDI, FR30BF_SFMT_ADD2 - , FR30BF_SFMT_ADDC, FR30BF_SFMT_ADDN, FR30BF_SFMT_ADDNI, FR30BF_SFMT_ADDN2 - , FR30BF_SFMT_CMP, FR30BF_SFMT_CMPI, FR30BF_SFMT_CMP2, FR30BF_SFMT_AND - , FR30BF_SFMT_ANDM, FR30BF_SFMT_ANDH, FR30BF_SFMT_ANDB, FR30BF_SFMT_BANDL - , FR30BF_SFMT_BTSTL, FR30BF_SFMT_MUL, FR30BF_SFMT_MULU, FR30BF_SFMT_MULH - , FR30BF_SFMT_DIV0S, FR30BF_SFMT_DIV0U, FR30BF_SFMT_DIV1, FR30BF_SFMT_DIV2 - , FR30BF_SFMT_DIV3, FR30BF_SFMT_DIV4S, FR30BF_SFMT_LSL, FR30BF_SFMT_LSLI - , FR30BF_SFMT_LDI8, FR30BF_SFMT_LDI20, FR30BF_SFMT_LDI32, FR30BF_SFMT_LD - , FR30BF_SFMT_LDR13, FR30BF_SFMT_LDR14, FR30BF_SFMT_LDR14UH, FR30BF_SFMT_LDR14UB - , FR30BF_SFMT_LDR15, FR30BF_SFMT_LDR15GR, FR30BF_SFMT_LDR15DR, FR30BF_SFMT_LDR15PS - , FR30BF_SFMT_ST, FR30BF_SFMT_STR13, FR30BF_SFMT_STR14, FR30BF_SFMT_STR14H - , FR30BF_SFMT_STR14B, FR30BF_SFMT_STR15, FR30BF_SFMT_STR15GR, FR30BF_SFMT_STR15DR - , FR30BF_SFMT_STR15PS, FR30BF_SFMT_MOV, FR30BF_SFMT_MOVDR, FR30BF_SFMT_MOVPS - , FR30BF_SFMT_MOV2DR, FR30BF_SFMT_MOV2PS, FR30BF_SFMT_JMP, FR30BF_SFMT_CALLR - , FR30BF_SFMT_CALL, FR30BF_SFMT_RET, FR30BF_SFMT_INT, FR30BF_SFMT_INTE - , FR30BF_SFMT_RETI, FR30BF_SFMT_BRAD, FR30BF_SFMT_BNOD, FR30BF_SFMT_BEQD - , FR30BF_SFMT_BCD, FR30BF_SFMT_BND, FR30BF_SFMT_BVD, FR30BF_SFMT_BLTD - , FR30BF_SFMT_BLED, FR30BF_SFMT_BLSD, FR30BF_SFMT_DMOVR13, FR30BF_SFMT_DMOVR13H - , FR30BF_SFMT_DMOVR13B, FR30BF_SFMT_DMOVR13PI, FR30BF_SFMT_DMOVR13PIH, FR30BF_SFMT_DMOVR13PIB - , FR30BF_SFMT_DMOVR15PI, FR30BF_SFMT_DMOV2R13, FR30BF_SFMT_DMOV2R13H, FR30BF_SFMT_DMOV2R13B - , FR30BF_SFMT_DMOV2R13PI, FR30BF_SFMT_DMOV2R13PIH, FR30BF_SFMT_DMOV2R13PIB, FR30BF_SFMT_DMOV2R15PD - , FR30BF_SFMT_LDRES, FR30BF_SFMT_COPOP, FR30BF_SFMT_ANDCCR, FR30BF_SFMT_STILM - , FR30BF_SFMT_ADDSP, FR30BF_SFMT_EXTSB, FR30BF_SFMT_EXTUB, FR30BF_SFMT_EXTSH - , FR30BF_SFMT_EXTUH, FR30BF_SFMT_LDM0, FR30BF_SFMT_LDM1, FR30BF_SFMT_STM0 - , FR30BF_SFMT_STM1, FR30BF_SFMT_ENTER, FR30BF_SFMT_LEAVE, FR30BF_SFMT_XCHB -} FR30BF_SFMT_TYPE; - -/* Function unit handlers (user written). */ - -extern int fr30bf_model_fr30_1_u_stm (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*reglist*/); -extern int fr30bf_model_fr30_1_u_ldm (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*reglist*/); -extern int fr30bf_model_fr30_1_u_store (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/, INT /*Rj*/); -extern int fr30bf_model_fr30_1_u_load (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rj*/, INT /*Ri*/); -extern int fr30bf_model_fr30_1_u_cti (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/); -extern int fr30bf_model_fr30_1_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/, INT /*Rj*/, INT /*Ri*/); - -/* Profiling before/after handlers (user written) */ - -extern void fr30bf_model_insn_before (SIM_CPU *, int /*first_p*/); -extern void fr30bf_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/); - -#endif /* FR30BF_DECODE_H */ diff --git a/sim/fr30/devices.c b/sim/fr30/devices.c deleted file mode 100644 index a3d47cf765d..00000000000 --- a/sim/fr30/devices.c +++ /dev/null @@ -1,98 +0,0 @@ -/* fr30 device support - Copyright (C) 1998, 1999 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -/* ??? All of this is just to get something going. wip! */ - -#include "sim-main.h" - -#ifdef HAVE_DV_SOCKSER -#include "dv-sockser.h" -#endif - -device fr30_devices; - -int -device_io_read_buffer (device *me, void *source, int space, - address_word addr, unsigned nr_bytes, - SIM_DESC sd, SIM_CPU *cpu, sim_cia cia) -{ - if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT) - return nr_bytes; - -#ifdef HAVE_DV_SOCKSER - if (addr == UART_INCHAR_ADDR) - { - int c = dv_sockser_read (sd); - if (c == -1) - return 0; - *(char *) source = c; - return 1; - } - if (addr == UART_STATUS_ADDR) - { - int status = dv_sockser_status (sd); - unsigned char *p = source; - p[0] = 0; - p[1] = (((status & DV_SOCKSER_INPUT_EMPTY) -#ifdef UART_INPUT_READY0 - ? UART_INPUT_READY : 0) -#else - ? 0 : UART_INPUT_READY) -#endif - + ((status & DV_SOCKSER_OUTPUT_EMPTY) ? UART_OUTPUT_READY : 0)); - return 2; - } -#endif - - return nr_bytes; -} - -int -device_io_write_buffer (device *me, const void *source, int space, - address_word addr, unsigned nr_bytes, - SIM_DESC sd, SIM_CPU *cpu, sim_cia cia) -{ -#if WITH_SCACHE - if (addr == MCCR_ADDR) - { - if ((*(const char *) source & MCCR_CP) != 0) - scache_flush (sd); - return nr_bytes; - } -#endif - - if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT) - return nr_bytes; - -#if HAVE_DV_SOCKSER - if (addr == UART_OUTCHAR_ADDR) - { - int rc = dv_sockser_write (sd, *(char *) source); - return rc == 1; - } -#endif - - return nr_bytes; -} - -void -device_error (device *me, char *message, ...) -{ -} diff --git a/sim/fr30/fr30-sim.h b/sim/fr30/fr30-sim.h deleted file mode 100644 index dbb8117f974..00000000000 --- a/sim/fr30/fr30-sim.h +++ /dev/null @@ -1,96 +0,0 @@ -/* collection of junk waiting time to sort out - Copyright (C) 1998, 1999 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#ifndef FR30_SIM_H -#define FR30_SIM_H - -/* gdb register numbers */ -#define PC_REGNUM 16 -#define PS_REGNUM 17 -#define TBR_REGNUM 18 -#define RP_REGNUM 19 -#define SSP_REGNUM 20 -#define USP_REGNUM 21 -#define MDH_REGNUM 22 -#define MDL_REGNUM 23 - -extern BI fr30bf_h_sbit_get_handler (SIM_CPU *); -extern void fr30bf_h_sbit_set_handler (SIM_CPU *, BI); - -extern UQI fr30bf_h_ccr_get_handler (SIM_CPU *); -extern void fr30bf_h_ccr_set_handler (SIM_CPU *, UQI); - -extern UQI fr30bf_h_scr_get_handler (SIM_CPU *); -extern void fr30bf_h_scr_set_handler (SIM_CPU *, UQI); - -extern UQI fr30bf_h_ilm_get_handler (SIM_CPU *); -extern void fr30bf_h_ilm_set_handler (SIM_CPU *, UQI); - -extern USI fr30bf_h_ps_get_handler (SIM_CPU *); -extern void fr30bf_h_ps_set_handler (SIM_CPU *, USI); - -extern SI fr30bf_h_dr_get_handler (SIM_CPU *, UINT); -extern void fr30bf_h_dr_set_handler (SIM_CPU *, UINT, SI); - -#define GETTWI GETTSI -#define SETTWI SETTSI - -/* Hardware/device support. - ??? Will eventually want to move device stuff to config files. */ - -/* Special purpose traps. */ -#define TRAP_SYSCALL 10 -#define TRAP_BREAKPOINT 9 - -/* Support for the MCCR register (Cache Control Register) is needed in order - for overlays to work correctly with the scache: cached instructions need - to be flushed when the instruction space is changed at runtime. */ - -/* Cache Control Register */ -#define MCCR_ADDR 0xffffffff -#define MCCR_CP 0x80 -/* not supported */ -#define MCCR_CM0 2 -#define MCCR_CM1 1 - -/* Serial device addresses. */ -/* These are the values for the MSA2000 board. - ??? Will eventually need to move this to a config file. */ -#define UART_INCHAR_ADDR 0xff004009 -#define UART_OUTCHAR_ADDR 0xff004007 -#define UART_STATUS_ADDR 0xff004002 - -#define UART_INPUT_READY 0x4 -#define UART_OUTPUT_READY 0x1 - -/* Start address and length of all device support. */ -#define FR30_DEVICE_ADDR 0xff000000 -#define FR30_DEVICE_LEN 0x00ffffff - -/* sim_core_attach device argument. */ -extern device fr30_devices; - -/* FIXME: Temporary, until device support ready. */ -struct _device { int foo; }; - -/* Handle the trap insn. */ -USI fr30_int (SIM_CPU *, PCADDR, int); - -#endif /* FR30_SIM_H */ diff --git a/sim/fr30/fr30.c b/sim/fr30/fr30.c deleted file mode 100644 index 51336540783..00000000000 --- a/sim/fr30/fr30.c +++ /dev/null @@ -1,423 +0,0 @@ -/* fr30 simulator support code - Copyright (C) 1998, 1999 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#define WANT_CPU -#define WANT_CPU_FR30BF - -#include "sim-main.h" -#include "cgen-mem.h" -#include "cgen-ops.h" - -/* Convert gdb dedicated register number to actual dr reg number. */ - -static int -decode_gdb_dr_regnum (int gdb_regnum) -{ - switch (gdb_regnum) - { - case TBR_REGNUM : return H_DR_TBR; - case RP_REGNUM : return H_DR_RP; - case SSP_REGNUM : return H_DR_SSP; - case USP_REGNUM : return H_DR_USP; - case MDH_REGNUM : return H_DR_MDH; - case MDL_REGNUM : return H_DR_MDL; - } - abort (); -} - -/* The contents of BUF are in target byte order. */ - -int -fr30bf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) -{ - if (rn < 16) - SETTWI (buf, fr30bf_h_gr_get (current_cpu, rn)); - else - switch (rn) - { - case PC_REGNUM : - SETTWI (buf, fr30bf_h_pc_get (current_cpu)); - break; - case PS_REGNUM : - SETTWI (buf, fr30bf_h_ps_get (current_cpu)); - break; - case TBR_REGNUM : - case RP_REGNUM : - case SSP_REGNUM : - case USP_REGNUM : - case MDH_REGNUM : - case MDL_REGNUM : - SETTWI (buf, fr30bf_h_dr_get (current_cpu, - decode_gdb_dr_regnum (rn))); - break; - default : - return 0; - } - - return -1; /*FIXME*/ -} - -/* The contents of BUF are in target byte order. */ - -int -fr30bf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) -{ - if (rn < 16) - fr30bf_h_gr_set (current_cpu, rn, GETTWI (buf)); - else - switch (rn) - { - case PC_REGNUM : - fr30bf_h_pc_set (current_cpu, GETTWI (buf)); - break; - case PS_REGNUM : - fr30bf_h_ps_set (current_cpu, GETTWI (buf)); - break; - case TBR_REGNUM : - case RP_REGNUM : - case SSP_REGNUM : - case USP_REGNUM : - case MDH_REGNUM : - case MDL_REGNUM : - fr30bf_h_dr_set (current_cpu, - decode_gdb_dr_regnum (rn), - GETTWI (buf)); - break; - default : - return 0; - } - - return -1; /*FIXME*/ -} - -/* Cover fns to access the ccr bits. */ - -BI -fr30bf_h_sbit_get_handler (SIM_CPU *current_cpu) -{ - return CPU (h_sbit); -} - -void -fr30bf_h_sbit_set_handler (SIM_CPU *current_cpu, BI newval) -{ - int old_sbit = CPU (h_sbit); - int new_sbit = (newval != 0); - - CPU (h_sbit) = new_sbit; - - /* When switching stack modes, update the registers. */ - if (old_sbit != new_sbit) - { - if (old_sbit) - { - /* Switching user -> system. */ - CPU (h_dr[H_DR_USP]) = CPU (h_gr[H_GR_SP]); - CPU (h_gr[H_GR_SP]) = CPU (h_dr[H_DR_SSP]); - } - else - { - /* Switching system -> user. */ - CPU (h_dr[H_DR_SSP]) = CPU (h_gr[H_GR_SP]); - CPU (h_gr[H_GR_SP]) = CPU (h_dr[H_DR_USP]); - } - } - - /* TODO: r15 interlock */ -} - -/* Cover fns to access the ccr bits. */ - -UQI -fr30bf_h_ccr_get_handler (SIM_CPU *current_cpu) -{ - int ccr = ( (GET_H_CBIT () << 0) - | (GET_H_VBIT () << 1) - | (GET_H_ZBIT () << 2) - | (GET_H_NBIT () << 3) - | (GET_H_IBIT () << 4) - | (GET_H_SBIT () << 5)); - - return ccr; -} - -void -fr30bf_h_ccr_set_handler (SIM_CPU *current_cpu, UQI newval) -{ - int ccr = newval & 0x3f; - - SET_H_CBIT ((ccr & 1) != 0); - SET_H_VBIT ((ccr & 2) != 0); - SET_H_ZBIT ((ccr & 4) != 0); - SET_H_NBIT ((ccr & 8) != 0); - SET_H_IBIT ((ccr & 0x10) != 0); - SET_H_SBIT ((ccr & 0x20) != 0); -} - -/* Cover fns to access the scr bits. */ - -UQI -fr30bf_h_scr_get_handler (SIM_CPU *current_cpu) -{ - int scr = ( (GET_H_TBIT () << 0) - | (GET_H_D0BIT () << 1) - | (GET_H_D1BIT () << 2)); - return scr; -} - -void -fr30bf_h_scr_set_handler (SIM_CPU *current_cpu, UQI newval) -{ - int scr = newval & 7; - - SET_H_TBIT ((scr & 1) != 0); - SET_H_D0BIT ((scr & 2) != 0); - SET_H_D1BIT ((scr & 4) != 0); -} - -/* Cover fns to access the ilm bits. */ - -UQI -fr30bf_h_ilm_get_handler (SIM_CPU *current_cpu) -{ - return CPU (h_ilm); -} - -void -fr30bf_h_ilm_set_handler (SIM_CPU *current_cpu, UQI newval) -{ - int ilm = newval & 0x1f; - int current_ilm = CPU (h_ilm); - - /* We can only set new ilm values < 16 if the current ilm is < 16. Otherwise - we add 16 to the value we are given. */ - if (current_ilm >= 16 && ilm < 16) - ilm += 16; - - CPU (h_ilm) = ilm; -} - -/* Cover fns to access the ps register. */ - -USI -fr30bf_h_ps_get_handler (SIM_CPU *current_cpu) -{ - int ccr = GET_H_CCR (); - int scr = GET_H_SCR (); - int ilm = GET_H_ILM (); - - return ccr | (scr << 8) | (ilm << 16); -} - -void -fr30bf_h_ps_set_handler (SIM_CPU *current_cpu, USI newval) -{ - int ccr = newval & 0xff; - int scr = (newval >> 8) & 7; - int ilm = (newval >> 16) & 0x1f; - - SET_H_CCR (ccr); - SET_H_SCR (scr); - SET_H_ILM (ilm); -} - -/* Cover fns to access the dedicated registers. */ - -SI -fr30bf_h_dr_get_handler (SIM_CPU *current_cpu, UINT dr) -{ - switch (dr) - { - case H_DR_SSP : - if (! GET_H_SBIT ()) - return GET_H_GR (H_GR_SP); - else - return CPU (h_dr[H_DR_SSP]); - case H_DR_USP : - if (GET_H_SBIT ()) - return GET_H_GR (H_GR_SP); - else - return CPU (h_dr[H_DR_USP]); - case H_DR_TBR : - case H_DR_RP : - case H_DR_MDH : - case H_DR_MDL : - return CPU (h_dr[dr]); - } - return 0; -} - -void -fr30bf_h_dr_set_handler (SIM_CPU *current_cpu, UINT dr, SI newval) -{ - switch (dr) - { - case H_DR_SSP : - if (! GET_H_SBIT ()) - SET_H_GR (H_GR_SP, newval); - else - CPU (h_dr[H_DR_SSP]) = newval; - break; - case H_DR_USP : - if (GET_H_SBIT ()) - SET_H_GR (H_GR_SP, newval); - else - CPU (h_dr[H_DR_USP]) = newval; - break; - case H_DR_TBR : - case H_DR_RP : - case H_DR_MDH : - case H_DR_MDL : - CPU (h_dr[dr]) = newval; - break; - } -} - -#if WITH_PROFILE_MODEL_P - -/* FIXME: Some of these should be inline or macros. Later. */ - -/* Initialize cycle counting for an insn. - FIRST_P is non-zero if this is the first insn in a set of parallel - insns. */ - -void -fr30bf_model_insn_before (SIM_CPU *cpu, int first_p) -{ - MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu); - d->load_regs_pending = 0; -} - -/* Record the cycles computed for an insn. - LAST_P is non-zero if this is the last insn in a set of parallel insns, - and we update the total cycle count. - CYCLES is the cycle count of the insn. */ - -void -fr30bf_model_insn_after (SIM_CPU *cpu, int last_p, int cycles) -{ - PROFILE_DATA *p = CPU_PROFILE_DATA (cpu); - MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu); - - PROFILE_MODEL_TOTAL_CYCLES (p) += cycles; - PROFILE_MODEL_CUR_INSN_CYCLES (p) = cycles; - d->load_regs = d->load_regs_pending; -} - -static INLINE int -check_load_stall (SIM_CPU *cpu, int regno) -{ - const MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu); - UINT load_regs = d->load_regs; - - if (regno != -1 - && (load_regs & (1 << regno)) != 0) - { - PROFILE_DATA *p = CPU_PROFILE_DATA (cpu); - ++ PROFILE_MODEL_LOAD_STALL_CYCLES (p); - if (TRACE_INSN_P (cpu)) - cgen_trace_printf (cpu, " ; Load stall."); - return 1; - } - else - return 0; -} - -int -fr30bf_model_fr30_1_u_exec (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT in_Ri, INT in_Rj, INT out_Ri) -{ - int cycles = idesc->timing->units[unit_num].done; - cycles += check_load_stall (cpu, in_Ri); - cycles += check_load_stall (cpu, in_Rj); - return cycles; -} - -int -fr30bf_model_fr30_1_u_cti (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT in_Ri) -{ - PROFILE_DATA *p = CPU_PROFILE_DATA (cpu); - /* (1 << 1): The pc is the 2nd element in inputs, outputs. - ??? can be cleaned up */ - int taken_p = (referenced & (1 << 1)) != 0; - int cycles = idesc->timing->units[unit_num].done; - int delay_slot_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT); - - cycles += check_load_stall (cpu, in_Ri); - if (taken_p) - { - /* ??? Handling cti's without delay slots this way will run afoul of - accurate system simulation. Later. */ - if (! delay_slot_p) - { - ++cycles; - ++PROFILE_MODEL_CTI_STALL_CYCLES (p); - } - ++PROFILE_MODEL_TAKEN_COUNT (p); - } - else - ++PROFILE_MODEL_UNTAKEN_COUNT (p); - - return cycles; -} - -int -fr30bf_model_fr30_1_u_load (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT in_Rj, INT out_Ri) -{ - MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu); - int cycles = idesc->timing->units[unit_num].done; - d->load_regs_pending |= 1 << out_Ri; - cycles += check_load_stall (cpu, in_Rj); - return cycles; -} - -int -fr30bf_model_fr30_1_u_store (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT in_Ri, INT in_Rj) -{ - int cycles = idesc->timing->units[unit_num].done; - cycles += check_load_stall (cpu, in_Ri); - cycles += check_load_stall (cpu, in_Rj); - return cycles; -} - -int -fr30bf_model_fr30_1_u_ldm (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT reglist) -{ - return idesc->timing->units[unit_num].done; -} - -int -fr30bf_model_fr30_1_u_stm (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT reglist) -{ - return idesc->timing->units[unit_num].done; -} - -#endif /* WITH_PROFILE_MODEL_P */ diff --git a/sim/fr30/mloop.in b/sim/fr30/mloop.in deleted file mode 100644 index 1a82d8332b6..00000000000 --- a/sim/fr30/mloop.in +++ /dev/null @@ -1,236 +0,0 @@ -# Simulator main loop for fr30. -*- C -*- -# Copyright (C) 1998, 1999 Free Software Foundation, Inc. -# Contributed by Cygnus Solutions. -# -# This file is part of the GNU Simulators. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License along -# with this program; if not, write to the Free Software Foundation, Inc., -# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -# Syntax: -# /bin/sh mainloop.in command -# -# Command is one of: -# -# init -# support -# extract-{simple,scache,pbb} -# {full,fast}-exec-{simple,scache,pbb} -# -# A target need only provide a "full" version of one of simple,scache,pbb. -# If the target wants it can also provide a fast version of same. -# It can't provide more than this, however for illustration's sake the FR30 -# port provides examples of all. - -# ??? After a few more ports are done, revisit. -# Will eventually need to machine generate a lot of this. - -case "x$1" in - -xsupport) - -cat <<EOF - -static INLINE const IDESC * -extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf, - int fast_p) -{ - const IDESC *id = @cpu@_decode (current_cpu, pc, insn, abuf); - @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p); - if (! fast_p) - { - int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); - int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); - @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p); - } - return id; -} - -static INLINE SEM_PC -execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p) -{ - SEM_PC vpc; - - if (fast_p) - { -#if ! WITH_SEM_SWITCH_FAST -#if WITH_SCACHE - vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc); -#else - vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf); -#endif -#else - abort (); -#endif /* WITH_SEM_SWITCH_FAST */ - } - else - { -#if ! WITH_SEM_SWITCH_FULL - ARGBUF *abuf = &sc->argbuf; - const IDESC *idesc = abuf->idesc; -#if WITH_SCACHE_PBB - int virtual_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_VIRTUAL); -#else - int virtual_p = 0; -#endif - - if (! virtual_p) - { - /* FIXME: call x-before */ - if (ARGBUF_PROFILE_P (abuf)) - PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num); - /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */ - if (PROFILE_MODEL_P (current_cpu) - && ARGBUF_PROFILE_P (abuf)) - @cpu@_model_insn_before (current_cpu, 1 /*first_p*/); - TRACE_INSN_INIT (current_cpu, abuf, 1); - TRACE_INSN (current_cpu, idesc->idata, - (const struct argbuf *) abuf, abuf->addr); - } -#if WITH_SCACHE - vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc); -#else - vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf); -#endif - if (! virtual_p) - { - /* FIXME: call x-after */ - if (PROFILE_MODEL_P (current_cpu) - && ARGBUF_PROFILE_P (abuf)) - { - int cycles; - - cycles = (*idesc->timing->model_fn) (current_cpu, sc); - @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles); - } - TRACE_INSN_FINI (current_cpu, abuf, 1); - } -#else - abort (); -#endif /* WITH_SEM_SWITCH_FULL */ - } - - return vpc; -} - -EOF - -;; - -xinit) - -cat <<EOF -/*xxxinit*/ -EOF - -;; - -xextract-simple | xextract-scache) - -# Inputs: current_cpu, vpc, sc, FAST_P -# Outputs: sc filled in - -cat <<EOF -{ - CGEN_INSN_INT insn = GETIMEMUHI (current_cpu, vpc); - extract (current_cpu, vpc, insn, SEM_ARGBUF (sc), FAST_P); -} -EOF - -;; - -xextract-pbb) - -# Inputs: current_cpu, pc, sc, max_insns, FAST_P -# Outputs: sc, pc -# sc must be left pointing past the last created entry. -# pc must be left pointing past the last created entry. -# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called -# to record the vpc of the cti insn. -# SET_INSN_COUNT(n) must be called to record number of real insns. - -cat <<EOF -{ - const IDESC *idesc; - int icount = 0; - - while (max_insns > 0) - { - UHI insn = GETIMEMUHI (current_cpu, pc); - idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P); - ++sc; - --max_insns; - ++icount; - pc += idesc->length; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - - /* Delay slot? */ - /* ??? breakpoints in delay slots */ - if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT)) - { - UHI insn = GETIMEMUHI (current_cpu, pc); - idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P); - if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_NOT_IN_DELAY_SLOT)) - { - /* malformed program */ - sim_io_eprintf (CPU_STATE (current_cpu), - "malformed program, \`%s' insn in delay slot\n", - CGEN_INSN_NAME (idesc->idata)); - } - else - { - ++sc; - --max_insns; - ++icount; - pc += idesc->length; - } - } - break; - } - } - - Finish: - SET_INSN_COUNT (icount); -} -EOF - -;; - -xfull-exec-* | xfast-exec-*) - -# Inputs: current_cpu, sc, FAST_P -# Outputs: vpc -# vpc contains the address of the next insn to execute - -cat <<EOF -{ -#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST) -#define DEFINE_SWITCH -#include "sem-switch.c" -#else - vpc = execute (current_cpu, vpc, FAST_P); -#endif -} -EOF - -;; - -*) - echo "Invalid argument to mainloop.in: $1" >&2 - exit 1 - ;; - -esac diff --git a/sim/fr30/model.c b/sim/fr30/model.c deleted file mode 100644 index 611d40f1ae2..00000000000 --- a/sim/fr30/model.c +++ /dev/null @@ -1,4004 +0,0 @@ -/* Simulator model support for fr30bf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU fr30bf -#define WANT_CPU_FR30BF - -#include "sim-main.h" - -/* The profiling data is recorded here, but is accessed via the profiling - mechanism. After all, this is information for profiling. */ - -#if WITH_PROFILE_MODEL_P - -/* Model handlers for each insn. */ - -static int -model_fr30_1_add (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_addi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_add2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_addc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_addn (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_addni (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_addn2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_sub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_subc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_subn (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_cmp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_cmpi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_cmp2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_and (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_or (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_eor (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_andm (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_andh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_andb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_orm (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_orh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_orb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_eorm (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_eorh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_eorb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bandl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_borl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_beorl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bandh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_borh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_beorh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_btstl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 1, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_btsth (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 1, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_mul (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_mulu (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_mulh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_muluh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_div0s (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_div0u (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_div1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_div2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_div3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_div4s (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_lsl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_lsli (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_lsl2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_lsr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_lsri (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_lsr2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_asr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_asri (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_asr2 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - if (insn_referenced & (1 << 0)) referenced |= 1 << 0; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldi8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldi8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldi20 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldi20.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldi32 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldi32.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ld (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_lduh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr13 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr13uh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr13ub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr14 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr14.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr14uh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr14uh.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr14ub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr14ub.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr15 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr15gr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15gr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr15dr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldr15ps (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addsp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_st (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_sth (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_stb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str13 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str13h (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str13b (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str14 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str14.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str14h (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str14h.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str14b (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str14b.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str15 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str15.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str15gr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str15gr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str15dr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_str15ps (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addsp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_mov (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_movdr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movdr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_movps (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movdr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - out_Ri = FLD (out_Ri); - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_mov2dr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_mov2ps (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_jmp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_jmpd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_callr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_callrd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - in_Ri = FLD (in_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_call (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_call.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_calld (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_call.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ret (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ret_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_int (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_inte (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_reti (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_brad (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bra (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bnod (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bno (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_beqd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_beq (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bned (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bne (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bcd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bncd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bnc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bnd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bn (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bpd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bvd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bnvd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bnv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bltd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_blt (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bged (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bge (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bled (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ble (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bgtd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bgt (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_blsd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bls (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bhid (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_bhi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmovr13 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmovr13h (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmovr13b (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmovr13pi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmovr13pih (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmovr13pib (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmovr15pi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmov2r13 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmov2r13h (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmov2r13b (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmov2r13pi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmov2r13pih (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmov2r13pib (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_dmov2r15pd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldres (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_stres (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_copop (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_copld (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_copst (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_copsv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_nop (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_andccr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_orccr (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_stilm (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_addsp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addsp.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_extsb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_extub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_extsh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_extuh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - in_Ri = FLD (in_Ri); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldm0 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldm0.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_reglist = 0; - cycles += fr30bf_model_fr30_1_u_ldm (current_cpu, idesc, 0, referenced, in_reglist); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_ldm1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldm1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_reglist = 0; - cycles += fr30bf_model_fr30_1_u_ldm (current_cpu, idesc, 0, referenced, in_reglist); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_stm0 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stm0.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_reglist = 0; - cycles += fr30bf_model_fr30_1_u_stm (current_cpu, idesc, 0, referenced, in_reglist); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_stm1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stm1.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_reglist = 0; - cycles += fr30bf_model_fr30_1_u_stm (current_cpu, idesc, 0, referenced, in_reglist); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_enter (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_enter.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_leave (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_enter.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - INT out_Ri = -1; - cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri); - } - return cycles; -#undef FLD -} - -static int -model_fr30_1_xchb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Rj = -1; - INT out_Ri = -1; - in_Rj = FLD (in_Rj); - out_Ri = FLD (out_Ri); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_Ri = -1; - INT in_Rj = -1; - in_Ri = FLD (in_Ri); - in_Rj = FLD (in_Rj); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj); - } - return cycles; -#undef FLD -} - -/* We assume UNIT_NONE == 0 because the tables don't always terminate - entries with it. */ - -/* Model timing data for `fr30-1'. */ - -static const INSN_TIMING fr30_1_timing[] = { - { FR30BF_INSN_X_INVALID, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_X_AFTER, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_X_BEFORE, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_X_CHAIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_X_BEGIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADD, model_fr30_1_add, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADDI, model_fr30_1_addi, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADD2, model_fr30_1_add2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADDC, model_fr30_1_addc, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADDN, model_fr30_1_addn, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADDNI, model_fr30_1_addni, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADDN2, model_fr30_1_addn2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_SUB, model_fr30_1_sub, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_SUBC, model_fr30_1_subc, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_SUBN, model_fr30_1_subn, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_CMP, model_fr30_1_cmp, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_CMPI, model_fr30_1_cmpi, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_CMP2, model_fr30_1_cmp2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_AND, model_fr30_1_and, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_OR, model_fr30_1_or, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_EOR, model_fr30_1_eor, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ANDM, model_fr30_1_andm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_ANDH, model_fr30_1_andh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_ANDB, model_fr30_1_andb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_ORM, model_fr30_1_orm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_ORH, model_fr30_1_orh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_ORB, model_fr30_1_orb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_EORM, model_fr30_1_eorm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_EORH, model_fr30_1_eorh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_EORB, model_fr30_1_eorb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_BANDL, model_fr30_1_bandl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_BORL, model_fr30_1_borl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_BEORL, model_fr30_1_beorl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_BANDH, model_fr30_1_bandh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_BORH, model_fr30_1_borh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_BEORH, model_fr30_1_beorh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_BTSTL, model_fr30_1_btstl, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } }, - { FR30BF_INSN_BTSTH, model_fr30_1_btsth, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } }, - { FR30BF_INSN_MUL, model_fr30_1_mul, { { (int) UNIT_FR30_1_U_EXEC, 1, 5 } } }, - { FR30BF_INSN_MULU, model_fr30_1_mulu, { { (int) UNIT_FR30_1_U_EXEC, 1, 5 } } }, - { FR30BF_INSN_MULH, model_fr30_1_mulh, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } }, - { FR30BF_INSN_MULUH, model_fr30_1_muluh, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } }, - { FR30BF_INSN_DIV0S, model_fr30_1_div0s, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_DIV0U, model_fr30_1_div0u, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_DIV1, model_fr30_1_div1, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_DIV2, model_fr30_1_div2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_DIV3, model_fr30_1_div3, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_DIV4S, model_fr30_1_div4s, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LSL, model_fr30_1_lsl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LSLI, model_fr30_1_lsli, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LSL2, model_fr30_1_lsl2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LSR, model_fr30_1_lsr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LSRI, model_fr30_1_lsri, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LSR2, model_fr30_1_lsr2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ASR, model_fr30_1_asr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ASRI, model_fr30_1_asri, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ASR2, model_fr30_1_asr2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LDI8, model_fr30_1_ldi8, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LDI20, model_fr30_1_ldi20, { { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } }, - { FR30BF_INSN_LDI32, model_fr30_1_ldi32, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } }, - { FR30BF_INSN_LD, model_fr30_1_ld, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDUH, model_fr30_1_lduh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDUB, model_fr30_1_ldub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR13, model_fr30_1_ldr13, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR13UH, model_fr30_1_ldr13uh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR13UB, model_fr30_1_ldr13ub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR14, model_fr30_1_ldr14, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR14UH, model_fr30_1_ldr14uh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR14UB, model_fr30_1_ldr14ub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR15, model_fr30_1_ldr15, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR15GR, model_fr30_1_ldr15gr, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR15DR, model_fr30_1_ldr15dr, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_LDR15PS, model_fr30_1_ldr15ps, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_ST, model_fr30_1_st, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STH, model_fr30_1_sth, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STB, model_fr30_1_stb, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR13, model_fr30_1_str13, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR13H, model_fr30_1_str13h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR13B, model_fr30_1_str13b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR14, model_fr30_1_str14, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR14H, model_fr30_1_str14h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR14B, model_fr30_1_str14b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR15, model_fr30_1_str15, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR15GR, model_fr30_1_str15gr, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR15DR, model_fr30_1_str15dr, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_STR15PS, model_fr30_1_str15ps, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_MOV, model_fr30_1_mov, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_MOVDR, model_fr30_1_movdr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_MOVPS, model_fr30_1_movps, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_MOV2DR, model_fr30_1_mov2dr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_MOV2PS, model_fr30_1_mov2ps, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_JMP, model_fr30_1_jmp, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_JMPD, model_fr30_1_jmpd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_CALLR, model_fr30_1_callr, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_CALLRD, model_fr30_1_callrd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_CALL, model_fr30_1_call, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_CALLD, model_fr30_1_calld, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_RET, model_fr30_1_ret, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_RET_D, model_fr30_1_ret_d, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_INT, model_fr30_1_int, { { (int) UNIT_FR30_1_U_EXEC, 1, 6 } } }, - { FR30BF_INSN_INTE, model_fr30_1_inte, { { (int) UNIT_FR30_1_U_EXEC, 1, 6 } } }, - { FR30BF_INSN_RETI, model_fr30_1_reti, { { (int) UNIT_FR30_1_U_EXEC, 1, 4 } } }, - { FR30BF_INSN_BRAD, model_fr30_1_brad, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BRA, model_fr30_1_bra, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNOD, model_fr30_1_bnod, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNO, model_fr30_1_bno, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BEQD, model_fr30_1_beqd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BEQ, model_fr30_1_beq, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNED, model_fr30_1_bned, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNE, model_fr30_1_bne, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BCD, model_fr30_1_bcd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BC, model_fr30_1_bc, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNCD, model_fr30_1_bncd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNC, model_fr30_1_bnc, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BND, model_fr30_1_bnd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BN, model_fr30_1_bn, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BPD, model_fr30_1_bpd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BP, model_fr30_1_bp, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BVD, model_fr30_1_bvd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BV, model_fr30_1_bv, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNVD, model_fr30_1_bnvd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BNV, model_fr30_1_bnv, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BLTD, model_fr30_1_bltd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BLT, model_fr30_1_blt, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BGED, model_fr30_1_bged, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BGE, model_fr30_1_bge, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BLED, model_fr30_1_bled, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BLE, model_fr30_1_ble, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BGTD, model_fr30_1_bgtd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BGT, model_fr30_1_bgt, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BLSD, model_fr30_1_blsd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BLS, model_fr30_1_bls, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BHID, model_fr30_1_bhid, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_BHI, model_fr30_1_bhi, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } }, - { FR30BF_INSN_DMOVR13, model_fr30_1_dmovr13, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOVR13H, model_fr30_1_dmovr13h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOVR13B, model_fr30_1_dmovr13b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOVR13PI, model_fr30_1_dmovr13pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOVR13PIH, model_fr30_1_dmovr13pih, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOVR13PIB, model_fr30_1_dmovr13pib, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOVR15PI, model_fr30_1_dmovr15pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOV2R13, model_fr30_1_dmov2r13, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_DMOV2R13H, model_fr30_1_dmov2r13h, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_DMOV2R13B, model_fr30_1_dmov2r13b, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } }, - { FR30BF_INSN_DMOV2R13PI, model_fr30_1_dmov2r13pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOV2R13PIH, model_fr30_1_dmov2r13pih, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOV2R13PIB, model_fr30_1_dmov2r13pib, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_DMOV2R15PD, model_fr30_1_dmov2r15pd, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, - { FR30BF_INSN_LDRES, model_fr30_1_ldres, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_STRES, model_fr30_1_stres, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_COPOP, model_fr30_1_copop, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_COPLD, model_fr30_1_copld, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_COPST, model_fr30_1_copst, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_COPSV, model_fr30_1_copsv, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_NOP, model_fr30_1_nop, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ANDCCR, model_fr30_1_andccr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ORCCR, model_fr30_1_orccr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_STILM, model_fr30_1_stilm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_ADDSP, model_fr30_1_addsp, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_EXTSB, model_fr30_1_extsb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_EXTUB, model_fr30_1_extub, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_EXTSH, model_fr30_1_extsh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_EXTUH, model_fr30_1_extuh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_LDM0, model_fr30_1_ldm0, { { (int) UNIT_FR30_1_U_LDM, 1, 1 } } }, - { FR30BF_INSN_LDM1, model_fr30_1_ldm1, { { (int) UNIT_FR30_1_U_LDM, 1, 1 } } }, - { FR30BF_INSN_STM0, model_fr30_1_stm0, { { (int) UNIT_FR30_1_U_STM, 1, 1 } } }, - { FR30BF_INSN_STM1, model_fr30_1_stm1, { { (int) UNIT_FR30_1_U_STM, 1, 1 } } }, - { FR30BF_INSN_ENTER, model_fr30_1_enter, { { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } }, - { FR30BF_INSN_LEAVE, model_fr30_1_leave, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } }, - { FR30BF_INSN_XCHB, model_fr30_1_xchb, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } }, -}; - -#endif /* WITH_PROFILE_MODEL_P */ - -static void -fr30_1_model_init (SIM_CPU *cpu) -{ - CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_FR30_1_DATA)); -} - -#if WITH_PROFILE_MODEL_P -#define TIMING_DATA(td) td -#else -#define TIMING_DATA(td) 0 -#endif - -static const MODEL fr30_models[] = -{ - { "fr30-1", & fr30_mach, MODEL_FR30_1, TIMING_DATA (& fr30_1_timing[0]), fr30_1_model_init }, - { 0 } -}; - -/* The properties of this cpu's implementation. */ - -static const MACH_IMP_PROPERTIES fr30bf_imp_properties = -{ - sizeof (SIM_CPU), -#if WITH_SCACHE - sizeof (SCACHE) -#else - 0 -#endif -}; - - -static void -fr30bf_prepare_run (SIM_CPU *cpu) -{ - if (CPU_IDESC (cpu) == NULL) - fr30bf_init_idesc_table (cpu); -} - -static const CGEN_INSN * -fr30bf_get_idata (SIM_CPU *cpu, int inum) -{ - return CPU_IDESC (cpu) [inum].idata; -} - -static void -fr30_init_cpu (SIM_CPU *cpu) -{ - CPU_REG_FETCH (cpu) = fr30bf_fetch_register; - CPU_REG_STORE (cpu) = fr30bf_store_register; - CPU_PC_FETCH (cpu) = fr30bf_h_pc_get; - CPU_PC_STORE (cpu) = fr30bf_h_pc_set; - CPU_GET_IDATA (cpu) = fr30bf_get_idata; - CPU_MAX_INSNS (cpu) = FR30BF_INSN_MAX; - CPU_INSN_NAME (cpu) = cgen_insn_name; - CPU_FULL_ENGINE_FN (cpu) = fr30bf_engine_run_full; -#if WITH_FAST - CPU_FAST_ENGINE_FN (cpu) = fr30bf_engine_run_fast; -#else - CPU_FAST_ENGINE_FN (cpu) = fr30bf_engine_run_full; -#endif -} - -const MACH fr30_mach = -{ - "fr30", "fr30", MACH_FR30, - 32, 32, & fr30_models[0], & fr30bf_imp_properties, - fr30_init_cpu, - fr30bf_prepare_run -}; - diff --git a/sim/fr30/sem-switch.c b/sim/fr30/sem-switch.c deleted file mode 100644 index 7dc7f7fd83e..00000000000 --- a/sim/fr30/sem-switch.c +++ /dev/null @@ -1,5409 +0,0 @@ -/* Simulator instruction semantics for fr30bf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifdef DEFINE_LABELS - - /* The labels have the case they have because the enum of insn types - is all uppercase and in the non-stdc case the insn symbol is built - into the enum name. */ - - static struct { - int index; - void *label; - } labels[] = { - { FR30BF_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, - { FR30BF_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, - { FR30BF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, - { FR30BF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, - { FR30BF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, - { FR30BF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, - { FR30BF_INSN_ADD, && case_sem_INSN_ADD }, - { FR30BF_INSN_ADDI, && case_sem_INSN_ADDI }, - { FR30BF_INSN_ADD2, && case_sem_INSN_ADD2 }, - { FR30BF_INSN_ADDC, && case_sem_INSN_ADDC }, - { FR30BF_INSN_ADDN, && case_sem_INSN_ADDN }, - { FR30BF_INSN_ADDNI, && case_sem_INSN_ADDNI }, - { FR30BF_INSN_ADDN2, && case_sem_INSN_ADDN2 }, - { FR30BF_INSN_SUB, && case_sem_INSN_SUB }, - { FR30BF_INSN_SUBC, && case_sem_INSN_SUBC }, - { FR30BF_INSN_SUBN, && case_sem_INSN_SUBN }, - { FR30BF_INSN_CMP, && case_sem_INSN_CMP }, - { FR30BF_INSN_CMPI, && case_sem_INSN_CMPI }, - { FR30BF_INSN_CMP2, && case_sem_INSN_CMP2 }, - { FR30BF_INSN_AND, && case_sem_INSN_AND }, - { FR30BF_INSN_OR, && case_sem_INSN_OR }, - { FR30BF_INSN_EOR, && case_sem_INSN_EOR }, - { FR30BF_INSN_ANDM, && case_sem_INSN_ANDM }, - { FR30BF_INSN_ANDH, && case_sem_INSN_ANDH }, - { FR30BF_INSN_ANDB, && case_sem_INSN_ANDB }, - { FR30BF_INSN_ORM, && case_sem_INSN_ORM }, - { FR30BF_INSN_ORH, && case_sem_INSN_ORH }, - { FR30BF_INSN_ORB, && case_sem_INSN_ORB }, - { FR30BF_INSN_EORM, && case_sem_INSN_EORM }, - { FR30BF_INSN_EORH, && case_sem_INSN_EORH }, - { FR30BF_INSN_EORB, && case_sem_INSN_EORB }, - { FR30BF_INSN_BANDL, && case_sem_INSN_BANDL }, - { FR30BF_INSN_BORL, && case_sem_INSN_BORL }, - { FR30BF_INSN_BEORL, && case_sem_INSN_BEORL }, - { FR30BF_INSN_BANDH, && case_sem_INSN_BANDH }, - { FR30BF_INSN_BORH, && case_sem_INSN_BORH }, - { FR30BF_INSN_BEORH, && case_sem_INSN_BEORH }, - { FR30BF_INSN_BTSTL, && case_sem_INSN_BTSTL }, - { FR30BF_INSN_BTSTH, && case_sem_INSN_BTSTH }, - { FR30BF_INSN_MUL, && case_sem_INSN_MUL }, - { FR30BF_INSN_MULU, && case_sem_INSN_MULU }, - { FR30BF_INSN_MULH, && case_sem_INSN_MULH }, - { FR30BF_INSN_MULUH, && case_sem_INSN_MULUH }, - { FR30BF_INSN_DIV0S, && case_sem_INSN_DIV0S }, - { FR30BF_INSN_DIV0U, && case_sem_INSN_DIV0U }, - { FR30BF_INSN_DIV1, && case_sem_INSN_DIV1 }, - { FR30BF_INSN_DIV2, && case_sem_INSN_DIV2 }, - { FR30BF_INSN_DIV3, && case_sem_INSN_DIV3 }, - { FR30BF_INSN_DIV4S, && case_sem_INSN_DIV4S }, - { FR30BF_INSN_LSL, && case_sem_INSN_LSL }, - { FR30BF_INSN_LSLI, && case_sem_INSN_LSLI }, - { FR30BF_INSN_LSL2, && case_sem_INSN_LSL2 }, - { FR30BF_INSN_LSR, && case_sem_INSN_LSR }, - { FR30BF_INSN_LSRI, && case_sem_INSN_LSRI }, - { FR30BF_INSN_LSR2, && case_sem_INSN_LSR2 }, - { FR30BF_INSN_ASR, && case_sem_INSN_ASR }, - { FR30BF_INSN_ASRI, && case_sem_INSN_ASRI }, - { FR30BF_INSN_ASR2, && case_sem_INSN_ASR2 }, - { FR30BF_INSN_LDI8, && case_sem_INSN_LDI8 }, - { FR30BF_INSN_LDI20, && case_sem_INSN_LDI20 }, - { FR30BF_INSN_LDI32, && case_sem_INSN_LDI32 }, - { FR30BF_INSN_LD, && case_sem_INSN_LD }, - { FR30BF_INSN_LDUH, && case_sem_INSN_LDUH }, - { FR30BF_INSN_LDUB, && case_sem_INSN_LDUB }, - { FR30BF_INSN_LDR13, && case_sem_INSN_LDR13 }, - { FR30BF_INSN_LDR13UH, && case_sem_INSN_LDR13UH }, - { FR30BF_INSN_LDR13UB, && case_sem_INSN_LDR13UB }, - { FR30BF_INSN_LDR14, && case_sem_INSN_LDR14 }, - { FR30BF_INSN_LDR14UH, && case_sem_INSN_LDR14UH }, - { FR30BF_INSN_LDR14UB, && case_sem_INSN_LDR14UB }, - { FR30BF_INSN_LDR15, && case_sem_INSN_LDR15 }, - { FR30BF_INSN_LDR15GR, && case_sem_INSN_LDR15GR }, - { FR30BF_INSN_LDR15DR, && case_sem_INSN_LDR15DR }, - { FR30BF_INSN_LDR15PS, && case_sem_INSN_LDR15PS }, - { FR30BF_INSN_ST, && case_sem_INSN_ST }, - { FR30BF_INSN_STH, && case_sem_INSN_STH }, - { FR30BF_INSN_STB, && case_sem_INSN_STB }, - { FR30BF_INSN_STR13, && case_sem_INSN_STR13 }, - { FR30BF_INSN_STR13H, && case_sem_INSN_STR13H }, - { FR30BF_INSN_STR13B, && case_sem_INSN_STR13B }, - { FR30BF_INSN_STR14, && case_sem_INSN_STR14 }, - { FR30BF_INSN_STR14H, && case_sem_INSN_STR14H }, - { FR30BF_INSN_STR14B, && case_sem_INSN_STR14B }, - { FR30BF_INSN_STR15, && case_sem_INSN_STR15 }, - { FR30BF_INSN_STR15GR, && case_sem_INSN_STR15GR }, - { FR30BF_INSN_STR15DR, && case_sem_INSN_STR15DR }, - { FR30BF_INSN_STR15PS, && case_sem_INSN_STR15PS }, - { FR30BF_INSN_MOV, && case_sem_INSN_MOV }, - { FR30BF_INSN_MOVDR, && case_sem_INSN_MOVDR }, - { FR30BF_INSN_MOVPS, && case_sem_INSN_MOVPS }, - { FR30BF_INSN_MOV2DR, && case_sem_INSN_MOV2DR }, - { FR30BF_INSN_MOV2PS, && case_sem_INSN_MOV2PS }, - { FR30BF_INSN_JMP, && case_sem_INSN_JMP }, - { FR30BF_INSN_JMPD, && case_sem_INSN_JMPD }, - { FR30BF_INSN_CALLR, && case_sem_INSN_CALLR }, - { FR30BF_INSN_CALLRD, && case_sem_INSN_CALLRD }, - { FR30BF_INSN_CALL, && case_sem_INSN_CALL }, - { FR30BF_INSN_CALLD, && case_sem_INSN_CALLD }, - { FR30BF_INSN_RET, && case_sem_INSN_RET }, - { FR30BF_INSN_RET_D, && case_sem_INSN_RET_D }, - { FR30BF_INSN_INT, && case_sem_INSN_INT }, - { FR30BF_INSN_INTE, && case_sem_INSN_INTE }, - { FR30BF_INSN_RETI, && case_sem_INSN_RETI }, - { FR30BF_INSN_BRAD, && case_sem_INSN_BRAD }, - { FR30BF_INSN_BRA, && case_sem_INSN_BRA }, - { FR30BF_INSN_BNOD, && case_sem_INSN_BNOD }, - { FR30BF_INSN_BNO, && case_sem_INSN_BNO }, - { FR30BF_INSN_BEQD, && case_sem_INSN_BEQD }, - { FR30BF_INSN_BEQ, && case_sem_INSN_BEQ }, - { FR30BF_INSN_BNED, && case_sem_INSN_BNED }, - { FR30BF_INSN_BNE, && case_sem_INSN_BNE }, - { FR30BF_INSN_BCD, && case_sem_INSN_BCD }, - { FR30BF_INSN_BC, && case_sem_INSN_BC }, - { FR30BF_INSN_BNCD, && case_sem_INSN_BNCD }, - { FR30BF_INSN_BNC, && case_sem_INSN_BNC }, - { FR30BF_INSN_BND, && case_sem_INSN_BND }, - { FR30BF_INSN_BN, && case_sem_INSN_BN }, - { FR30BF_INSN_BPD, && case_sem_INSN_BPD }, - { FR30BF_INSN_BP, && case_sem_INSN_BP }, - { FR30BF_INSN_BVD, && case_sem_INSN_BVD }, - { FR30BF_INSN_BV, && case_sem_INSN_BV }, - { FR30BF_INSN_BNVD, && case_sem_INSN_BNVD }, - { FR30BF_INSN_BNV, && case_sem_INSN_BNV }, - { FR30BF_INSN_BLTD, && case_sem_INSN_BLTD }, - { FR30BF_INSN_BLT, && case_sem_INSN_BLT }, - { FR30BF_INSN_BGED, && case_sem_INSN_BGED }, - { FR30BF_INSN_BGE, && case_sem_INSN_BGE }, - { FR30BF_INSN_BLED, && case_sem_INSN_BLED }, - { FR30BF_INSN_BLE, && case_sem_INSN_BLE }, - { FR30BF_INSN_BGTD, && case_sem_INSN_BGTD }, - { FR30BF_INSN_BGT, && case_sem_INSN_BGT }, - { FR30BF_INSN_BLSD, && case_sem_INSN_BLSD }, - { FR30BF_INSN_BLS, && case_sem_INSN_BLS }, - { FR30BF_INSN_BHID, && case_sem_INSN_BHID }, - { FR30BF_INSN_BHI, && case_sem_INSN_BHI }, - { FR30BF_INSN_DMOVR13, && case_sem_INSN_DMOVR13 }, - { FR30BF_INSN_DMOVR13H, && case_sem_INSN_DMOVR13H }, - { FR30BF_INSN_DMOVR13B, && case_sem_INSN_DMOVR13B }, - { FR30BF_INSN_DMOVR13PI, && case_sem_INSN_DMOVR13PI }, - { FR30BF_INSN_DMOVR13PIH, && case_sem_INSN_DMOVR13PIH }, - { FR30BF_INSN_DMOVR13PIB, && case_sem_INSN_DMOVR13PIB }, - { FR30BF_INSN_DMOVR15PI, && case_sem_INSN_DMOVR15PI }, - { FR30BF_INSN_DMOV2R13, && case_sem_INSN_DMOV2R13 }, - { FR30BF_INSN_DMOV2R13H, && case_sem_INSN_DMOV2R13H }, - { FR30BF_INSN_DMOV2R13B, && case_sem_INSN_DMOV2R13B }, - { FR30BF_INSN_DMOV2R13PI, && case_sem_INSN_DMOV2R13PI }, - { FR30BF_INSN_DMOV2R13PIH, && case_sem_INSN_DMOV2R13PIH }, - { FR30BF_INSN_DMOV2R13PIB, && case_sem_INSN_DMOV2R13PIB }, - { FR30BF_INSN_DMOV2R15PD, && case_sem_INSN_DMOV2R15PD }, - { FR30BF_INSN_LDRES, && case_sem_INSN_LDRES }, - { FR30BF_INSN_STRES, && case_sem_INSN_STRES }, - { FR30BF_INSN_COPOP, && case_sem_INSN_COPOP }, - { FR30BF_INSN_COPLD, && case_sem_INSN_COPLD }, - { FR30BF_INSN_COPST, && case_sem_INSN_COPST }, - { FR30BF_INSN_COPSV, && case_sem_INSN_COPSV }, - { FR30BF_INSN_NOP, && case_sem_INSN_NOP }, - { FR30BF_INSN_ANDCCR, && case_sem_INSN_ANDCCR }, - { FR30BF_INSN_ORCCR, && case_sem_INSN_ORCCR }, - { FR30BF_INSN_STILM, && case_sem_INSN_STILM }, - { FR30BF_INSN_ADDSP, && case_sem_INSN_ADDSP }, - { FR30BF_INSN_EXTSB, && case_sem_INSN_EXTSB }, - { FR30BF_INSN_EXTUB, && case_sem_INSN_EXTUB }, - { FR30BF_INSN_EXTSH, && case_sem_INSN_EXTSH }, - { FR30BF_INSN_EXTUH, && case_sem_INSN_EXTUH }, - { FR30BF_INSN_LDM0, && case_sem_INSN_LDM0 }, - { FR30BF_INSN_LDM1, && case_sem_INSN_LDM1 }, - { FR30BF_INSN_STM0, && case_sem_INSN_STM0 }, - { FR30BF_INSN_STM1, && case_sem_INSN_STM1 }, - { FR30BF_INSN_ENTER, && case_sem_INSN_ENTER }, - { FR30BF_INSN_LEAVE, && case_sem_INSN_LEAVE }, - { FR30BF_INSN_XCHB, && case_sem_INSN_XCHB }, - { 0, 0 } - }; - int i; - - for (i = 0; labels[i].label != 0; ++i) - { -#if FAST_P - CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; -#else - CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; -#endif - } - -#undef DEFINE_LABELS -#endif /* DEFINE_LABELS */ - -#ifdef DEFINE_SWITCH - -/* If hyper-fast [well not unnecessarily slow] execution is selected, turn - off frills like tracing and profiling. */ -/* FIXME: A better way would be to have TRACE_RESULT check for something - that can cause it to be optimized out. Another way would be to emit - special handlers into the instruction "stream". */ - -#if FAST_P -#undef TRACE_RESULT -#define TRACE_RESULT(cpu, abuf, name, type, val) -#endif - -#undef GET_ATTR -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) -#else -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) -#endif - -{ - -#if WITH_SCACHE_PBB - -/* Branch to next handler without going around main loop. */ -#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case -SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) - -#else /* ! WITH_SCACHE_PBB */ - -#define NEXT(vpc) BREAK (sem) -#ifdef __GNUC__ -#if FAST_P - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) -#else - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) -#endif -#else - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) -#endif - -#endif /* ! WITH_SCACHE_PBB */ - - { - - CASE (sem, INSN_X_INVALID) : /* --invalid-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { - /* Update the recorded pc in the cpu state struct. - Only necessary for WITH_SCACHE case, but to avoid the - conditional compilation .... */ - SET_H_PC (pc); - /* Virtual insns have zero size. Overwrite vpc with address of next insn - using the default-insn-bitsize spec. When executing insns in parallel - we may want to queue the fault and continue execution. */ - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_AFTER) : /* --after-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF - fr30bf_pbb_after (current_cpu, sem_arg); -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_BEFORE) : /* --before-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF - fr30bf_pbb_before (current_cpu, sem_arg); -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF -#ifdef DEFINE_SWITCH - vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_type, pbb_br_npc); - BREAK (sem); -#else - /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ - vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_TYPE (current_cpu), - CPU_PBB_BR_NPC (current_cpu)); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_CHAIN) : /* --chain-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF - vpc = fr30bf_pbb_chain (current_cpu, sem_arg); -#ifdef DEFINE_SWITCH - BREAK (sem); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_BEGIN) : /* --begin-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF -#if defined DEFINE_SWITCH || defined FAST_P - /* In the switch case FAST_P is a constant, allowing several optimizations - in any called inline functions. */ - vpc = fr30bf_pbb_begin (current_cpu, FAST_P); -#else -#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ - vpc = fr30bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); -#else - vpc = fr30bf_pbb_begin (current_cpu, 0); -#endif -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADD) : /* add $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDI) : /* add $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADD2) : /* add2 $m4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDC) : /* addc $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = ADDCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - { - BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = tmp_tmp; - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDN) : /* addn $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDNI) : /* addn $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDN2) : /* addn2 $m4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUB) : /* sub $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBC) : /* subc $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = SUBCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - { - BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = tmp_tmp; - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBN) : /* subn $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMP) : /* cmp $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp1; - { - BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - tmp_tmp1 = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp1, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp1, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPI) : /* cmp $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp1; - { - BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_u4)); -{ - { - BI opval = EQSI (tmp_tmp1, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp1, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMP2) : /* cmp2 $m4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp1; - { - BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_m4)); -{ - { - BI opval = EQSI (tmp_tmp1, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp1, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_AND) : /* and $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ANDSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OR) : /* or $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ORSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EOR) : /* eor $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = XORSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDM) : /* and $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = ANDSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDH) : /* andh $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - HI tmp_tmp; - tmp_tmp = ANDHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQHI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTHI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - HI opval = tmp_tmp; - SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDB) : /* andb $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ANDQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - QI opval = tmp_tmp; - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORM) : /* or $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = ORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORH) : /* orh $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - HI tmp_tmp; - tmp_tmp = ORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQHI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTHI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - HI opval = tmp_tmp; - SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORB) : /* orb $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - QI opval = tmp_tmp; - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EORM) : /* eor $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = XORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EORH) : /* eorh $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - HI tmp_tmp; - tmp_tmp = XORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQHI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTHI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - HI opval = tmp_tmp; - SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EORB) : /* eorb $Rj,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = XORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - QI opval = tmp_tmp; - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BANDL) : /* bandl $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ANDQI (ORQI (FLD (f_u4), 240), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BORL) : /* borl $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BEORL) : /* beorl $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = XORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BANDH) : /* bandh $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ANDQI (ORQI (SLLQI (FLD (f_u4), 4), 15), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BORH) : /* borh $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BEORH) : /* beorh $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = XORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BTSTL) : /* btstl $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ANDQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = 0; - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BTSTH) : /* btsth $u4,@$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ANDQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MUL) : /* mul $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp; - tmp_tmp = MULDI (EXTSIDI (* FLD (i_Rj)), EXTSIDI (* FLD (i_Ri))); - { - SI opval = TRUNCDISI (tmp_tmp); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32)); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQDI (tmp_tmp, MAKEDI (0, 0)); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = ORIF (GTDI (tmp_tmp, MAKEDI (0, 2147483647)), LTDI (tmp_tmp, NEGDI (MAKEDI (0, 0x80000000)))); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULU) : /* mulu $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp; - tmp_tmp = MULDI (ZEXTSIDI (* FLD (i_Rj)), ZEXTSIDI (* FLD (i_Ri))); - { - SI opval = TRUNCDISI (tmp_tmp); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32)); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 4)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = NESI (GET_H_DR (((UINT) 4)), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULH) : /* mulh $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = MULHI (TRUNCSIHI (* FLD (i_Rj)), TRUNCSIHI (* FLD (i_Ri))); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = GESI (GET_H_DR (((UINT) 5)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULUH) : /* muluh $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = MULSI (ANDSI (* FLD (i_Rj), 65535), ANDSI (* FLD (i_Ri), 65535)); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = GESI (GET_H_DR (((UINT) 5)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV0S) : /* div0s $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_d0bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval); - } - { - BI opval = XORBI (CPU (h_d0bit), LTSI (* FLD (i_Ri), 0)); - CPU (h_d1bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval); - } -if (NEBI (CPU (h_d0bit), 0)) { - { - SI opval = 0xffffffff; - SET_H_DR (((UINT) 4), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} else { - { - SI opval = 0; - SET_H_DR (((UINT) 4), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV0U) : /* div0u $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = 0; - CPU (h_d0bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval); - } - { - BI opval = 0; - CPU (h_d1bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval); - } - { - SI opval = 0; - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV1) : /* div1 $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - { - SI opval = SLLSI (GET_H_DR (((UINT) 4)), 1); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -if (LTSI (GET_H_DR (((UINT) 5)), 0)) { - { - SI opval = ADDSI (GET_H_DR (((UINT) 4)), 1); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - { - SI opval = SLLSI (GET_H_DR (((UINT) 5)), 1); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -if (EQBI (CPU (h_d1bit), 1)) { -{ - tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} else { -{ - tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} -if (NOTBI (XORBI (XORBI (CPU (h_d0bit), CPU (h_d1bit)), CPU (h_cbit)))) { -{ - { - SI opval = tmp_tmp; - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = ORSI (GET_H_DR (((UINT) 5)), 1); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} - { - BI opval = EQSI (GET_H_DR (((UINT) 4)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV2) : /* div2 $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; -if (EQBI (CPU (h_d1bit), 1)) { -{ - tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} else { -{ - tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} -if (EQSI (tmp_tmp, 0)) { -{ - { - BI opval = 1; - CPU (h_zbit) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - SI opval = 0; - SET_H_DR (((UINT) 4), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_zbit) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV3) : /* div3 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (EQBI (CPU (h_zbit), 1)) { - { - SI opval = ADDSI (GET_H_DR (((UINT) 5)), 1); - SET_H_DR (((UINT) 5), opval); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV4S) : /* div4s */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (EQBI (CPU (h_d1bit), 1)) { - { - SI opval = NEGSI (GET_H_DR (((UINT) 5))); - SET_H_DR (((UINT) 5), opval); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LSL) : /* lsl $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ANDSI (* FLD (i_Rj), 31); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SLLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LSLI) : /* lsl $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = FLD (f_u4); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SLLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LSL2) : /* lsl2 $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ADDSI (FLD (f_u4), 16); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SLLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LSR) : /* lsr $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ANDSI (* FLD (i_Rj), 31); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LSRI) : /* lsr $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = FLD (f_u4); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LSR2) : /* lsr2 $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ADDSI (FLD (f_u4), 16); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ASR) : /* asr $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ANDSI (* FLD (i_Rj), 31); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRASI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ASRI) : /* asr $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = FLD (f_u4); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRASI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ASR2) : /* asr2 $u4,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ADDSI (FLD (f_u4), 16); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRASI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDI8) : /* ldi:8 $i8,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldi8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = FLD (f_i8); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDI20) : /* ldi:20 $i20,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldi20.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = FLD (f_i20); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDI32) : /* ldi:32 $i32,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldi32.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 6); - - { - SI opval = FLD (f_i32); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD) : /* ld @$Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDUH) : /* lduh @$Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDUB) : /* ldub @$Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR13) : /* ld @($R13,$Rj),$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR13UH) : /* lduh @($R13,$Rj),$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR13UB) : /* ldub @($R13,$Rj),$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR14) : /* ld @($R14,$disp10),$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr14.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR14UH) : /* lduh @($R14,$disp9),$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr14uh.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR14UB) : /* ldub @($R14,$disp8),$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr14ub.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR15) : /* ld @($R15,$udisp6),$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr15.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_udisp6), CPU (h_gr[((UINT) 15)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR15GR) : /* ld @$R15+,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr15gr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -if (NESI (FLD (f_Ri), 15)) { - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR15DR) : /* ld @$R15+,$Rs2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_tmp; - SET_H_DR (FLD (f_Rs2), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDR15PS) : /* ld @$R15+,$ps */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addsp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - SET_H_PS (opval); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST) : /* st $Ri,@$Rj */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STH) : /* sth $Ri,@$Rj */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_Ri); - SETMEMHI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STB) : /* stb $Ri,@$Rj */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_Ri); - SETMEMQI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR13) : /* st $Ri,@($R13,$Rj) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR13H) : /* sth $Ri,@($R13,$Rj) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_Ri); - SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR13B) : /* stb $Ri,@($R13,$Rj) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_Ri); - SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR14) : /* st $Ri,@($R14,$disp10) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str14.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR14H) : /* sth $Ri,@($R14,$disp9) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str14h.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_Ri); - SETMEMHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR14B) : /* stb $Ri,@($R14,$disp8) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str14b.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_Ri); - SETMEMQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR15) : /* st $Ri,@($R15,$udisp6) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str15.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_udisp6)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR15GR) : /* st $Ri,@-$R15 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_str15gr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = * FLD (i_Ri); - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR15DR) : /* st $Rs2,@-$R15 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = GET_H_DR (FLD (f_Rs2)); - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STR15PS) : /* st $ps,@-$R15 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addsp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = GET_H_PS (); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOV) : /* mov $Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldr13.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Rj); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVDR) : /* mov $Rs1,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movdr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_DR (FLD (f_Rs1)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOVPS) : /* mov $ps,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_movdr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_PS (); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOV2DR) : /* mov $Ri,$Rs1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SET_H_DR (FLD (f_Rs1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MOV2PS) : /* mov $Ri,$ps */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = * FLD (i_Ri); - SET_H_PS (opval); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_JMP) : /* jmp @$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_JMPD) : /* jmp:d @$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CALLR) : /* call @$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (pc, 2); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CALLRD) : /* call:d @$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mov2dr.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -{ - { - SI opval = ADDSI (pc, 4); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CALL) : /* call $label12 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_call.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (pc, 2); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = FLD (i_label12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CALLD) : /* call:d $label12 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_call.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -{ - { - SI opval = ADDSI (pc, 4); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = FLD (i_label12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RET) : /* ret */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = GET_H_DR (((UINT) 1)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RET_D) : /* ret:d */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = GET_H_DR (((UINT) 1)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_INT) : /* int $u8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_int.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -; /*clobber*/ -; /*clobber*/ -; /*clobber*/ - { - SI opval = fr30_int (current_cpu, pc, FLD (f_u8)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_INTE) : /* inte */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -; /*clobber*/ -; /*clobber*/ -; /*clobber*/ - { - SI opval = fr30_inte (current_cpu, pc); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RETI) : /* reti */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (EQBI (GET_H_SBIT (), 0)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2))); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4); - SET_H_DR (((UINT) 2), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2))); - SET_H_PS (opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4); - SET_H_DR (((UINT) 2), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} else { -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3))); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4); - SET_H_DR (((UINT) 3), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3))); - SET_H_PS (opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4); - SET_H_DR (((UINT) 3), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BRAD) : /* bra:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BRA) : /* bra $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNOD) : /* bno:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -((void) 0); /*nop*/ -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNO) : /* bno $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BEQD) : /* beq:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_zbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BEQ) : /* beq $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_zbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNED) : /* bne:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNE) : /* bne $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BCD) : /* bc:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_cbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BC) : /* bc $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_cbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNCD) : /* bnc:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_cbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNC) : /* bnc $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_cbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BND) : /* bn:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_nbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BN) : /* bn $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_nbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BPD) : /* bp:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BP) : /* bp $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BVD) : /* bv:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_vbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BV) : /* bv $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_vbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNVD) : /* bnv:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_vbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNV) : /* bnv $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_vbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLTD) : /* blt:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (XORBI (CPU (h_vbit), CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLT) : /* blt $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (XORBI (CPU (h_vbit), CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGED) : /* bge:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGE) : /* bge $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLED) : /* ble:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLE) : /* ble $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGTD) : /* bgt:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGT) : /* bgt $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLSD) : /* bls:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ORBI (CPU (h_cbit), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLS) : /* bls $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (ORBI (CPU (h_cbit), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BHID) : /* bhi:d $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BHI) : /* bhi $label9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_brad.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOVR13) : /* dmov $R13,@$dir10 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = CPU (h_gr[((UINT) 13)]); - SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOVR13H) : /* dmovh $R13,@$dir9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = CPU (h_gr[((UINT) 13)]); - SETMEMHI (current_cpu, pc, FLD (f_dir9), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOVR13B) : /* dmovb $R13,@$dir8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = CPU (h_gr[((UINT) 13)]); - SETMEMQI (current_cpu, pc, FLD (f_dir8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOVR13PI) : /* dmov @$R13+,@$dir10 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); - SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOVR13PIH) : /* dmovh @$R13+,@$dir9 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - HI opval = GETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); - SETMEMHI (current_cpu, pc, FLD (f_dir9), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOVR13PIB) : /* dmovb @$R13+,@$dir8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - QI opval = GETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); - SETMEMQI (current_cpu, pc, FLD (f_dir8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOVR15PI) : /* dmov @$R15+,@$dir10 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOV2R13) : /* dmov @$dir10,$R13 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOV2R13H) : /* dmovh @$dir9,$R13 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9)); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOV2R13B) : /* dmovb @$dir8,$R13 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8)); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOV2R13PI) : /* dmov @$dir10,@$R13+ */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOV2R13PIH) : /* dmovh @$dir9,@$R13+ */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - HI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9)); - SETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOV2R13PIB) : /* dmovb @$dir8,@$R13+ */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - QI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8)); - SETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DMOV2R15PD) : /* dmov @$dir10,@-$R15 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDRES) : /* ldres @$Ri+,$u4 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), 4); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STRES) : /* stres $u4,@$Ri+ */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), 4); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_COPOP) : /* copop $u4c,$ccc,$CRj,$CRi */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_COPLD) : /* copld $u4c,$ccc,$Rjc,$CRi */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_COPST) : /* copst $u4c,$ccc,$CRj,$Ric */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_COPSV) : /* copsv $u4c,$ccc,$CRj,$Ric */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOP) : /* nop */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ANDCCR) : /* andccr $u8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_int.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = ANDQI (GET_H_CCR (), FLD (f_u8)); - SET_H_CCR (opval); - TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ORCCR) : /* orccr $u8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_int.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = ORQI (GET_H_CCR (), FLD (f_u8)); - SET_H_CCR (opval); - TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STILM) : /* stilm $u8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_int.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = ANDSI (FLD (f_u8), 31); - SET_H_ILM (opval); - TRACE_RESULT (current_cpu, abuf, "ilm", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDSP) : /* addsp $s10 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addsp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_s10)); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EXTSB) : /* extsb $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (ANDQI (* FLD (i_Ri), 255)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EXTUB) : /* extub $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTQISI (ANDQI (* FLD (i_Ri), 255)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EXTSH) : /* extsh $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (ANDHI (* FLD (i_Ri), 65535)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_EXTUH) : /* extuh $Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add2.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTHISI (ANDHI (* FLD (i_Ri), 65535)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDM0) : /* ldm0 ($reglist_low_ld) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldm0.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_low_ld), 1)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 0)]) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 2)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 1)]) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 4)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 2)]) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 8)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 3)]) = opval; - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 16)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 4)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 32)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 5)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 64)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 6)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 128)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 7)]) = opval; - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDM1) : /* ldm1 ($reglist_hi_ld) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ldm1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_hi_ld), 1)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 8)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 2)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 9)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 4)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 10)]) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 8)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 11)]) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 16)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 12)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 32)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 13)]) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 64)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 14)]) = opval; - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 128)) { - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STM0) : /* stm0 ($reglist_low_st) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stm0.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_low_st), 1)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 7)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 2)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 6)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 4)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 5)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 8)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 4)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 16)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 3)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 32)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 2)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 64)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 1)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 128)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 0)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STM1) : /* stm1 ($reglist_hi_st) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_stm1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_hi_st), 1)) { -{ - SI tmp_save_r15; - tmp_save_r15 = CPU (h_gr[((UINT) 15)]); - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_save_r15; - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 2)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 14)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 4)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 13)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 8)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 12)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 16)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 11)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 32)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 10)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 64)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 9)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 128)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 8)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ENTER) : /* enter $u10 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_enter.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - { - SI opval = CPU (h_gr[((UINT) 14)]); - SETMEMSI (current_cpu, pc, tmp_tmp, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_tmp; - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), FLD (f_u10)); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LEAVE) : /* leave */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_enter.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (CPU (h_gr[((UINT) 14)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, SUBSI (CPU (h_gr[((UINT) 15)]), 4)); - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XCHB) : /* xchb @$Rj,$Ri */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = * FLD (i_Ri); - { - SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - UQI opval = tmp_tmp; - SETMEMUQI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - - } - ENDSWITCH (sem) /* End of semantic switch. */ - - /* At this point `vpc' contains the next insn to execute. */ -} - -#undef DEFINE_SWITCH -#endif /* DEFINE_SWITCH */ diff --git a/sim/fr30/sem.c b/sim/fr30/sem.c deleted file mode 100644 index fb5893c8229..00000000000 --- a/sim/fr30/sem.c +++ /dev/null @@ -1,5730 +0,0 @@ -/* Simulator instruction semantics for fr30bf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU fr30bf -#define WANT_CPU_FR30BF - -#include "sim-main.h" -#include "cgen-mem.h" -#include "cgen-ops.h" - -#undef GET_ATTR -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) -#else -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) -#endif - -/* This is used so that we can compile two copies of the semantic code, - one with full feature support and one without that runs fast(er). - FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ -#if FAST_P -#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) -#undef TRACE_RESULT -#define TRACE_RESULT(cpu, abuf, name, type, val) -#else -#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) -#endif - -/* x-invalid: --invalid-- */ - -static SEM_PC -SEM_FN_NAME (fr30bf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { - /* Update the recorded pc in the cpu state struct. - Only necessary for WITH_SCACHE case, but to avoid the - conditional compilation .... */ - SET_H_PC (pc); - /* Virtual insns have zero size. Overwrite vpc with address of next insn - using the default-insn-bitsize spec. When executing insns in parallel - we may want to queue the fault and continue execution. */ - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); - } - - return vpc; -#undef FLD -} - -/* x-after: --after-- */ - -static SEM_PC -SEM_FN_NAME (fr30bf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF - fr30bf_pbb_after (current_cpu, sem_arg); -#endif - } - - return vpc; -#undef FLD -} - -/* x-before: --before-- */ - -static SEM_PC -SEM_FN_NAME (fr30bf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF - fr30bf_pbb_before (current_cpu, sem_arg); -#endif - } - - return vpc; -#undef FLD -} - -/* x-cti-chain: --cti-chain-- */ - -static SEM_PC -SEM_FN_NAME (fr30bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF -#ifdef DEFINE_SWITCH - vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_type, pbb_br_npc); - BREAK (sem); -#else - /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ - vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_TYPE (current_cpu), - CPU_PBB_BR_NPC (current_cpu)); -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* x-chain: --chain-- */ - -static SEM_PC -SEM_FN_NAME (fr30bf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF - vpc = fr30bf_pbb_chain (current_cpu, sem_arg); -#ifdef DEFINE_SWITCH - BREAK (sem); -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* x-begin: --begin-- */ - -static SEM_PC -SEM_FN_NAME (fr30bf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_FR30BF -#if defined DEFINE_SWITCH || defined FAST_P - /* In the switch case FAST_P is a constant, allowing several optimizations - in any called inline functions. */ - vpc = fr30bf_pbb_begin (current_cpu, FAST_P); -#else -#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ - vpc = fr30bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); -#else - vpc = fr30bf_pbb_begin (current_cpu, 0); -#endif -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* add: add $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* addi: add $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* add2: add2 $m4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,add2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* addc: addc $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,addc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = ADDCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - { - BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = tmp_tmp; - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* addn: addn $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,addn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* addni: addn $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,addni) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* addn2: addn2 $m4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,addn2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* sub: sub $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* subc: subc $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,subc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = SUBCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - { - BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = tmp_tmp; - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* subn: subn $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,subn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmp: cmp $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp1; - { - BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - tmp_tmp1 = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp1, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp1, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* cmpi: cmp $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp1; - { - BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_u4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_u4)); -{ - { - BI opval = EQSI (tmp_tmp1, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp1, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* cmp2: cmp2 $m4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,cmp2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp1; - { - BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } - { - BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_m4), 0); - CPU (h_cbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_m4)); -{ - { - BI opval = EQSI (tmp_tmp1, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp1, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* and: and $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ANDSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* or: or $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ORSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* eor: eor $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,eor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = XORSI (* FLD (i_Ri), * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -{ - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} -} - - return vpc; -#undef FLD -} - -/* andm: and $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,andm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = ANDSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* andh: andh $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,andh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - HI tmp_tmp; - tmp_tmp = ANDHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQHI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTHI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - HI opval = tmp_tmp; - SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* andb: andb $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,andb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ANDQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - QI opval = tmp_tmp; - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* orm: or $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,orm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = ORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* orh: orh $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,orh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - HI tmp_tmp; - tmp_tmp = ORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQHI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTHI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - HI opval = tmp_tmp; - SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* orb: orb $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,orb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - QI opval = tmp_tmp; - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* eorm: eor $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,eorm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = XORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQSI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTSI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* eorh: eorh $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,eorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - HI tmp_tmp; - tmp_tmp = XORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQHI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTHI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - HI opval = tmp_tmp; - SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* eorb: eorb $Rj,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,eorb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = XORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); -{ - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - { - QI opval = tmp_tmp; - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* bandl: bandl $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bandl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ANDQI (ORQI (FLD (f_u4), 240), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* borl: borl $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,borl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* beorl: beorl $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,beorl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = XORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* bandh: bandh $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bandh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ANDQI (ORQI (SLLQI (FLD (f_u4), 4), 15), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* borh: borh $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,borh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = ORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* beorh: beorh $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,beorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = XORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* btstl: btstl $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,btstl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ANDQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = 0; - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* btsth: btsth $u4,@$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,btsth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - QI tmp_tmp; - tmp_tmp = ANDQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); - { - BI opval = EQQI (tmp_tmp, 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = LTQI (tmp_tmp, 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* mul: mul $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp; - tmp_tmp = MULDI (EXTSIDI (* FLD (i_Rj)), EXTSIDI (* FLD (i_Ri))); - { - SI opval = TRUNCDISI (tmp_tmp); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32)); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQDI (tmp_tmp, MAKEDI (0, 0)); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = ORIF (GTDI (tmp_tmp, MAKEDI (0, 2147483647)), LTDI (tmp_tmp, NEGDI (MAKEDI (0, 0x80000000)))); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* mulu: mulu $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,mulu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp; - tmp_tmp = MULDI (ZEXTSIDI (* FLD (i_Rj)), ZEXTSIDI (* FLD (i_Ri))); - { - SI opval = TRUNCDISI (tmp_tmp); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32)); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 4)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - BI opval = NESI (GET_H_DR (((UINT) 4)), 0); - CPU (h_vbit) = opval; - TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* mulh: mulh $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,mulh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = MULHI (TRUNCSIHI (* FLD (i_Rj)), TRUNCSIHI (* FLD (i_Ri))); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = GESI (GET_H_DR (((UINT) 5)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* muluh: muluh $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,muluh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = MULSI (ANDSI (* FLD (i_Rj), 65535), ANDSI (* FLD (i_Ri), 65535)); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = GESI (GET_H_DR (((UINT) 5)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* div0s: div0s $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,div0s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); - CPU (h_d0bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval); - } - { - BI opval = XORBI (CPU (h_d0bit), LTSI (* FLD (i_Ri), 0)); - CPU (h_d1bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval); - } -if (NEBI (CPU (h_d0bit), 0)) { - { - SI opval = 0xffffffff; - SET_H_DR (((UINT) 4), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} else { - { - SI opval = 0; - SET_H_DR (((UINT) 4), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* div0u: div0u $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,div0u) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = 0; - CPU (h_d0bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval); - } - { - BI opval = 0; - CPU (h_d1bit) = opval; - TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval); - } - { - SI opval = 0; - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* div1: div1 $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,div1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - { - SI opval = SLLSI (GET_H_DR (((UINT) 4)), 1); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -if (LTSI (GET_H_DR (((UINT) 5)), 0)) { - { - SI opval = ADDSI (GET_H_DR (((UINT) 4)), 1); - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - { - SI opval = SLLSI (GET_H_DR (((UINT) 5)), 1); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -if (EQBI (CPU (h_d1bit), 1)) { -{ - tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} else { -{ - tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} -if (NOTBI (XORBI (XORBI (CPU (h_d0bit), CPU (h_d1bit)), CPU (h_cbit)))) { -{ - { - SI opval = tmp_tmp; - SET_H_DR (((UINT) 4), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = ORSI (GET_H_DR (((UINT) 5)), 1); - SET_H_DR (((UINT) 5), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} - { - BI opval = EQSI (GET_H_DR (((UINT) 4)), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* div2: div2 $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,div2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; -if (EQBI (CPU (h_d1bit), 1)) { -{ - tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} else { -{ - tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); - { - BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} -} -if (EQSI (tmp_tmp, 0)) { -{ - { - BI opval = 1; - CPU (h_zbit) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } - { - SI opval = 0; - SET_H_DR (((UINT) 4), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_zbit) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* div3: div3 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,div3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (EQBI (CPU (h_zbit), 1)) { - { - SI opval = ADDSI (GET_H_DR (((UINT) 5)), 1); - SET_H_DR (((UINT) 5), opval); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* div4s: div4s */ - -static SEM_PC -SEM_FN_NAME (fr30bf,div4s) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (EQBI (CPU (h_d1bit), 1)) { - { - SI opval = NEGSI (GET_H_DR (((UINT) 5))); - SET_H_DR (((UINT) 5), opval); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* lsl: lsl $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,lsl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ANDSI (* FLD (i_Rj), 31); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SLLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* lsli: lsl $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,lsli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = FLD (f_u4); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SLLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* lsl2: lsl2 $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,lsl2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ADDSI (FLD (f_u4), 16); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SLLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* lsr: lsr $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,lsr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ANDSI (* FLD (i_Rj), 31); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* lsri: lsr $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,lsri) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = FLD (f_u4); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* lsr2: lsr2 $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,lsr2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ADDSI (FLD (f_u4), 16); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRLSI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* asr: asr $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,asr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ANDSI (* FLD (i_Rj), 31); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRASI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* asri: asr $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,asri) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = FLD (f_u4); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRASI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* asr2: asr2 $u4,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,asr2) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_shift; - tmp_shift = ADDSI (FLD (f_u4), 16); -if (NESI (tmp_shift, 0)) { -{ - { - BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } - { - SI opval = SRASI (* FLD (i_Ri), tmp_shift); - * FLD (i_Ri) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} else { - { - BI opval = 0; - CPU (h_cbit) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); - } -} - { - BI opval = LTSI (* FLD (i_Ri), 0); - CPU (h_nbit) = opval; - TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); - } - { - BI opval = EQSI (* FLD (i_Ri), 0); - CPU (h_zbit) = opval; - TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* ldi8: ldi:8 $i8,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldi8.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = FLD (f_i8); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldi20: ldi:20 $i20,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldi20) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldi20.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = FLD (f_i20); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldi32: ldi:32 $i32,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldi32) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldi32.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 6); - - { - SI opval = FLD (f_i32); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ld: ld @$Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* lduh: lduh @$Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldub: ldub @$Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr13: ld @($R13,$Rj),$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr13uh: lduh @($R13,$Rj),$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr13uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr13ub: ldub @($R13,$Rj),$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr13ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr14: ld @($R14,$disp10),$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr14) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr14.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr14uh: lduh @($R14,$disp9),$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr14uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr14uh.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr14ub: ldub @($R14,$disp8),$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr14ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr14ub.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr15: ld @($R15,$udisp6),$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr15) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_udisp6), CPU (h_gr[((UINT) 15)]))); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldr15gr: ld @$R15+,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr15gr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15gr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -if (NESI (FLD (f_Ri), 15)) { - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* ldr15dr: ld @$R15+,$Rs2 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_tmp; - SET_H_DR (FLD (f_Rs2), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldr15ps: ld @$R15+,$ps */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldr15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addsp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - SET_H_PS (opval); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* st: st $Ri,@$Rj */ - -static SEM_PC -SEM_FN_NAME (fr30bf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* sth: sth $Ri,@$Rj */ - -static SEM_PC -SEM_FN_NAME (fr30bf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_Ri); - SETMEMHI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stb: stb $Ri,@$Rj */ - -static SEM_PC -SEM_FN_NAME (fr30bf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_Ri); - SETMEMQI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str13: st $Ri,@($R13,$Rj) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str13h: sth $Ri,@($R13,$Rj) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_Ri); - SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str13b: stb $Ri,@($R13,$Rj) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_Ri); - SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str14: st $Ri,@($R14,$disp10) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str14) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str14.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str14h: sth $Ri,@($R14,$disp9) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str14h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str14h.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_Ri); - SETMEMHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str14b: stb $Ri,@($R14,$disp8) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str14b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str14b.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_Ri); - SETMEMQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)])), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str15: st $Ri,@($R15,$udisp6) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str15) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str15.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_udisp6)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* str15gr: st $Ri,@-$R15 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str15gr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_str15gr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = * FLD (i_Ri); - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* str15dr: st $Rs2,@-$R15 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr15dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = GET_H_DR (FLD (f_Rs2)); - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_tmp; - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* str15ps: st $ps,@-$R15 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,str15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addsp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = GET_H_PS (); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* mov: mov $Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldr13.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Rj); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movdr: mov $Rs1,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,movdr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movdr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_DR (FLD (f_Rs1)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* movps: mov $ps,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,movps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_movdr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_PS (); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mov2dr: mov $Ri,$Rs1 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,mov2dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_Ri); - SET_H_DR (FLD (f_Rs1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mov2ps: mov $Ri,$ps */ - -static SEM_PC -SEM_FN_NAME (fr30bf,mov2ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = * FLD (i_Ri); - SET_H_PS (opval); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* jmp: jmp @$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* jmpd: jmp:d @$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,jmpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* callr: call @$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,callr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (pc, 2); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* callrd: call:d @$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,callrd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mov2dr.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -{ - { - SI opval = ADDSI (pc, 4); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = * FLD (i_Ri); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* call: call $label12 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,call) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_call.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (pc, 2); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = FLD (i_label12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* calld: call:d $label12 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,calld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_call.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -{ - { - SI opval = ADDSI (pc, 4); - SET_H_DR (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - USI opval = FLD (i_label12); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* ret: ret */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ret) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = GET_H_DR (((UINT) 1)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* ret:d: ret:d */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ret_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = GET_H_DR (((UINT) 1)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* int: int $u8 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,int) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -; /*clobber*/ -; /*clobber*/ -; /*clobber*/ - { - SI opval = fr30_int (current_cpu, pc, FLD (f_u8)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* inte: inte */ - -static SEM_PC -SEM_FN_NAME (fr30bf,inte) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -; /*clobber*/ -; /*clobber*/ -; /*clobber*/ - { - SI opval = fr30_inte (current_cpu, pc); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* reti: reti */ - -static SEM_PC -SEM_FN_NAME (fr30bf,reti) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (EQBI (GET_H_SBIT (), 0)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2))); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4); - SET_H_DR (((UINT) 2), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2))); - SET_H_PS (opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4); - SET_H_DR (((UINT) 2), opval); - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} else { -{ - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3))); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4); - SET_H_DR (((UINT) 3), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3))); - SET_H_PS (opval); - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); - } - { - SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4); - SET_H_DR (((UINT) 3), opval); - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* brad: bra:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,brad) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bra: bra $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bnod: bno:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bnod) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -((void) 0); /*nop*/ -} - - return vpc; -#undef FLD -} - -/* bno: bno $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bno) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* beqd: beq:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,beqd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_zbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* beq: beq $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_zbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bned: bne:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bned) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bne: bne $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bcd: bc:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bcd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_cbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bc: bc $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_cbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bncd: bnc:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bncd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_cbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bnc: bnc $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_cbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bnd: bn:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bnd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_nbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bn: bn $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bn) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_nbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bpd: bp:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bp: bp $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bvd: bv:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_vbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bv: bv $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_vbit)) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bnvd: bnv:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bnvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (CPU (h_vbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bnv: bnv $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bnv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_vbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bltd: blt:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bltd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (XORBI (CPU (h_vbit), CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* blt: blt $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,blt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (XORBI (CPU (h_vbit), CPU (h_nbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bged: bge:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bged) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bge: bge $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bled: ble:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bled) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* ble: ble $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bgtd: bgt:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bgtd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bgt: bgt $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bgt) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* blsd: bls:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,blsd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ORBI (CPU (h_cbit), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bls: bls $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bls) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (ORBI (CPU (h_cbit), CPU (h_zbit))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bhid: bhi:d $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bhid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bhi: bhi $label9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,bhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_brad.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { - { - USI opval = FLD (i_label9); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* dmovr13: dmov $R13,@$dir10 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmovr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = CPU (h_gr[((UINT) 13)]); - SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* dmovr13h: dmovh $R13,@$dir9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmovr13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = CPU (h_gr[((UINT) 13)]); - SETMEMHI (current_cpu, pc, FLD (f_dir9), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* dmovr13b: dmovb $R13,@$dir8 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmovr13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = CPU (h_gr[((UINT) 13)]); - SETMEMQI (current_cpu, pc, FLD (f_dir8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* dmovr13pi: dmov @$R13+,@$dir10 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmovr13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); - SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmovr13pih: dmovh @$R13+,@$dir9 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmovr13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - HI opval = GETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); - SETMEMHI (current_cpu, pc, FLD (f_dir9), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmovr13pib: dmovb @$R13+,@$dir8 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmovr13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - QI opval = GETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); - SETMEMQI (current_cpu, pc, FLD (f_dir8), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmovr15pi: dmov @$R15+,@$dir10 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmovr15pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmov2r13: dmov @$dir10,$R13 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmov2r13) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* dmov2r13h: dmovh @$dir9,$R13 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmov2r13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9)); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* dmov2r13b: dmovb @$dir8,$R13 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmov2r13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8)); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* dmov2r13pi: dmov @$dir10,@$R13+ */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmov2r13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmov2r13pih: dmovh @$dir9,@$R13+ */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmov2r13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pih.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - HI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9)); - SETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmov2r13pib: dmovb @$dir8,@$R13+ */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmov2r13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr13pib.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - QI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8)); - SETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1); - CPU (h_gr[((UINT) 13)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* dmov2r15pd: dmov @$dir10,@-$R15 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,dmov2r15pd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_dmovr15pi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ldres: ldres @$Ri+,$u4 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldres) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), 4); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stres: stres $u4,@$Ri+ */ - -static SEM_PC -SEM_FN_NAME (fr30bf,stres) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_Ri), 4); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* copop: copop $u4c,$ccc,$CRj,$CRi */ - -static SEM_PC -SEM_FN_NAME (fr30bf,copop) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* copld: copld $u4c,$ccc,$Rjc,$CRi */ - -static SEM_PC -SEM_FN_NAME (fr30bf,copld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* copst: copst $u4c,$ccc,$CRj,$Ric */ - -static SEM_PC -SEM_FN_NAME (fr30bf,copst) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* copsv: copsv $u4c,$ccc,$CRj,$Ric */ - -static SEM_PC -SEM_FN_NAME (fr30bf,copsv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* nop: nop */ - -static SEM_PC -SEM_FN_NAME (fr30bf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -((void) 0); /*nop*/ - - return vpc; -#undef FLD -} - -/* andccr: andccr $u8 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,andccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = ANDQI (GET_H_CCR (), FLD (f_u8)); - SET_H_CCR (opval); - TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* orccr: orccr $u8 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,orccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = ORQI (GET_H_CCR (), FLD (f_u8)); - SET_H_CCR (opval); - TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stilm: stilm $u8 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,stilm) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_int.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - UQI opval = ANDSI (FLD (f_u8), 31); - SET_H_ILM (opval); - TRACE_RESULT (current_cpu, abuf, "ilm", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* addsp: addsp $s10 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,addsp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addsp.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_s10)); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* extsb: extsb $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,extsb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (ANDQI (* FLD (i_Ri), 255)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* extub: extub $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,extub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTQISI (ANDQI (* FLD (i_Ri), 255)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* extsh: extsh $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,extsh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (ANDHI (* FLD (i_Ri), 65535)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* extuh: extuh $Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,extuh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add2.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTHISI (ANDHI (* FLD (i_Ri), 65535)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldm0: ldm0 ($reglist_low_ld) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldm0) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldm0.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_low_ld), 1)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 0)]) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 2)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 1)]) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 4)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 2)]) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 8)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 3)]) = opval; - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 16)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 4)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 32)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 5)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 64)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 6)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_ld), 128)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 7)]) = opval; - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* ldm1: ldm1 ($reglist_hi_ld) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,ldm1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ldm1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_hi_ld), 1)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 8)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 2)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 9)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 4)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 10)]) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 8)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 11)]) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 16)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 12)]) = opval; - written |= (1 << 5); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 32)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 13)]) = opval; - written |= (1 << 6); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 64)) { -{ - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 14)]) = opval; - written |= (1 << 7); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_ld), 128)) { - { - SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 8); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* stm0: stm0 ($reglist_low_st) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,stm0) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stm0.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_low_st), 1)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 7)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 2)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 6)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 4)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 5)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 8)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 4)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 16)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 3)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 32)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 2)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 64)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 1)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_low_st), 128)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 0)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 11); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* stm1: stm1 ($reglist_hi_st) */ - -static SEM_PC -SEM_FN_NAME (fr30bf,stm1) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_stm1.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (ANDSI (FLD (f_reglist_hi_st), 1)) { -{ - SI tmp_save_r15; - tmp_save_r15 = CPU (h_gr[((UINT) 15)]); - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = tmp_save_r15; - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 2)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 14)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 4)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 13)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 8)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 12)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 16)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 11)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 32)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 10)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 64)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 9)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -if (ANDSI (FLD (f_reglist_hi_st), 128)) { -{ - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - written |= (1 << 9); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = CPU (h_gr[((UINT) 8)]); - SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); - written |= (1 << 10); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} -} -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* enter: enter $u10 */ - -static SEM_PC -SEM_FN_NAME (fr30bf,enter) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_enter.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = SUBSI (CPU (h_gr[((UINT) 15)]), 4); - { - SI opval = CPU (h_gr[((UINT) 14)]); - SETMEMSI (current_cpu, pc, tmp_tmp, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_tmp; - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), FLD (f_u10)); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* leave: leave */ - -static SEM_PC -SEM_FN_NAME (fr30bf,leave) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_enter.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (CPU (h_gr[((UINT) 14)]), 4); - CPU (h_gr[((UINT) 15)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, SUBSI (CPU (h_gr[((UINT) 15)]), 4)); - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* xchb: xchb @$Rj,$Ri */ - -static SEM_PC -SEM_FN_NAME (fr30bf,xchb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_tmp; - tmp_tmp = * FLD (i_Ri); - { - SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj)); - * FLD (i_Ri) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - UQI opval = tmp_tmp; - SETMEMUQI (current_cpu, pc, * FLD (i_Rj), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* Table of all semantic fns. */ - -static const struct sem_fn_desc sem_fns[] = { - { FR30BF_INSN_X_INVALID, SEM_FN_NAME (fr30bf,x_invalid) }, - { FR30BF_INSN_X_AFTER, SEM_FN_NAME (fr30bf,x_after) }, - { FR30BF_INSN_X_BEFORE, SEM_FN_NAME (fr30bf,x_before) }, - { FR30BF_INSN_X_CTI_CHAIN, SEM_FN_NAME (fr30bf,x_cti_chain) }, - { FR30BF_INSN_X_CHAIN, SEM_FN_NAME (fr30bf,x_chain) }, - { FR30BF_INSN_X_BEGIN, SEM_FN_NAME (fr30bf,x_begin) }, - { FR30BF_INSN_ADD, SEM_FN_NAME (fr30bf,add) }, - { FR30BF_INSN_ADDI, SEM_FN_NAME (fr30bf,addi) }, - { FR30BF_INSN_ADD2, SEM_FN_NAME (fr30bf,add2) }, - { FR30BF_INSN_ADDC, SEM_FN_NAME (fr30bf,addc) }, - { FR30BF_INSN_ADDN, SEM_FN_NAME (fr30bf,addn) }, - { FR30BF_INSN_ADDNI, SEM_FN_NAME (fr30bf,addni) }, - { FR30BF_INSN_ADDN2, SEM_FN_NAME (fr30bf,addn2) }, - { FR30BF_INSN_SUB, SEM_FN_NAME (fr30bf,sub) }, - { FR30BF_INSN_SUBC, SEM_FN_NAME (fr30bf,subc) }, - { FR30BF_INSN_SUBN, SEM_FN_NAME (fr30bf,subn) }, - { FR30BF_INSN_CMP, SEM_FN_NAME (fr30bf,cmp) }, - { FR30BF_INSN_CMPI, SEM_FN_NAME (fr30bf,cmpi) }, - { FR30BF_INSN_CMP2, SEM_FN_NAME (fr30bf,cmp2) }, - { FR30BF_INSN_AND, SEM_FN_NAME (fr30bf,and) }, - { FR30BF_INSN_OR, SEM_FN_NAME (fr30bf,or) }, - { FR30BF_INSN_EOR, SEM_FN_NAME (fr30bf,eor) }, - { FR30BF_INSN_ANDM, SEM_FN_NAME (fr30bf,andm) }, - { FR30BF_INSN_ANDH, SEM_FN_NAME (fr30bf,andh) }, - { FR30BF_INSN_ANDB, SEM_FN_NAME (fr30bf,andb) }, - { FR30BF_INSN_ORM, SEM_FN_NAME (fr30bf,orm) }, - { FR30BF_INSN_ORH, SEM_FN_NAME (fr30bf,orh) }, - { FR30BF_INSN_ORB, SEM_FN_NAME (fr30bf,orb) }, - { FR30BF_INSN_EORM, SEM_FN_NAME (fr30bf,eorm) }, - { FR30BF_INSN_EORH, SEM_FN_NAME (fr30bf,eorh) }, - { FR30BF_INSN_EORB, SEM_FN_NAME (fr30bf,eorb) }, - { FR30BF_INSN_BANDL, SEM_FN_NAME (fr30bf,bandl) }, - { FR30BF_INSN_BORL, SEM_FN_NAME (fr30bf,borl) }, - { FR30BF_INSN_BEORL, SEM_FN_NAME (fr30bf,beorl) }, - { FR30BF_INSN_BANDH, SEM_FN_NAME (fr30bf,bandh) }, - { FR30BF_INSN_BORH, SEM_FN_NAME (fr30bf,borh) }, - { FR30BF_INSN_BEORH, SEM_FN_NAME (fr30bf,beorh) }, - { FR30BF_INSN_BTSTL, SEM_FN_NAME (fr30bf,btstl) }, - { FR30BF_INSN_BTSTH, SEM_FN_NAME (fr30bf,btsth) }, - { FR30BF_INSN_MUL, SEM_FN_NAME (fr30bf,mul) }, - { FR30BF_INSN_MULU, SEM_FN_NAME (fr30bf,mulu) }, - { FR30BF_INSN_MULH, SEM_FN_NAME (fr30bf,mulh) }, - { FR30BF_INSN_MULUH, SEM_FN_NAME (fr30bf,muluh) }, - { FR30BF_INSN_DIV0S, SEM_FN_NAME (fr30bf,div0s) }, - { FR30BF_INSN_DIV0U, SEM_FN_NAME (fr30bf,div0u) }, - { FR30BF_INSN_DIV1, SEM_FN_NAME (fr30bf,div1) }, - { FR30BF_INSN_DIV2, SEM_FN_NAME (fr30bf,div2) }, - { FR30BF_INSN_DIV3, SEM_FN_NAME (fr30bf,div3) }, - { FR30BF_INSN_DIV4S, SEM_FN_NAME (fr30bf,div4s) }, - { FR30BF_INSN_LSL, SEM_FN_NAME (fr30bf,lsl) }, - { FR30BF_INSN_LSLI, SEM_FN_NAME (fr30bf,lsli) }, - { FR30BF_INSN_LSL2, SEM_FN_NAME (fr30bf,lsl2) }, - { FR30BF_INSN_LSR, SEM_FN_NAME (fr30bf,lsr) }, - { FR30BF_INSN_LSRI, SEM_FN_NAME (fr30bf,lsri) }, - { FR30BF_INSN_LSR2, SEM_FN_NAME (fr30bf,lsr2) }, - { FR30BF_INSN_ASR, SEM_FN_NAME (fr30bf,asr) }, - { FR30BF_INSN_ASRI, SEM_FN_NAME (fr30bf,asri) }, - { FR30BF_INSN_ASR2, SEM_FN_NAME (fr30bf,asr2) }, - { FR30BF_INSN_LDI8, SEM_FN_NAME (fr30bf,ldi8) }, - { FR30BF_INSN_LDI20, SEM_FN_NAME (fr30bf,ldi20) }, - { FR30BF_INSN_LDI32, SEM_FN_NAME (fr30bf,ldi32) }, - { FR30BF_INSN_LD, SEM_FN_NAME (fr30bf,ld) }, - { FR30BF_INSN_LDUH, SEM_FN_NAME (fr30bf,lduh) }, - { FR30BF_INSN_LDUB, SEM_FN_NAME (fr30bf,ldub) }, - { FR30BF_INSN_LDR13, SEM_FN_NAME (fr30bf,ldr13) }, - { FR30BF_INSN_LDR13UH, SEM_FN_NAME (fr30bf,ldr13uh) }, - { FR30BF_INSN_LDR13UB, SEM_FN_NAME (fr30bf,ldr13ub) }, - { FR30BF_INSN_LDR14, SEM_FN_NAME (fr30bf,ldr14) }, - { FR30BF_INSN_LDR14UH, SEM_FN_NAME (fr30bf,ldr14uh) }, - { FR30BF_INSN_LDR14UB, SEM_FN_NAME (fr30bf,ldr14ub) }, - { FR30BF_INSN_LDR15, SEM_FN_NAME (fr30bf,ldr15) }, - { FR30BF_INSN_LDR15GR, SEM_FN_NAME (fr30bf,ldr15gr) }, - { FR30BF_INSN_LDR15DR, SEM_FN_NAME (fr30bf,ldr15dr) }, - { FR30BF_INSN_LDR15PS, SEM_FN_NAME (fr30bf,ldr15ps) }, - { FR30BF_INSN_ST, SEM_FN_NAME (fr30bf,st) }, - { FR30BF_INSN_STH, SEM_FN_NAME (fr30bf,sth) }, - { FR30BF_INSN_STB, SEM_FN_NAME (fr30bf,stb) }, - { FR30BF_INSN_STR13, SEM_FN_NAME (fr30bf,str13) }, - { FR30BF_INSN_STR13H, SEM_FN_NAME (fr30bf,str13h) }, - { FR30BF_INSN_STR13B, SEM_FN_NAME (fr30bf,str13b) }, - { FR30BF_INSN_STR14, SEM_FN_NAME (fr30bf,str14) }, - { FR30BF_INSN_STR14H, SEM_FN_NAME (fr30bf,str14h) }, - { FR30BF_INSN_STR14B, SEM_FN_NAME (fr30bf,str14b) }, - { FR30BF_INSN_STR15, SEM_FN_NAME (fr30bf,str15) }, - { FR30BF_INSN_STR15GR, SEM_FN_NAME (fr30bf,str15gr) }, - { FR30BF_INSN_STR15DR, SEM_FN_NAME (fr30bf,str15dr) }, - { FR30BF_INSN_STR15PS, SEM_FN_NAME (fr30bf,str15ps) }, - { FR30BF_INSN_MOV, SEM_FN_NAME (fr30bf,mov) }, - { FR30BF_INSN_MOVDR, SEM_FN_NAME (fr30bf,movdr) }, - { FR30BF_INSN_MOVPS, SEM_FN_NAME (fr30bf,movps) }, - { FR30BF_INSN_MOV2DR, SEM_FN_NAME (fr30bf,mov2dr) }, - { FR30BF_INSN_MOV2PS, SEM_FN_NAME (fr30bf,mov2ps) }, - { FR30BF_INSN_JMP, SEM_FN_NAME (fr30bf,jmp) }, - { FR30BF_INSN_JMPD, SEM_FN_NAME (fr30bf,jmpd) }, - { FR30BF_INSN_CALLR, SEM_FN_NAME (fr30bf,callr) }, - { FR30BF_INSN_CALLRD, SEM_FN_NAME (fr30bf,callrd) }, - { FR30BF_INSN_CALL, SEM_FN_NAME (fr30bf,call) }, - { FR30BF_INSN_CALLD, SEM_FN_NAME (fr30bf,calld) }, - { FR30BF_INSN_RET, SEM_FN_NAME (fr30bf,ret) }, - { FR30BF_INSN_RET_D, SEM_FN_NAME (fr30bf,ret_d) }, - { FR30BF_INSN_INT, SEM_FN_NAME (fr30bf,int) }, - { FR30BF_INSN_INTE, SEM_FN_NAME (fr30bf,inte) }, - { FR30BF_INSN_RETI, SEM_FN_NAME (fr30bf,reti) }, - { FR30BF_INSN_BRAD, SEM_FN_NAME (fr30bf,brad) }, - { FR30BF_INSN_BRA, SEM_FN_NAME (fr30bf,bra) }, - { FR30BF_INSN_BNOD, SEM_FN_NAME (fr30bf,bnod) }, - { FR30BF_INSN_BNO, SEM_FN_NAME (fr30bf,bno) }, - { FR30BF_INSN_BEQD, SEM_FN_NAME (fr30bf,beqd) }, - { FR30BF_INSN_BEQ, SEM_FN_NAME (fr30bf,beq) }, - { FR30BF_INSN_BNED, SEM_FN_NAME (fr30bf,bned) }, - { FR30BF_INSN_BNE, SEM_FN_NAME (fr30bf,bne) }, - { FR30BF_INSN_BCD, SEM_FN_NAME (fr30bf,bcd) }, - { FR30BF_INSN_BC, SEM_FN_NAME (fr30bf,bc) }, - { FR30BF_INSN_BNCD, SEM_FN_NAME (fr30bf,bncd) }, - { FR30BF_INSN_BNC, SEM_FN_NAME (fr30bf,bnc) }, - { FR30BF_INSN_BND, SEM_FN_NAME (fr30bf,bnd) }, - { FR30BF_INSN_BN, SEM_FN_NAME (fr30bf,bn) }, - { FR30BF_INSN_BPD, SEM_FN_NAME (fr30bf,bpd) }, - { FR30BF_INSN_BP, SEM_FN_NAME (fr30bf,bp) }, - { FR30BF_INSN_BVD, SEM_FN_NAME (fr30bf,bvd) }, - { FR30BF_INSN_BV, SEM_FN_NAME (fr30bf,bv) }, - { FR30BF_INSN_BNVD, SEM_FN_NAME (fr30bf,bnvd) }, - { FR30BF_INSN_BNV, SEM_FN_NAME (fr30bf,bnv) }, - { FR30BF_INSN_BLTD, SEM_FN_NAME (fr30bf,bltd) }, - { FR30BF_INSN_BLT, SEM_FN_NAME (fr30bf,blt) }, - { FR30BF_INSN_BGED, SEM_FN_NAME (fr30bf,bged) }, - { FR30BF_INSN_BGE, SEM_FN_NAME (fr30bf,bge) }, - { FR30BF_INSN_BLED, SEM_FN_NAME (fr30bf,bled) }, - { FR30BF_INSN_BLE, SEM_FN_NAME (fr30bf,ble) }, - { FR30BF_INSN_BGTD, SEM_FN_NAME (fr30bf,bgtd) }, - { FR30BF_INSN_BGT, SEM_FN_NAME (fr30bf,bgt) }, - { FR30BF_INSN_BLSD, SEM_FN_NAME (fr30bf,blsd) }, - { FR30BF_INSN_BLS, SEM_FN_NAME (fr30bf,bls) }, - { FR30BF_INSN_BHID, SEM_FN_NAME (fr30bf,bhid) }, - { FR30BF_INSN_BHI, SEM_FN_NAME (fr30bf,bhi) }, - { FR30BF_INSN_DMOVR13, SEM_FN_NAME (fr30bf,dmovr13) }, - { FR30BF_INSN_DMOVR13H, SEM_FN_NAME (fr30bf,dmovr13h) }, - { FR30BF_INSN_DMOVR13B, SEM_FN_NAME (fr30bf,dmovr13b) }, - { FR30BF_INSN_DMOVR13PI, SEM_FN_NAME (fr30bf,dmovr13pi) }, - { FR30BF_INSN_DMOVR13PIH, SEM_FN_NAME (fr30bf,dmovr13pih) }, - { FR30BF_INSN_DMOVR13PIB, SEM_FN_NAME (fr30bf,dmovr13pib) }, - { FR30BF_INSN_DMOVR15PI, SEM_FN_NAME (fr30bf,dmovr15pi) }, - { FR30BF_INSN_DMOV2R13, SEM_FN_NAME (fr30bf,dmov2r13) }, - { FR30BF_INSN_DMOV2R13H, SEM_FN_NAME (fr30bf,dmov2r13h) }, - { FR30BF_INSN_DMOV2R13B, SEM_FN_NAME (fr30bf,dmov2r13b) }, - { FR30BF_INSN_DMOV2R13PI, SEM_FN_NAME (fr30bf,dmov2r13pi) }, - { FR30BF_INSN_DMOV2R13PIH, SEM_FN_NAME (fr30bf,dmov2r13pih) }, - { FR30BF_INSN_DMOV2R13PIB, SEM_FN_NAME (fr30bf,dmov2r13pib) }, - { FR30BF_INSN_DMOV2R15PD, SEM_FN_NAME (fr30bf,dmov2r15pd) }, - { FR30BF_INSN_LDRES, SEM_FN_NAME (fr30bf,ldres) }, - { FR30BF_INSN_STRES, SEM_FN_NAME (fr30bf,stres) }, - { FR30BF_INSN_COPOP, SEM_FN_NAME (fr30bf,copop) }, - { FR30BF_INSN_COPLD, SEM_FN_NAME (fr30bf,copld) }, - { FR30BF_INSN_COPST, SEM_FN_NAME (fr30bf,copst) }, - { FR30BF_INSN_COPSV, SEM_FN_NAME (fr30bf,copsv) }, - { FR30BF_INSN_NOP, SEM_FN_NAME (fr30bf,nop) }, - { FR30BF_INSN_ANDCCR, SEM_FN_NAME (fr30bf,andccr) }, - { FR30BF_INSN_ORCCR, SEM_FN_NAME (fr30bf,orccr) }, - { FR30BF_INSN_STILM, SEM_FN_NAME (fr30bf,stilm) }, - { FR30BF_INSN_ADDSP, SEM_FN_NAME (fr30bf,addsp) }, - { FR30BF_INSN_EXTSB, SEM_FN_NAME (fr30bf,extsb) }, - { FR30BF_INSN_EXTUB, SEM_FN_NAME (fr30bf,extub) }, - { FR30BF_INSN_EXTSH, SEM_FN_NAME (fr30bf,extsh) }, - { FR30BF_INSN_EXTUH, SEM_FN_NAME (fr30bf,extuh) }, - { FR30BF_INSN_LDM0, SEM_FN_NAME (fr30bf,ldm0) }, - { FR30BF_INSN_LDM1, SEM_FN_NAME (fr30bf,ldm1) }, - { FR30BF_INSN_STM0, SEM_FN_NAME (fr30bf,stm0) }, - { FR30BF_INSN_STM1, SEM_FN_NAME (fr30bf,stm1) }, - { FR30BF_INSN_ENTER, SEM_FN_NAME (fr30bf,enter) }, - { FR30BF_INSN_LEAVE, SEM_FN_NAME (fr30bf,leave) }, - { FR30BF_INSN_XCHB, SEM_FN_NAME (fr30bf,xchb) }, - { 0, 0 } -}; - -/* Add the semantic fns to IDESC_TABLE. */ - -void -SEM_FN_NAME (fr30bf,init_idesc_table) (SIM_CPU *current_cpu) -{ - IDESC *idesc_table = CPU_IDESC (current_cpu); - const struct sem_fn_desc *sf; - int mach_num = MACH_NUM (CPU_MACH (current_cpu)); - - for (sf = &sem_fns[0]; sf->fn != 0; ++sf) - { - const CGEN_INSN *insn = idesc_table[sf->index].idata; - int valid_p = (CGEN_INSN_VIRTUAL_P (insn) - || CGEN_INSN_MACH_HAS_P (insn, mach_num)); -#if FAST_P - if (valid_p) - idesc_table[sf->index].sem_fast = sf->fn; - else - idesc_table[sf->index].sem_fast = SEM_FN_NAME (fr30bf,x_invalid); -#else - if (valid_p) - idesc_table[sf->index].sem_full = sf->fn; - else - idesc_table[sf->index].sem_full = SEM_FN_NAME (fr30bf,x_invalid); -#endif - } -} - diff --git a/sim/fr30/sim-if.c b/sim/fr30/sim-if.c deleted file mode 100644 index 28b344d9c5e..00000000000 --- a/sim/fr30/sim-if.c +++ /dev/null @@ -1,208 +0,0 @@ -/* Main simulator entry points specific to the FR30. - Copyright (C) 1998, 1999 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include "sim-main.h" -#ifdef HAVE_STDLIB_H -#include <stdlib.h> -#endif -#include "sim-options.h" -#include "libiberty.h" -#include "bfd.h" - -static void free_state (SIM_DESC); -static void print_fr30_misc_cpu (SIM_CPU *cpu, int verbose); - -/* Records simulator descriptor so utilities like fr30_dump_regs can be - called from gdb. */ -SIM_DESC current_state; - -/* Cover function of sim_state_free to free the cpu buffers as well. */ - -static void -free_state (SIM_DESC sd) -{ - if (STATE_MODULES (sd) != NULL) - sim_module_uninstall (sd); - sim_cpu_free_all (sd); - sim_state_free (sd); -} - -/* Create an instance of the simulator. */ - -SIM_DESC -sim_open (kind, callback, abfd, argv) - SIM_OPEN_KIND kind; - host_callback *callback; - struct _bfd *abfd; - char **argv; -{ - char c; - int i; - SIM_DESC sd = sim_state_alloc (kind, callback); - - /* The cpu data is kept in a separately allocated chunk of memory. */ - if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - -#if 0 /* FIXME: pc is in mach-specific struct */ - /* FIXME: watchpoints code shouldn't need this */ - { - SIM_CPU *current_cpu = STATE_CPU (sd, 0); - STATE_WATCHPOINTS (sd)->pc = &(PC); - STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC); - } -#endif - - if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - -#if 0 /* FIXME: 'twould be nice if we could do this */ - /* These options override any module options. - Obviously ambiguity should be avoided, however the caller may wish to - augment the meaning of an option. */ - if (extra_options != NULL) - sim_add_option_table (sd, extra_options); -#endif - - /* getopt will print the error message so we just have to exit if this fails. - FIXME: Hmmm... in the case of gdb we need getopt to call - print_filtered. */ - if (sim_parse_args (sd, argv) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - -#if 0 - /* Allocate a handler for the control registers and other devices - if no memory for that range has been allocated by the user. - All are allocated in one chunk to keep things from being - unnecessarily complicated. */ - if (sim_core_read_buffer (sd, NULL, read_map, &c, FR30_DEVICE_ADDR, 1) == 0) - sim_core_attach (sd, NULL, - 0 /*level*/, - access_read_write, - 0 /*space ???*/, - FR30_DEVICE_ADDR, FR30_DEVICE_LEN /*nr_bytes*/, - 0 /*modulo*/, - &fr30_devices, - NULL /*buffer*/); -#endif - - /* Allocate core managed memory if none specified by user. - Use address 4 here in case the user wanted address 0 unmapped. */ - if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0) - sim_do_commandf (sd, "memory region 0,0x%lx", FR30_DEFAULT_MEM_SIZE); - - /* check for/establish the reference program image */ - if (sim_analyze_program (sd, - (STATE_PROG_ARGV (sd) != NULL - ? *STATE_PROG_ARGV (sd) - : NULL), - abfd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - /* Establish any remaining configuration options. */ - if (sim_config (sd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - if (sim_post_argv_init (sd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - /* Open a copy of the cpu descriptor table. */ - { - CGEN_CPU_DESC cd = fr30_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name, - CGEN_ENDIAN_BIG); - for (i = 0; i < MAX_NR_PROCESSORS; ++i) - { - SIM_CPU *cpu = STATE_CPU (sd, i); - CPU_CPU_DESC (cpu) = cd; - CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn; - } - fr30_cgen_init_dis (cd); - } - - /* Initialize various cgen things not done by common framework. - Must be done after fr30_cgen_cpu_open. */ - cgen_init (sd); - - /* Store in a global so things like sparc32_dump_regs can be invoked - from the gdb command line. */ - current_state = sd; - - return sd; -} - -void -sim_close (sd, quitting) - SIM_DESC sd; - int quitting; -{ - fr30_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0))); - sim_module_uninstall (sd); -} - -SIM_RC -sim_create_inferior (sd, abfd, argv, envp) - SIM_DESC sd; - struct _bfd *abfd; - char **argv; - char **envp; -{ - SIM_CPU *current_cpu = STATE_CPU (sd, 0); - SIM_ADDR addr; - - if (abfd != NULL) - addr = bfd_get_start_address (abfd); - else - addr = 0; - sim_pc_set (current_cpu, addr); - -#if 0 - STATE_ARGV (sd) = sim_copy_argv (argv); - STATE_ENVP (sd) = sim_copy_argv (envp); -#endif - - return SIM_RC_OK; -} - -void -sim_do_command (sd, cmd) - SIM_DESC sd; - char *cmd; -{ - if (sim_args_command (sd, cmd) != SIM_RC_OK) - sim_io_eprintf (sd, "Unknown command `%s'\n", cmd); -} diff --git a/sim/fr30/sim-main.h b/sim/fr30/sim-main.h deleted file mode 100644 index 8cbf085a697..00000000000 --- a/sim/fr30/sim-main.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Main header for the fr30. */ - -#define USING_SIM_BASE_H /* FIXME: quick hack */ - -struct _sim_cpu; /* FIXME: should be in sim-basics.h */ -typedef struct _sim_cpu SIM_CPU; - -/* sim-basics.h includes config.h but cgen-types.h must be included before - sim-basics.h and cgen-types.h needs config.h. */ -#include "config.h" - -#include "symcat.h" -#include "sim-basics.h" -#include "cgen-types.h" -#include "fr30-desc.h" -#include "fr30-opc.h" -#include "arch.h" - -/* These must be defined before sim-base.h. */ -typedef USI sim_cia; - -#define CIA_GET(cpu) CPU_PC_GET (cpu) -#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) - -#include "sim-base.h" -#include "cgen-sim.h" -#include "fr30-sim.h" - -/* The _sim_cpu struct. */ - -struct _sim_cpu { - /* sim/common cpu base. */ - sim_cpu_base base; - - /* Static parts of cgen. */ - CGEN_CPU cgen_cpu; - - /* CPU specific parts go here. - Note that in files that don't need to access these pieces WANT_CPU_FOO - won't be defined and thus these parts won't appear. This is ok in the - sense that things work. It is a source of bugs though. - One has to of course be careful to not take the size of this - struct and no structure members accessed in non-cpu specific files can - go after here. Oh for a better language. */ -#if defined (WANT_CPU_FR30BF) - FR30BF_CPU_DATA cpu_data; -#endif -}; - -/* The sim_state struct. */ - -struct sim_state { - sim_cpu *cpu; -#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu) - - CGEN_STATE cgen_state; - - sim_state_base base; -}; - -/* Misc. */ - -/* Catch address exceptions. */ -extern SIM_CORE_SIGNAL_FN fr30_core_signal; -#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ -fr30_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ - (TRANSFER), (ERROR)) - -/* Default memory size. */ -#define FR30_DEFAULT_MEM_SIZE 0x800000 /* 8M */ diff --git a/sim/fr30/tconfig.in b/sim/fr30/tconfig.in deleted file mode 100644 index a67e2275de6..00000000000 --- a/sim/fr30/tconfig.in +++ /dev/null @@ -1,42 +0,0 @@ -/* FR30 target configuration file. -*- C -*- */ - -/* Define this if the simulator can vary the size of memory. - See the xxx simulator for an example. - This enables the `-m size' option. - The memory size is stored in STATE_MEM_SIZE. */ -/* Not used for FR30 since we use the memory module. TODO -- check this */ -/* #define SIM_HAVE_MEM_SIZE */ - -/* See sim-hload.c. We properly handle LMA. -- TODO: check this */ -#define SIM_HANDLES_LMA 1 - -/* For MSPR support. FIXME: revisit. */ -#define WITH_DEVICES 1 - -/* FIXME: Revisit. */ -#ifdef HAVE_DV_SOCKSER -MODULE_INSTALL_FN dv_sockser_install; -#define MODULE_LIST dv_sockser_install, -#endif - -#if 0 -/* Enable watchpoints. */ -#define WITH_WATCHPOINTS 1 -#endif - -/* ??? Temporary hack until model support unified. */ -#define SIM_HAVE_MODEL - -/* Define this to enable the intrinsic breakpoint mechanism. */ -/* FIXME: may be able to remove SIM_HAVE_BREAKPOINTS since it essentially - duplicates ifdef SIM_BREAKPOINT (right?) */ -#if 0 -#define SIM_HAVE_BREAKPOINTS -#define SIM_BREAKPOINT { 0x10, 0xf1 } -#define SIM_BREAKPOINT_SIZE 2 -#endif - -/* This is a global setting. Different cpu families can't mix-n-match -scache - and -pbb. However some cpu families may use -simple while others use - one of -scache/-pbb. ???? */ -#define WITH_SCACHE_PBB 1 diff --git a/sim/fr30/traps.c b/sim/fr30/traps.c deleted file mode 100644 index 25cd7b99459..00000000000 --- a/sim/fr30/traps.c +++ /dev/null @@ -1,218 +0,0 @@ -/* fr30 exception, interrupt, and trap (EIT) support - Copyright (C) 1998, 1999 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include "sim-main.h" -#include "targ-vals.h" -#include "cgen-engine.h" - -/* The semantic code invokes this for invalid (unrecognized) instructions. */ - -SEM_PC -sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc) -{ - SIM_DESC sd = CPU_STATE (current_cpu); - -#if 0 - if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) - { - h_bsm_set (current_cpu, h_sm_get (current_cpu)); - h_bie_set (current_cpu, h_ie_get (current_cpu)); - h_bcond_set (current_cpu, h_cond_get (current_cpu)); - /* sm not changed */ - h_ie_set (current_cpu, 0); - h_cond_set (current_cpu, 0); - - h_bpc_set (current_cpu, cia); - - sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, - EIT_RSVD_INSN_ADDR); - } - else -#endif - sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL); - return vpc; -} - -/* Process an address exception. */ - -void -fr30_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia, - unsigned int map, int nr_bytes, address_word addr, - transfer_type transfer, sim_core_signals sig) -{ -#if 0 - if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) - { - h_bsm_set (current_cpu, h_sm_get (current_cpu)); - h_bie_set (current_cpu, h_ie_get (current_cpu)); - h_bcond_set (current_cpu, h_cond_get (current_cpu)); - /* sm not changed */ - h_ie_set (current_cpu, 0); - h_cond_set (current_cpu, 0); - - h_bpc_set (current_cpu, cia); - - sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, - EIT_ADDR_EXCP_ADDR); - } - else -#endif - sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr, - transfer, sig); -} - -/* Read/write functions for system call interface. */ - -static int -syscall_read_mem (host_callback *cb, struct cb_syscall *sc, - unsigned long taddr, char *buf, int bytes) -{ - SIM_DESC sd = (SIM_DESC) sc->p1; - SIM_CPU *cpu = (SIM_CPU *) sc->p2; - - return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes); -} - -static int -syscall_write_mem (host_callback *cb, struct cb_syscall *sc, - unsigned long taddr, const char *buf, int bytes) -{ - SIM_DESC sd = (SIM_DESC) sc->p1; - SIM_CPU *cpu = (SIM_CPU *) sc->p2; - - return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); -} - -/* Subroutine of fr30_int to save the PS and PC and setup for INT and INTE. */ - -static void -setup_int (SIM_CPU *current_cpu, PCADDR pc) -{ - USI ssp = fr30bf_h_dr_get (current_cpu, H_DR_SSP); - USI ps = fr30bf_h_ps_get (current_cpu); - - ssp -= 4; - SETMEMSI (current_cpu, pc, ssp, ps); - ssp -= 4; - SETMEMSI (current_cpu, pc, ssp, pc + 2); - fr30bf_h_dr_set (current_cpu, H_DR_SSP, ssp); - fr30bf_h_sbit_set (current_cpu, 0); -} - -/* Trap support. - The result is the pc address to continue at. - Preprocessing like saving the various registers has already been done. */ - -USI -fr30_int (SIM_CPU *current_cpu, PCADDR pc, int num) -{ - SIM_DESC sd = CPU_STATE (current_cpu); - host_callback *cb = STATE_CALLBACK (sd); - -#ifdef SIM_HAVE_BREAKPOINTS - /* Check for breakpoints "owned" by the simulator first, regardless - of --environment. */ - if (num == TRAP_BREAKPOINT) - { - /* First try sim-break.c. If it's a breakpoint the simulator "owns" - it doesn't return. Otherwise it returns and let's us try. */ - sim_handle_breakpoint (sd, current_cpu, pc); - /* Fall through. */ - } -#endif - - if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) - { - /* The new pc is the trap vector entry. - We assume there's a branch there to some handler. */ - USI new_pc; - setup_int (current_cpu, pc); - fr30bf_h_ibit_set (current_cpu, 0); - new_pc = GETMEMSI (current_cpu, pc, - fr30bf_h_dr_get (current_cpu, H_DR_TBR) - + 1024 - ((num + 1) * 4)); - return new_pc; - } - - switch (num) - { - case TRAP_SYSCALL : - { - /* TODO: find out what the ABI for this is */ - CB_SYSCALL s; - - CB_SYSCALL_INIT (&s); - s.func = fr30bf_h_gr_get (current_cpu, 0); - s.arg1 = fr30bf_h_gr_get (current_cpu, 4); - s.arg2 = fr30bf_h_gr_get (current_cpu, 5); - s.arg3 = fr30bf_h_gr_get (current_cpu, 6); - - if (s.func == TARGET_SYS_exit) - { - sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1); - } - - s.p1 = (PTR) sd; - s.p2 = (PTR) current_cpu; - s.read_mem = syscall_read_mem; - s.write_mem = syscall_write_mem; - cb_syscall (cb, &s); - fr30bf_h_gr_set (current_cpu, 2, s.errcode); /* TODO: check this one */ - fr30bf_h_gr_set (current_cpu, 4, s.result); - fr30bf_h_gr_set (current_cpu, 1, s.result2); /* TODO: check this one */ - break; - } - - case TRAP_BREAKPOINT: - sim_engine_halt (sd, current_cpu, NULL, pc, - sim_stopped, SIM_SIGTRAP); - break; - - default : - { - USI new_pc; - setup_int (current_cpu, pc); - fr30bf_h_ibit_set (current_cpu, 0); - new_pc = GETMEMSI (current_cpu, pc, - fr30bf_h_dr_get (current_cpu, H_DR_TBR) - + 1024 - ((num + 1) * 4)); - return new_pc; - } - } - - /* Fake an "reti" insn. - Since we didn't push anything to stack, all we need to do is - update pc. */ - return pc + 2; -} - -USI -fr30_inte (SIM_CPU *current_cpu, PCADDR pc, int num) -{ - /* The new pc is the trap #9 vector entry. - We assume there's a branch there to some handler. */ - USI new_pc; - setup_int (current_cpu, pc); - fr30bf_h_ilm_set (current_cpu, 4); - new_pc = GETMEMSI (current_cpu, pc, - fr30bf_h_dr_get (current_cpu, H_DR_TBR) - + 1024 - ((9 + 1) * 4)); - return new_pc; -} |