diff options
Diffstat (limited to 'sim/mips/interp.c')
| -rw-r--r-- | sim/mips/interp.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/sim/mips/interp.c b/sim/mips/interp.c index 68ffd27c5a7..9c53ff9081a 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -3124,9 +3124,14 @@ decode_coproc (SIM_DESC sd, CACHE Cache operation (VR4100 = 101111bbbbbpppppiiiiiiiiiiiiiiii) ERET Exception return (VR4100 = 01000010000000000000000000011000) */ - if (((code == 0x00) || (code == 0x04)) && tail == 0) + if (((code == 0x00) || (code == 0x04) /* MFC0 / MTC0 */ + || (code == 0x01) || (code == 0x05)) /* DMFC0 / DMTC0 */ + && tail == 0) { - /* M[TF]C0 - 32 bit word */ + /* Clear double/single coprocessor move bit. */ + code &= ~1; + + /* M[TF]C0 (32 bits) | DM[TF]C0 (64 bits) */ switch (rd) /* NOTEs: Standard CP0 registers */ { |