diff options
Diffstat (limited to 'sim/mips')
| -rw-r--r-- | sim/mips/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/mips/cp1.c | 49 |
2 files changed, 30 insertions, 24 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index f2378637cb6..d3408fc905c 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,4 +1,9 @@ 2002-06-03 Chris Demetriou <cgd@broadcom.com> + + * cp1.c: Clean up comments which describe FP formats. + (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64. + +2002-06-03 Chris Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * configure.in (mipsisa64sb1*-*-*): New target for supporting diff --git a/sim/mips/cp1.c b/sim/mips/cp1.c index 063c241c277..3b1cac2faaf 100644 --- a/sim/mips/cp1.c +++ b/sim/mips/cp1.c @@ -26,35 +26,36 @@ /*-- FPU support routines ---------------------------------------------------*/ /* Numbers are held in normalized form. The SINGLE and DOUBLE binary - formats conform to ANSI/IEEE Std 754-1985. */ -/* SINGLE precision floating: - * seeeeeeeefffffffffffffffffffffff - * s = 1bit = sign - * e = 8bits = exponent - * f = 23bits = fraction - */ -/* SINGLE precision fixed: - * siiiiiiiiiiiiiiiiiiiiiiiiiiiiiii - * s = 1bit = sign - * i = 31bits = integer - */ -/* DOUBLE precision floating: - * seeeeeeeeeeeffffffffffffffffffffffffffffffffffffffffffffffffffff - * s = 1bit = sign - * e = 11bits = exponent - * f = 52bits = fraction - */ -/* DOUBLE precision fixed: - * siiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiii - * s = 1bit = sign - * i = 63bits = integer + formats conform to ANSI/IEEE Std 754-1985. + + SINGLE precision floating: + seeeeeeeefffffffffffffffffffffff + s = 1bit = sign + e = 8bits = exponent + f = 23bits = fraction + + SINGLE precision fixed: + siiiiiiiiiiiiiiiiiiiiiiiiiiiiiii + s = 1bit = sign + i = 31bits = integer + + DOUBLE precision floating: + seeeeeeeeeeeffffffffffffffffffffffffffffffffffffffffffffffffffff + s = 1bit = sign + e = 11bits = exponent + f = 52bits = fraction + + DOUBLE precision fixed: + siiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiii + s = 1bit = sign + i = 63bits = integer */ /* Explicit QNaN values used when value required: */ #define FPQNaN_SINGLE (0x7FBFFFFF) #define FPQNaN_WORD (0x7FFFFFFF) -#define FPQNaN_DOUBLE ((((uword64) 0x7FF7FFFF) << 32) | 0xFFFFFFFF) -#define FPQNaN_LONG ((((uword64) 0x7FFFFFFF) << 32) | 0xFFFFFFFF) +#define FPQNaN_DOUBLE (UNSIGNED64 (0x7FF7FFFFFFFFFFFF)) +#define FPQNaN_LONG (UNSIGNED64 (0x7FFFFFFFFFFFFFFF)) static const char *fpu_format_name (FP_formats fmt); #ifdef DEBUG |