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-rw-r--r--sim/testsuite/sim/arm/and.cgs43
1 files changed, 0 insertions, 43 deletions
diff --git a/sim/testsuite/sim/arm/and.cgs b/sim/testsuite/sim/arm/and.cgs
deleted file mode 100644
index cd8f0036fdd..00000000000
--- a/sim/testsuite/sim/arm/and.cgs
+++ /dev/null
@@ -1,43 +0,0 @@
-# arm testcase for and
-# mach: all
-
-# ??? Unfinished, more tests needed.
-
- .include "testutils.inc"
-
- start
-
-# and$cond${set-cc?} $rd,$rn,$imm12
-
- .global and_imm
-and_imm:
- mvi_h_gr r4,1
- mvi_h_cnvz 0,0,0,0
- and r5,r4,#1
- test_h_cnvz 0,0,0,0
- test_h_gr r5,1
-
-# and$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
-
- .global and_reg_imm_shift
-and_reg_imm_shift:
- mvi_h_gr r4,1
- mvi_h_gr r5,1
- mvi_h_cnvz 0,0,0,0
- and r6,r4,r5,lsl #1
- test_h_cnvz 0,0,0,0
- test_h_gr r6,0
-
-# and$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
-
- .global and_reg_reg_shift
-and_reg_reg_shift:
- mvi_h_gr r4,1
- mvi_h_gr r5,1
- mvi_h_gr r6,1
- mvi_h_cnvz 0,0,0,0
- and r7,r4,r5,lsl r6
- test_h_cnvz 0,0,0,0
- test_h_gr r7,0
-
- pass