summaryrefslogtreecommitdiff
path: root/sim/testsuite/sim/arm/iwmmxt/tmovmsk.cgs
diff options
context:
space:
mode:
Diffstat (limited to 'sim/testsuite/sim/arm/iwmmxt/tmovmsk.cgs')
-rw-r--r--sim/testsuite/sim/arm/iwmmxt/tmovmsk.cgs65
1 files changed, 0 insertions, 65 deletions
diff --git a/sim/testsuite/sim/arm/iwmmxt/tmovmsk.cgs b/sim/testsuite/sim/arm/iwmmxt/tmovmsk.cgs
deleted file mode 100644
index cfea5b7c6dc..00000000000
--- a/sim/testsuite/sim/arm/iwmmxt/tmovmsk.cgs
+++ /dev/null
@@ -1,65 +0,0 @@
-# Intel(r) Wireless MMX(tm) technology testcase for TMOVMSK
-# mach: xscale
-# as: -mcpu=xscale+iwmmxt
-
- .include "testutils.inc"
-
- start
-
- .global tmovmsk
-tmovmsk:
- # Enable access to CoProcessors 0 & 1 before
- # we attempt these instructions.
-
- mvi_h_gr r1, 3
- mcr p15, 0, r1, cr15, cr1, 0
-
- # Test Byte Wide Mask Transfer
-
- mvi_h_gr r0, 0x12345678
- mvi_h_gr r1, 0x9abcdef0
- mvi_h_gr r2, 0
-
- tmcrr wr0, r0, r1
-
- tmovmskb r2, wr0
-
- tmrrc r0, r1, wr0
-
- test_h_gr r0, 0x12345678
- test_h_gr r1, 0x9abcdef0
- test_h_gr r2, 0x000000f0
-
- # Test Half Word Wide Mask Transfer
-
- mvi_h_gr r0, 0x12345678
- mvi_h_gr r1, 0x9abcdef0
- mvi_h_gr r2, 0
-
- tmcrr wr0, r0, r1
-
- tmovmskh r2, wr0
-
- tmrrc r0, r1, wr0
-
- test_h_gr r0, 0x12345678
- test_h_gr r1, 0x9abcdef0
- test_h_gr r2, 0x0000000c
-
- # Test Word Wide Mask Transfer
-
- mvi_h_gr r0, 0x12345678
- mvi_h_gr r1, 0x9abcdef0
- mvi_h_gr r2, 0
-
- tmcrr wr0, r0, r1
-
- tmovmskw r2, wr0
-
- tmrrc r0, r1, wr0
-
- test_h_gr r0, 0x12345678
- test_h_gr r1, 0x9abcdef0
- test_h_gr r2, 0x00000002
-
- pass