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-rw-r--r--sim/testsuite/sim/arm/tst.cgs36
1 files changed, 0 insertions, 36 deletions
diff --git a/sim/testsuite/sim/arm/tst.cgs b/sim/testsuite/sim/arm/tst.cgs
deleted file mode 100644
index f07170753dc..00000000000
--- a/sim/testsuite/sim/arm/tst.cgs
+++ /dev/null
@@ -1,36 +0,0 @@
-# arm testcase for tst${cond}${set-cc?} $rn,$imm12
-# mach: unfinished
-
- .include "testutils.inc"
-
- start
-
- .global tst_imm
-tst_imm:
- tst00 pc,0
-
- pass
-# arm testcase for tst$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
-# mach: unfinished
-
- .include "testutils.inc"
-
- start
-
- .global tst_reg_imm_shift
-tst_reg_imm_shift:
- tst00 pc,pc,pc,lsl 0
-
- pass
-# arm testcase for tst$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
-# mach: unfinished
-
- .include "testutils.inc"
-
- start
-
- .global tst_reg_reg_shift
-tst_reg_reg_shift:
- tst00 pc,pc,pc,lsl pc
-
- pass