diff options
Diffstat (limited to 'sim/testsuite/sim/frv/cfcklt.cgs')
| -rw-r--r-- | sim/testsuite/sim/frv/cfcklt.cgs | 490 |
1 files changed, 0 insertions, 490 deletions
diff --git a/sim/testsuite/sim/frv/cfcklt.cgs b/sim/testsuite/sim/frv/cfcklt.cgs deleted file mode 100644 index ffabcd2628b..00000000000 --- a/sim/testsuite/sim/frv/cfcklt.cgs +++ /dev/null @@ -1,490 +0,0 @@ -# frv testcase for cfcklt $FCCi,$CCj_float,$CCi,$cond -# mach: all - - .include "testutils.inc" - - start - - .global cfcklt -cfcklt: - set_spr_immed 0x1b5b,cccr - set_fcc 0x0 0 - cfcklt fcc0,cc3,cc0,1 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x1 0 - cfcklt fcc0,cc3,cc0,1 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x2 0 - cfcklt fcc0,cc3,cc0,1 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x3 0 - cfcklt fcc0,cc3,cc0,1 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x4 0 - cfcklt fcc0,cc3,cc0,1 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x5 0 - cfcklt fcc0,cc3,cc0,1 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x6 0 - cfcklt fcc0,cc3,cc0,1 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x7 0 - cfcklt fcc0,cc3,cc0,1 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x8 0 - cfcklt fcc0,cc3,cc4,1 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x9 0 - cfcklt fcc0,cc3,cc4,1 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xa 0 - cfcklt fcc0,cc3,cc4,1 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xb 0 - cfcklt fcc0,cc3,cc4,1 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xc 0 - cfcklt fcc0,cc3,cc4,1 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xd 0 - cfcklt fcc0,cc3,cc4,1 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xe 0 - cfcklt fcc0,cc3,cc4,1 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xf 0 - cfcklt fcc0,cc3,cc4,1 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x0 0 - cfcklt fcc0,cc3,cc0,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x1 0 - cfcklt fcc0,cc3,cc0,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x2 0 - cfcklt fcc0,cc3,cc0,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x3 0 - cfcklt fcc0,cc3,cc0,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x4 0 - cfcklt fcc0,cc3,cc0,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x5 0 - cfcklt fcc0,cc3,cc0,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x6 0 - cfcklt fcc0,cc3,cc0,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x7 0 - cfcklt fcc0,cc3,cc0,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x8 0 - cfcklt fcc0,cc3,cc4,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x9 0 - cfcklt fcc0,cc3,cc4,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xa 0 - cfcklt fcc0,cc3,cc4,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xb 0 - cfcklt fcc0,cc3,cc4,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xc 0 - cfcklt fcc0,cc3,cc4,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xd 0 - cfcklt fcc0,cc3,cc4,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xe 0 - cfcklt fcc0,cc3,cc4,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xf 0 - cfcklt fcc0,cc3,cc4,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x0 0 - cfcklt fcc0,cc3,cc1,0 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x1 0 - cfcklt fcc0,cc3,cc1,0 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x2 0 - cfcklt fcc0,cc3,cc1,0 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x3 0 - cfcklt fcc0,cc3,cc1,0 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x4 0 - cfcklt fcc0,cc3,cc1,0 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x5 0 - cfcklt fcc0,cc3,cc1,0 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x6 0 - cfcklt fcc0,cc3,cc1,0 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x7 0 - cfcklt fcc0,cc3,cc1,0 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x8 0 - cfcklt fcc0,cc3,cc5,0 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x9 0 - cfcklt fcc0,cc3,cc5,0 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xa 0 - cfcklt fcc0,cc3,cc5,0 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xb 0 - cfcklt fcc0,cc3,cc5,0 - test_spr_immed 0x1b9b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xc 0 - cfcklt fcc0,cc3,cc5,0 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xd 0 - cfcklt fcc0,cc3,cc5,0 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xe 0 - cfcklt fcc0,cc3,cc5,0 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xf 0 - cfcklt fcc0,cc3,cc5,0 - test_spr_immed 0x1bdb,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x0 0 - cfcklt fcc0,cc3,cc1,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x1 0 - cfcklt fcc0,cc3,cc1,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x2 0 - cfcklt fcc0,cc3,cc1,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x3 0 - cfcklt fcc0,cc3,cc1,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x4 0 - cfcklt fcc0,cc3,cc1,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x5 0 - cfcklt fcc0,cc3,cc1,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x6 0 - cfcklt fcc0,cc3,cc1,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x7 0 - cfcklt fcc0,cc3,cc1,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x8 0 - cfcklt fcc0,cc3,cc5,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x9 0 - cfcklt fcc0,cc3,cc5,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xa 0 - cfcklt fcc0,cc3,cc5,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xb 0 - cfcklt fcc0,cc3,cc5,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xc 0 - cfcklt fcc0,cc3,cc5,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xd 0 - cfcklt fcc0,cc3,cc5,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xe 0 - cfcklt fcc0,cc3,cc5,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xf 0 - cfcklt fcc0,cc3,cc5,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x0 0 - cfcklt fcc0,cc3,cc2,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x1 0 - cfcklt fcc0,cc3,cc2,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x2 0 - cfcklt fcc0,cc3,cc2,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x3 0 - cfcklt fcc0,cc3,cc2,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x4 0 - cfcklt fcc0,cc3,cc2,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x5 0 - cfcklt fcc0,cc3,cc2,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x6 0 - cfcklt fcc0,cc3,cc2,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x7 0 - cfcklt fcc0,cc3,cc2,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x8 0 - cfcklt fcc0,cc3,cc6,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x9 0 - cfcklt fcc0,cc3,cc6,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xa 0 - cfcklt fcc0,cc3,cc6,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xb 0 - cfcklt fcc0,cc3,cc6,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xc 0 - cfcklt fcc0,cc3,cc6,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xd 0 - cfcklt fcc0,cc3,cc6,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xe 0 - cfcklt fcc0,cc3,cc6,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xf 0 - cfcklt fcc0,cc3,cc6,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x0 0 - cfcklt fcc0,cc3,cc3,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x1 0 - cfcklt fcc0,cc3,cc3,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x2 0 - cfcklt fcc0,cc3,cc3,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x3 0 - cfcklt fcc0,cc3,cc3,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x4 0 - cfcklt fcc0,cc3,cc3,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x5 0 - cfcklt fcc0,cc3,cc3,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x6 0 - cfcklt fcc0,cc3,cc3,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x7 0 - cfcklt fcc0,cc3,cc3,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x8 0 - cfcklt fcc0,cc3,cc7,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0x9 0 - cfcklt fcc0,cc3,cc7,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xa 0 - cfcklt fcc0,cc3,cc7,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xb 0 - cfcklt fcc0,cc3,cc7,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xc 0 - cfcklt fcc0,cc3,cc7,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xd 0 - cfcklt fcc0,cc3,cc7,1 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xe 0 - cfcklt fcc0,cc3,cc7,0 - test_spr_immed 0x1b1b,cccr - - set_spr_immed 0x1b5b,cccr - set_fcc 0xf 0 - cfcklt fcc0,cc3,cc7,1 - test_spr_immed 0x1b1b,cccr - - pass |