diff options
Diffstat (limited to 'sim/testsuite/sim/h8300/or.w.s')
| -rw-r--r-- | sim/testsuite/sim/h8300/or.w.s | 61 |
1 files changed, 0 insertions, 61 deletions
diff --git a/sim/testsuite/sim/h8300/or.w.s b/sim/testsuite/sim/h8300/or.w.s deleted file mode 100644 index 32eef4559e8..00000000000 --- a/sim/testsuite/sim/h8300/or.w.s +++ /dev/null @@ -1,61 +0,0 @@ -# Hitachi H8 testcase 'or.w' -# mach(): h8300h h8300s h8sx -# as(h8300): --defsym sim_cpu=0 -# as(h8300h): --defsym sim_cpu=1 -# as(h8300s): --defsym sim_cpu=2 -# as(h8sx): --defsym sim_cpu=3 -# ld(h8300h): -m h8300helf -# ld(h8300s): -m h8300self -# ld(h8sx): -m h8300sxelf - - .include "testutils.inc" - - start - -.if (sim_cpu) ; non-zero means h8300h, s, or sx -or_w_imm16: - set_grs_a5a5 ; Fill all general regs with a fixed pattern - ;; fixme set ccr - - ;; or.w #xx:16,Rd - or.w #0xaaaa, r0 ; Immediate 16-bit operand - - ;; fixme test ccr ; H=0 N=1 Z=0 V=0 C=0 - test_h_gr16 0xafaf r0 ; or result: a5a5 | aaaa -.if (sim_cpu) ; non-zero means h8300h, s, or sx - test_h_gr32 0xa5a5afaf er0 ; or result: a5a5 | aaaa -.endif - test_gr_a5a5 1 ; Make sure other general regs not disturbed - test_gr_a5a5 2 - test_gr_a5a5 3 - test_gr_a5a5 4 - test_gr_a5a5 5 - test_gr_a5a5 6 - test_gr_a5a5 7 -.endif - -or_w_reg: - set_grs_a5a5 ; Fill all general regs with a fixed pattern - ;; fixme set ccr - - ;; or.w Rs,Rd - mov.w #0xaaaa, r1 - or.w r1, r0 ; Register operand - - ;; fixme test ccr ; H=0 N=1 Z=0 V=0 C=0 - test_h_gr16 0xafaf r0 ; or result: a5a5 | aaaa - test_h_gr16 0xaaaa r1 ; Make sure r1 is unchanged -.if (sim_cpu) ; non-zero means h8300h, s, or sx - test_h_gr32 0xa5a5afaf er0 ; or result: a5a5 | aaaa - test_h_gr32 0xa5a5aaaa er1 ; Make sure er1 is unchanged -.endif - test_gr_a5a5 2 ; Make sure other general regs not disturbed - test_gr_a5a5 3 - test_gr_a5a5 4 - test_gr_a5a5 5 - test_gr_a5a5 6 - test_gr_a5a5 7 - - pass - - exit 0 |