diff options
Diffstat (limited to 'sim/testsuite/sim/m32r')
108 files changed, 0 insertions, 2344 deletions
diff --git a/sim/testsuite/sim/m32r/add.cgs b/sim/testsuite/sim/m32r/add.cgs deleted file mode 100644 index 8ed2b3a2ad3..00000000000 --- a/sim/testsuite/sim/m32r/add.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# m32r testcase for add $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global add -add: - - mvi_h_gr r4, 1 - mvi_h_gr r5, 2 - add r4, r5 - test_h_gr r4, 3 - - pass diff --git a/sim/testsuite/sim/m32r/add3.cgs b/sim/testsuite/sim/m32r/add3.cgs deleted file mode 100644 index d1cc8480ad4..00000000000 --- a/sim/testsuite/sim/m32r/add3.cgs +++ /dev/null @@ -1,15 +0,0 @@ -# m32r testcase for add3 $dr,$sr,#$slo16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global add3 -add3: - - mvi_h_gr r5, 1 - add3 r4, r5, 2 - test_h_gr r4, 3 - - pass diff --git a/sim/testsuite/sim/m32r/addi.cgs b/sim/testsuite/sim/m32r/addi.cgs deleted file mode 100644 index 1448d0d2e2b..00000000000 --- a/sim/testsuite/sim/m32r/addi.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# m32r testcase for addi $dr,#$simm8 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global addi -addi: - - mvi_h_gr r5, 1 - addi r5, 2 - test_h_gr r5, 3 - - pass - diff --git a/sim/testsuite/sim/m32r/addv.cgs b/sim/testsuite/sim/m32r/addv.cgs deleted file mode 100644 index 704be83c914..00000000000 --- a/sim/testsuite/sim/m32r/addv.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# m32r testcase for addv $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global addv -addv: - mvi_h_condbit 0 - mvi_h_gr r4, 0x80000000 - mvi_h_gr r5, 0x80000000 - - addv r4, r5 - - bnc not_ok - test_h_gr r4, 0 - - pass -not_ok: - fail diff --git a/sim/testsuite/sim/m32r/addv3.cgs b/sim/testsuite/sim/m32r/addv3.cgs deleted file mode 100644 index a8c0a108561..00000000000 --- a/sim/testsuite/sim/m32r/addv3.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# m32r testcase for addv3 $dr,$sr,#$simm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global addv3 -addv3: - mvi_h_condbit 0 - mvi_h_gr r4, 1 - mvi_h_gr r5, 1 - - addv3 r4, r5, #2 - - bc not_ok - - test_h_gr r4, 3 - - mvi_h_gr r5, 0x7fff8001 - - addv3 r4, r5, #0x7fff - - bnc not_ok - - pass -not_ok: - fail diff --git a/sim/testsuite/sim/m32r/addx.cgs b/sim/testsuite/sim/m32r/addx.cgs deleted file mode 100644 index 630e3dbe15a..00000000000 --- a/sim/testsuite/sim/m32r/addx.cgs +++ /dev/null @@ -1,42 +0,0 @@ -# m32r testcase for addx $dr,$sr -# mach(): m32r m32rx -# timeout(): 42 - -# timeout is set to test it - - .include "testutils.inc" - - start - - .global addx -addx: - mvi_h_condbit 1 - mvi_h_gr r4, 1 - mvi_h_gr r5, 2 - addx r4, r5 - bc not_ok - test_h_gr r4, 4 - - mvi_h_gr r4, 0xfffffffe - addx r4, r5 - bnc not_ok - test_h_gr r4, 0 - - mvi_h_gr r4, -1 - mvi_h_gr r5, -1 - mvi_h_condbit 1 - addx r4,r5 - bnc not_ok - test_h_gr r4, -1 - - mvi_h_gr r4,-1 - mvi_h_gr r5,0x7fffffff - mvi_h_condbit 1 - addx r5,r4 - bnc not_ok - test_h_gr r5,0x7fffffff - - pass - -not_ok: - fail diff --git a/sim/testsuite/sim/m32r/allinsn.exp b/sim/testsuite/sim/m32r/allinsn.exp deleted file mode 100644 index 8eed80f91d6..00000000000 --- a/sim/testsuite/sim/m32r/allinsn.exp +++ /dev/null @@ -1,21 +0,0 @@ -# M32R simulator testsuite. - -if [istarget m32r*-*-*] { - # load support procs - # load_lib cgen.exp - - # all machines - set all_machs "m32r" - - - # The .cgs suffix is for "cgen .s". - foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.cgs]] { - # If we're only testing specific files and this isn't one of them, - # skip it. - if ![runtest_file_p $runtests $src] { - continue - } - - run_sim_test $src $all_machs - } -} diff --git a/sim/testsuite/sim/m32r/and.cgs b/sim/testsuite/sim/m32r/and.cgs deleted file mode 100644 index 1c268855411..00000000000 --- a/sim/testsuite/sim/m32r/and.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for and $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global and -and: - mvi_h_gr r4, 3 - mvi_h_gr r5, 6 - - and r4, r5 - - test_h_gr r4, 2 - - pass diff --git a/sim/testsuite/sim/m32r/and3.cgs b/sim/testsuite/sim/m32r/and3.cgs deleted file mode 100644 index 395de3028e9..00000000000 --- a/sim/testsuite/sim/m32r/and3.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for and3 $dr,$sr,#$uimm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global and3 -and3: - mvi_h_gr r4, 0 - mvi_h_gr r5, 6 - - and3 r4, r5, #3 - - test_h_gr r4, 2 - - pass diff --git a/sim/testsuite/sim/m32r/bc24.cgs b/sim/testsuite/sim/m32r/bc24.cgs deleted file mode 100644 index 6bb43334e8f..00000000000 --- a/sim/testsuite/sim/m32r/bc24.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# m32r testcase for bc $disp24 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bc24 -bc24: - - mvi_h_condbit 0 - bc.l test0fail - bra test0pass -test0fail: - fail -test0pass: - - mvi_h_condbit 1 - bc.l test1pass - fail -test1pass: - - pass - diff --git a/sim/testsuite/sim/m32r/bc8.cgs b/sim/testsuite/sim/m32r/bc8.cgs deleted file mode 100644 index ceb622c1661..00000000000 --- a/sim/testsuite/sim/m32r/bc8.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# m32r testcase for bc $disp8 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bc8 -bc8: - - mvi_h_condbit 0 - bc.s test0fail - bra test0pass -test0fail: - fail -test0pass: - - mvi_h_condbit 1 - bc.s test1pass - fail -test1pass: - - pass diff --git a/sim/testsuite/sim/m32r/beq.cgs b/sim/testsuite/sim/m32r/beq.cgs deleted file mode 100644 index c4d6d8bf0aa..00000000000 --- a/sim/testsuite/sim/m32r/beq.cgs +++ /dev/null @@ -1,20 +0,0 @@ -# m32r testcase for beq $src1,$src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global beq -beq: - mvi_h_condbit 0 - mvi_h_gr r4, 12 - mvi_h_gr r5, 12 - beq r4, r5, ok -not_ok: - fail -ok: - mvi_h_gr r5, 11 - beq r4, r5, not_ok - - pass diff --git a/sim/testsuite/sim/m32r/beqz.cgs b/sim/testsuite/sim/m32r/beqz.cgs deleted file mode 100644 index 654737d3d46..00000000000 --- a/sim/testsuite/sim/m32r/beqz.cgs +++ /dev/null @@ -1,18 +0,0 @@ -# m32r testcase for beqz $src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global beqz -beqz: - mvi_h_gr r4, 0 - beqz r4, ok -not_ok: - fail -ok: - mvi_h_gr r4, 1 - beqz r4, not_ok - - pass diff --git a/sim/testsuite/sim/m32r/bgez.cgs b/sim/testsuite/sim/m32r/bgez.cgs deleted file mode 100644 index f7031f0edcb..00000000000 --- a/sim/testsuite/sim/m32r/bgez.cgs +++ /dev/null @@ -1,18 +0,0 @@ -# m32r testcase for bgez $src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bgez -bgez: - mvi_h_gr r4, 1 - bgez r4, ok -not_ok: - fail -ok: - mvi_h_gr r4, -1 - bgez r4, not_ok - - pass diff --git a/sim/testsuite/sim/m32r/bgtz.cgs b/sim/testsuite/sim/m32r/bgtz.cgs deleted file mode 100644 index 6ab8989c7e0..00000000000 --- a/sim/testsuite/sim/m32r/bgtz.cgs +++ /dev/null @@ -1,18 +0,0 @@ -# m32r testcase for bgtz $src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bgtz -bgtz: - mvi_h_gr r4, 1 - bgtz r4, ok -not_ok: - fail -ok: - mvi_h_gr r4, 0 - bgtz r4, not_ok - - pass diff --git a/sim/testsuite/sim/m32r/bl24.cgs b/sim/testsuite/sim/m32r/bl24.cgs deleted file mode 100644 index fd6f0dd69d5..00000000000 --- a/sim/testsuite/sim/m32r/bl24.cgs +++ /dev/null @@ -1,18 +0,0 @@ -# m32r testcase for bl $disp24 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bl24 -bl24: - bl.l test0pass -test1fail: - fail - -test0pass: - mvaddr_h_gr r4, test1fail - bne r4, r14, test1fail - - pass diff --git a/sim/testsuite/sim/m32r/bl8.cgs b/sim/testsuite/sim/m32r/bl8.cgs deleted file mode 100644 index d26369853b7..00000000000 --- a/sim/testsuite/sim/m32r/bl8.cgs +++ /dev/null @@ -1,18 +0,0 @@ -# m32r testcase for bl $disp8 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bl8 -bl8: - bl.s test0pass -test1fail: - fail - -test0pass: - mvaddr_h_gr r4, test1fail - bne r4, r14, test1fail - - pass diff --git a/sim/testsuite/sim/m32r/blez.cgs b/sim/testsuite/sim/m32r/blez.cgs deleted file mode 100644 index e3d198d93ad..00000000000 --- a/sim/testsuite/sim/m32r/blez.cgs +++ /dev/null @@ -1,19 +0,0 @@ -# m32r testcase for blez $src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global blez -blez: - mvi_h_gr r4, 0 - blez r4, test0pass -test1fail: - fail - -test0pass: - mvi_h_gr r4, 1 - blez r4, test1fail - - pass diff --git a/sim/testsuite/sim/m32r/bltz.cgs b/sim/testsuite/sim/m32r/bltz.cgs deleted file mode 100644 index c9377fcaab1..00000000000 --- a/sim/testsuite/sim/m32r/bltz.cgs +++ /dev/null @@ -1,19 +0,0 @@ -# m32r testcase for bltz $src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bltz -bltz: - mvi_h_gr r4, -1 - bltz r4, test0pass -test1fail: - fail - -test0pass: - mvi_h_gr r4, 0 - bltz r4, test1fail - - pass diff --git a/sim/testsuite/sim/m32r/bnc24.cgs b/sim/testsuite/sim/m32r/bnc24.cgs deleted file mode 100644 index 692d2d58436..00000000000 --- a/sim/testsuite/sim/m32r/bnc24.cgs +++ /dev/null @@ -1,20 +0,0 @@ -# m32r testcase for bnc $disp24 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bnc24 -bnc24: - mvi_h_condbit 0 - bnc.l test0pass - -test1fail: - fail -test0pass: - - mvi_h_condbit 1 - bnc.l test1fail - - pass diff --git a/sim/testsuite/sim/m32r/bnc8.cgs b/sim/testsuite/sim/m32r/bnc8.cgs deleted file mode 100644 index dae2613cc9f..00000000000 --- a/sim/testsuite/sim/m32r/bnc8.cgs +++ /dev/null @@ -1,20 +0,0 @@ -# m32r testcase for bnc $disp8 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bnc8 -bnc8: - mvi_h_condbit 0 - bnc.s test0pass - -test1fail: - fail - -test0pass: - mvi_h_condbit 1 - bnc.s test1fail - - pass diff --git a/sim/testsuite/sim/m32r/bne.cgs b/sim/testsuite/sim/m32r/bne.cgs deleted file mode 100644 index 5e1d7a6ecc5..00000000000 --- a/sim/testsuite/sim/m32r/bne.cgs +++ /dev/null @@ -1,20 +0,0 @@ -# m32r testcase for bne $src1,$src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bne -bne: - mvi_h_gr r4, 1 - mvi_h_gr r5, 2 - bne r4, r5, test0pass -test1fail: - fail - -test0pass: - mvi_h_gr r4, 2 - bne r4, r5, test1fail - - pass diff --git a/sim/testsuite/sim/m32r/bnez.cgs b/sim/testsuite/sim/m32r/bnez.cgs deleted file mode 100644 index 9f102895029..00000000000 --- a/sim/testsuite/sim/m32r/bnez.cgs +++ /dev/null @@ -1,19 +0,0 @@ -# m32r testcase for bnez $src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bnez -bnez: - mvi_h_gr r4, 1 - bnez r4, test0pass -test1fail: - fail - -test0pass: - mvi_h_gr r4, 0 - bnez r4, test1fail - - pass diff --git a/sim/testsuite/sim/m32r/bra24.cgs b/sim/testsuite/sim/m32r/bra24.cgs deleted file mode 100644 index d62d2bf0ec3..00000000000 --- a/sim/testsuite/sim/m32r/bra24.cgs +++ /dev/null @@ -1,15 +0,0 @@ -# m32r testcase for bra $disp24 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bra24 -bra24: - bra.l ok - - fail - -ok: - pass diff --git a/sim/testsuite/sim/m32r/bra8.cgs b/sim/testsuite/sim/m32r/bra8.cgs deleted file mode 100644 index f5f50ad2d93..00000000000 --- a/sim/testsuite/sim/m32r/bra8.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# m32r testcase for bra $disp8 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bra8 -bra8: - bra.s ok - - fail -ok: - pass diff --git a/sim/testsuite/sim/m32r/cmp.cgs b/sim/testsuite/sim/m32r/cmp.cgs deleted file mode 100644 index 6ea67206218..00000000000 --- a/sim/testsuite/sim/m32r/cmp.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# m32r testcase for cmp $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global cmp -cmp: - mvi_h_condbit 0 - mvi_h_gr r4, 1 - mvi_h_gr r5, 2 - cmp r4, r5 - bc ok -not_ok: - fail -ok: - mvi_h_condbit 1 - mvi_h_gr r4, 2 - cmp r4, r5 - bc not_ok - - pass diff --git a/sim/testsuite/sim/m32r/cmpi.cgs b/sim/testsuite/sim/m32r/cmpi.cgs deleted file mode 100644 index af11283d68d..00000000000 --- a/sim/testsuite/sim/m32r/cmpi.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# m32r testcase for cmpi $src2,#$simm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global cmpi -cmpi: - mvi_h_condbit 0 - mvi_h_gr r4, 1 - - cmpi r4, #2 - bc ok -not_ok: - fail -ok: - mvi_h_condbit 1 - mvi_h_gr r4, 2 - cmpi r4, #2 - bc not_ok - - - pass diff --git a/sim/testsuite/sim/m32r/cmpu.cgs b/sim/testsuite/sim/m32r/cmpu.cgs deleted file mode 100644 index e0b4ef10180..00000000000 --- a/sim/testsuite/sim/m32r/cmpu.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# m32r testcase for cmpu $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global cmpu -cmpu: - mvi_h_condbit 0 - mvi_h_gr r4, 1 - mvi_h_gr r5, -2 - cmpu r4, r5 - bc ok -not_ok: - fail -ok: - mvi_h_condbit 1 - mvi_h_gr r4, -1 - cmpu r4, r5 - bc not_ok - - pass diff --git a/sim/testsuite/sim/m32r/cmpui.cgs b/sim/testsuite/sim/m32r/cmpui.cgs deleted file mode 100644 index aa30207d933..00000000000 --- a/sim/testsuite/sim/m32r/cmpui.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# m32r testcase for cmpui $src2,#$simm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global cmpui -cmpui: - mvi_h_condbit 0 - mvi_h_gr r4, 1 - cmpui r4, #2 - bc ok -not_ok: - fail -ok: - mvi_h_condbit 1 - mvi_h_gr r4, -1 - cmpui r4, #2 - bc not_ok - - pass diff --git a/sim/testsuite/sim/m32r/div.cgs b/sim/testsuite/sim/m32r/div.cgs deleted file mode 100644 index 733f3629680..00000000000 --- a/sim/testsuite/sim/m32r/div.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for div $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global div -div: - mvi_h_gr r4, 0x18000 - mvi_h_gr r5, 8 - - div r4, r5 - - test_h_gr r4, 0x3000 - - pass diff --git a/sim/testsuite/sim/m32r/divu.cgs b/sim/testsuite/sim/m32r/divu.cgs deleted file mode 100644 index 25342d5dccc..00000000000 --- a/sim/testsuite/sim/m32r/divu.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for divu $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global divu -divu: - mvi_h_gr r4, 0x18000 - mvi_h_gr r5, 8 - - divu r4, r5 - - test_h_gr r4, 0x3000 - - pass diff --git a/sim/testsuite/sim/m32r/hello.ms b/sim/testsuite/sim/m32r/hello.ms deleted file mode 100644 index 7ae22778001..00000000000 --- a/sim/testsuite/sim/m32r/hello.ms +++ /dev/null @@ -1,19 +0,0 @@ -# output(): Hello world!\n -# mach(): m32r m32rx - - .globl _start -_start: - -; write (hello world) - ldi8 r3,#14 - ld24 r2,#hello - ldi8 r1,#1 - ldi8 r0,#5 - trap #0 -; exit (0) - ldi8 r1,#0 - ldi8 r0,#1 - trap #0 - -length: .long 14 -hello: .ascii "Hello world!\r\n" diff --git a/sim/testsuite/sim/m32r/hw-trap.ms b/sim/testsuite/sim/m32r/hw-trap.ms deleted file mode 100644 index 2aa200b5d70..00000000000 --- a/sim/testsuite/sim/m32r/hw-trap.ms +++ /dev/null @@ -1,31 +0,0 @@ -# mach(): m32r m32rx -# output(): pass\n - - .include "testutils.inc" - - start - -; construct bra trap2_handler in trap 2 slot - ld24 r0,#bra_insn - ld r0,@r0 - ld24 r1,#trap2_handler - addi r1,#-0x48 ; pc relative address from trap 2 slot to handler - srai r1,#2 - or r0,r1 - ld24 r2,#0x48 ; address of trap 2 slot - st r0,@r2 - -; perform trap - ldi r4,#0 - trap #2 - test_h_gr r4,42 - - pass - -; trap 2 handler -trap2_handler: - ldi r4,#42 - rte - -bra_insn: - bra.l 0 diff --git a/sim/testsuite/sim/m32r/jl.cgs b/sim/testsuite/sim/m32r/jl.cgs deleted file mode 100644 index a89c26a86bf..00000000000 --- a/sim/testsuite/sim/m32r/jl.cgs +++ /dev/null @@ -1,18 +0,0 @@ -# m32r testcase for jl $sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global jl -jl: - mvaddr_h_gr r4, ok - jl r4 -not_ok: - fail -ok: - mvaddr_h_gr r4, not_ok - bne r4, r14, not_ok - - pass diff --git a/sim/testsuite/sim/m32r/jmp.cgs b/sim/testsuite/sim/m32r/jmp.cgs deleted file mode 100644 index ba0864a53f0..00000000000 --- a/sim/testsuite/sim/m32r/jmp.cgs +++ /dev/null @@ -1,19 +0,0 @@ -# m32r testcase for jmp $sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global jmp -jmp: - mvaddr_h_gr r4, ok1 - jmp r4 - fail -ok1: - mvaddr_h_gr r4, ok2 - addi r4,#1 - jmp r4 - fail -ok2: - pass diff --git a/sim/testsuite/sim/m32r/ld-d.cgs b/sim/testsuite/sim/m32r/ld-d.cgs deleted file mode 100644 index 151743672b2..00000000000 --- a/sim/testsuite/sim/m32r/ld-d.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# m32r testcase for ld $dr,@($slo16,$sr) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ld_d -ld_d: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0 - - ld r5, @(#4, r4) - - test_h_gr r5, 0x12345678 - - pass - -data_loc: - .word 0x11223344 - .word 0x12345678 - diff --git a/sim/testsuite/sim/m32r/ld-plus.cgs b/sim/testsuite/sim/m32r/ld-plus.cgs deleted file mode 100644 index 5feaf62596e..00000000000 --- a/sim/testsuite/sim/m32r/ld-plus.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# m32r testcase for ld $dr,@$sr+ -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ld_plus -ld_plus: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0 - - ld r5, @r4+ - - test_h_gr r5, 0x12345678 - - mvaddr_h_gr r5, data_loc2 - bne r4, r5, not_ok - - pass -not_ok: - fail - -data_loc: - .word 0x12345678 -data_loc2: - .word 0x11223344 - diff --git a/sim/testsuite/sim/m32r/ld.cgs b/sim/testsuite/sim/m32r/ld.cgs deleted file mode 100644 index ad0b86ff6d5..00000000000 --- a/sim/testsuite/sim/m32r/ld.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# m32r testcase for ld $dr,@$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ld -ld: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0 - - ld r5, @r4 - - test_h_gr r5, 0x12345678 - - pass - -data_loc: - .word 0x12345678 - diff --git a/sim/testsuite/sim/m32r/ld24.cgs b/sim/testsuite/sim/m32r/ld24.cgs deleted file mode 100644 index 74b155518c8..00000000000 --- a/sim/testsuite/sim/m32r/ld24.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# m32r testcase for ld24 $dr,#$uimm24 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ld24 -ld24: - ld24 r4, #0x123456 - - test_h_gr r4, 0x123456 - - pass diff --git a/sim/testsuite/sim/m32r/ldb-d.cgs b/sim/testsuite/sim/m32r/ldb-d.cgs deleted file mode 100644 index 4a1cebb1fc3..00000000000 --- a/sim/testsuite/sim/m32r/ldb-d.cgs +++ /dev/null @@ -1,20 +0,0 @@ -# m32r testcase for ldb $dr,@($slo16,$sr) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldb_d -ldb_d: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0 - - ldb r5, @(#2, r4) - - test_h_gr r5, 0x56 ; big endian processor - - pass - -data_loc: - .word 0x12345678 diff --git a/sim/testsuite/sim/m32r/ldb.cgs b/sim/testsuite/sim/m32r/ldb.cgs deleted file mode 100644 index 9b895450f08..00000000000 --- a/sim/testsuite/sim/m32r/ldb.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# m32r testcase for ldb $dr,@$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldb -ldb: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0 - - ldb r5, @r4 - - test_h_gr r5, 0x12 ; big endian processor - - pass - -data_loc: - .word 0x12345678 - diff --git a/sim/testsuite/sim/m32r/ldh-d.cgs b/sim/testsuite/sim/m32r/ldh-d.cgs deleted file mode 100644 index 0be0309b1ef..00000000000 --- a/sim/testsuite/sim/m32r/ldh-d.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# m32r testcase for ldh $dr,@($slo16,$sr) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldh_d -ldh_d: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0 - - ldh r5, @(#2, r4) - - test_h_gr r5, 0x5678 ; big endian processor - - pass - -data_loc: - .word 0x12345678 - diff --git a/sim/testsuite/sim/m32r/ldh.cgs b/sim/testsuite/sim/m32r/ldh.cgs deleted file mode 100644 index 3d8db953d3d..00000000000 --- a/sim/testsuite/sim/m32r/ldh.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# m32r testcase for ldh $dr,@$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldh -ldh: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0 - - ldh r5, @r4 - - test_h_gr r5, 0x1234 ; big endian processor - - pass - -data_loc: - .word 0x12345678 - - pass diff --git a/sim/testsuite/sim/m32r/ldi16.cgs b/sim/testsuite/sim/m32r/ldi16.cgs deleted file mode 100644 index 478df1c1b32..00000000000 --- a/sim/testsuite/sim/m32r/ldi16.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# m32r testcase for ldi $dr,$slo16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldi16 -ldi16: - ldi r4, #0x1234 - - test_h_gr r4, 0x1234 - - pass diff --git a/sim/testsuite/sim/m32r/ldi8.cgs b/sim/testsuite/sim/m32r/ldi8.cgs deleted file mode 100644 index 081e7a86f35..00000000000 --- a/sim/testsuite/sim/m32r/ldi8.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# m32r testcase for ldi $dr,#$simm8 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldi8 -ldi8: - ldi r4, #0x78 - - test_h_gr r4, 0x78 - - pass diff --git a/sim/testsuite/sim/m32r/ldub-d.cgs b/sim/testsuite/sim/m32r/ldub-d.cgs deleted file mode 100644 index 7661071b820..00000000000 --- a/sim/testsuite/sim/m32r/ldub-d.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# m32r testcase for ldub $dr,@($slo16,$sr) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldub_d -ldub_d: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0 - - ldub r5, @(#2, r4) - - test_h_gr r5, 0xa0 ; big endian processor - - pass - -data_loc: - .word 0x8090a0b0 - diff --git a/sim/testsuite/sim/m32r/ldub.cgs b/sim/testsuite/sim/m32r/ldub.cgs deleted file mode 100644 index 27913b51f59..00000000000 --- a/sim/testsuite/sim/m32r/ldub.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# m32r testcase for ldub $dr,@$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldub -ldub: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0 - - ldub r5, @r4 - - test_h_gr r5, 0x80 ; big endian processor - - pass - -data_loc: - .word 0x800000f0 - diff --git a/sim/testsuite/sim/m32r/lduh-d.cgs b/sim/testsuite/sim/m32r/lduh-d.cgs deleted file mode 100644 index 96e294f0ec8..00000000000 --- a/sim/testsuite/sim/m32r/lduh-d.cgs +++ /dev/null @@ -1,20 +0,0 @@ -# m32r testcase for lduh $dr,@($slo16,$sr) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global lduh_d -lduh_d: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0 - - lduh r5, @(#2, r4) - - test_h_gr r5, 0xf000 ; big endian processor - - pass - -data_loc: - .word 0x8000f000 diff --git a/sim/testsuite/sim/m32r/lduh.cgs b/sim/testsuite/sim/m32r/lduh.cgs deleted file mode 100644 index a03bbee240d..00000000000 --- a/sim/testsuite/sim/m32r/lduh.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# m32r testcase for lduh $dr,@$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global lduh -lduh: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0 - - lduh r5, @r4 - - test_h_gr r5, 0x8010 ; big endian processor - - pass - -data_loc: - .word 0x8010f020 - - pass diff --git a/sim/testsuite/sim/m32r/lock.cgs b/sim/testsuite/sim/m32r/lock.cgs deleted file mode 100644 index 631525ebbbf..00000000000 --- a/sim/testsuite/sim/m32r/lock.cgs +++ /dev/null @@ -1,25 +0,0 @@ -# m32r testcase for lock $dr,@$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global lock -lock: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0 - - lock r5, @r4 - - test_h_gr r5, 0x12345678 - - ; There is no way to test the lock bit - - unlock r5, @r4 ; Unlock the processor - - pass - -data_loc: - .word 0x12345678 - diff --git a/sim/testsuite/sim/m32r/machi.cgs b/sim/testsuite/sim/m32r/machi.cgs deleted file mode 100644 index 2e2ef00294c..00000000000 --- a/sim/testsuite/sim/m32r/machi.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for machi $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global machi -machi: - - mvi_h_accum0 0, 1 - mvi_h_gr r4, 0x10123 - mvi_h_gr r5, 0x20456 - machi r4, r5 - test_h_accum0 0, 0x20001 - - pass diff --git a/sim/testsuite/sim/m32r/maclo.cgs b/sim/testsuite/sim/m32r/maclo.cgs deleted file mode 100644 index 5d035394dc4..00000000000 --- a/sim/testsuite/sim/m32r/maclo.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for maclo $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global maclo -maclo: - - mvi_h_accum0 0, 1 - mvi_h_gr r4, 0x1230001 - mvi_h_gr r5, 0x4560002 - maclo r4, r5 - test_h_accum0 0, 0x20001 - - pass diff --git a/sim/testsuite/sim/m32r/macwhi.cgs b/sim/testsuite/sim/m32r/macwhi.cgs deleted file mode 100644 index 9ee7a5b0bb9..00000000000 --- a/sim/testsuite/sim/m32r/macwhi.cgs +++ /dev/null @@ -1,18 +0,0 @@ -# m32r testcase for macwhi $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global macwhi -macwhi: - mvi_h_accum0 0, 1 - mvi_h_gr r4, 0x10123 - mvi_h_gr r5, 0x20456 - - macwhi r4, r5 - - test_h_accum0 0, 0x20247 - - pass diff --git a/sim/testsuite/sim/m32r/macwlo.cgs b/sim/testsuite/sim/m32r/macwlo.cgs deleted file mode 100644 index a7ce4edac5c..00000000000 --- a/sim/testsuite/sim/m32r/macwlo.cgs +++ /dev/null @@ -1,18 +0,0 @@ -# m32r testcase for macwlo $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global macwlo -macwlo: - mvi_h_accum0 0, 1 - mvi_h_gr r4, 0x10123 - mvi_h_gr r5, 0x40002 - - macwlo r4, r5 - - test_h_accum0 0, 0x20247 - - pass diff --git a/sim/testsuite/sim/m32r/misc.exp b/sim/testsuite/sim/m32r/misc.exp deleted file mode 100644 index 6ed5638ab29..00000000000 --- a/sim/testsuite/sim/m32r/misc.exp +++ /dev/null @@ -1,21 +0,0 @@ -# Miscellaneous M32R simulator testcases - -if [istarget m32r*-*-*] { - # load support procs - # load_lib cgen.exp - - # all machines - set all_machs "m32r" - - - # The .ms suffix is for "miscellaneous .s". - foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.ms]] { - # If we're only testing specific files and this isn't one of them, - # skip it. - if ![runtest_file_p $runtests $src] { - continue - } - - run_sim_test $src $all_machs - } -} diff --git a/sim/testsuite/sim/m32r/mul.cgs b/sim/testsuite/sim/m32r/mul.cgs deleted file mode 100644 index c78f24b8117..00000000000 --- a/sim/testsuite/sim/m32r/mul.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for mul $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mul -mul: - mvi_h_gr r4, 3 - mvi_h_gr r5, 7 - - mul r5, r4 - - test_h_gr r5, 21 - - pass diff --git a/sim/testsuite/sim/m32r/mulhi.cgs b/sim/testsuite/sim/m32r/mulhi.cgs deleted file mode 100644 index 77c103d6f36..00000000000 --- a/sim/testsuite/sim/m32r/mulhi.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# m32r testcase for mulhi $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mulhi -mulhi: - - mvi_h_gr r4, 0x40000 - mvi_h_gr r5, 0x50000 - mulhi r4, r5 - test_h_accum0 0, 0x140000 - - pass diff --git a/sim/testsuite/sim/m32r/mullo.cgs b/sim/testsuite/sim/m32r/mullo.cgs deleted file mode 100644 index 11aadff3794..00000000000 --- a/sim/testsuite/sim/m32r/mullo.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# m32r testcase for mullo $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mullo -mullo: - - mvi_h_gr r4, 4 - mvi_h_gr r5, 5 - mullo r4, r5 - test_h_accum0 0, 0x140000 - - pass diff --git a/sim/testsuite/sim/m32r/mulwhi.cgs b/sim/testsuite/sim/m32r/mulwhi.cgs deleted file mode 100644 index eb18562d9e7..00000000000 --- a/sim/testsuite/sim/m32r/mulwhi.cgs +++ /dev/null @@ -1,18 +0,0 @@ -# m32r testcase for mulwhi $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mulwhi -mulwhi: - mvi_h_accum0 0, 1 - mvi_h_gr r4, 0x10123 - mvi_h_gr r5, 0x20456 - - mulwhi r4, r5 - - test_h_accum0 0, 0x20246 - - pass diff --git a/sim/testsuite/sim/m32r/mulwlo.cgs b/sim/testsuite/sim/m32r/mulwlo.cgs deleted file mode 100644 index d22c26827cd..00000000000 --- a/sim/testsuite/sim/m32r/mulwlo.cgs +++ /dev/null @@ -1,18 +0,0 @@ -# m32r testcase for mulwlo $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mulwlo -mulwlo: - mvi_h_accum0 0, 1 - mvi_h_gr r4, 0x10123 - mvi_h_gr r5, 0x40002 - - mulwlo r4, r5 - - test_h_accum0 0, 0x20246 - - pass diff --git a/sim/testsuite/sim/m32r/mv.cgs b/sim/testsuite/sim/m32r/mv.cgs deleted file mode 100644 index 694569535b7..00000000000 --- a/sim/testsuite/sim/m32r/mv.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for mv $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mv -mv: - mvi_h_gr r4, 1 - mvi_h_gr r5, 0 - - mv r5, r4 - - test_h_gr r5, 1 - - pass diff --git a/sim/testsuite/sim/m32r/mvfachi.cgs b/sim/testsuite/sim/m32r/mvfachi.cgs deleted file mode 100644 index 0222e1b9118..00000000000 --- a/sim/testsuite/sim/m32r/mvfachi.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# m32r testcase for mvfachi $dr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mvfachi -mvfachi: - mvi_h_accum0 0x11223344, 0x55667788 - mvi_h_gr r4, 0 - - mvfachi r4 - test_h_gr r4, 0x223344 - - mvi_h_accum0 0x99aabbcc, 0x55667788 - mvi_h_gr r4, 0 - - mvfachi r4 - test_h_gr r4, 0xffaabbcc - - pass diff --git a/sim/testsuite/sim/m32r/mvfaclo.cgs b/sim/testsuite/sim/m32r/mvfaclo.cgs deleted file mode 100644 index 0a88d849aee..00000000000 --- a/sim/testsuite/sim/m32r/mvfaclo.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for mvfaclo $dr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mvfaclo -mvfaclo: - mvi_h_accum0 0x11223344, 0x55667788 - mvi_h_gr r4, 0 - - mvfaclo r4 - - test_h_gr r4, 0x55667788 - - pass diff --git a/sim/testsuite/sim/m32r/mvfacmi.cgs b/sim/testsuite/sim/m32r/mvfacmi.cgs deleted file mode 100644 index 580bcae9890..00000000000 --- a/sim/testsuite/sim/m32r/mvfacmi.cgs +++ /dev/null @@ -1,15 +0,0 @@ -# m32r testcase for mvfacmi $dr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mvfacmi -mvfacmi: - - mvi_h_accum0 0x12345678, 0x87654321 - mvfacmi r4 - test_h_gr r4, 0x56788765 - - pass diff --git a/sim/testsuite/sim/m32r/mvfc.cgs b/sim/testsuite/sim/m32r/mvfc.cgs deleted file mode 100644 index ca2470e1e2d..00000000000 --- a/sim/testsuite/sim/m32r/mvfc.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# m32r testcase for mvfc $dr,$scr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mvfc -mvfc: - mvi_h_condbit 0 - mvi_h_gr r4, 1 - - mvfc r4, cr1 - - test_h_gr r4, 0 - - mvi_h_condbit 1 - - mvfc r4, cr1 - - test_h_gr r4, 1 - - pass diff --git a/sim/testsuite/sim/m32r/mvtachi.cgs b/sim/testsuite/sim/m32r/mvtachi.cgs deleted file mode 100644 index 6d596169557..00000000000 --- a/sim/testsuite/sim/m32r/mvtachi.cgs +++ /dev/null @@ -1,20 +0,0 @@ -# m32r testcase for mvtachi $src1 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mvtachi -mvtachi: - mvi_h_accum0 0, 0 - - mvi_h_gr r4, 0x11223344 - mvtachi r4 - test_h_accum0 0x223344, 0x0 - - mvi_h_gr r4, 0x99aabbcc - mvtachi r4 - test_h_accum0 0xffaabbcc, 0x0 - - pass diff --git a/sim/testsuite/sim/m32r/mvtaclo.cgs b/sim/testsuite/sim/m32r/mvtaclo.cgs deleted file mode 100644 index baafd839acb..00000000000 --- a/sim/testsuite/sim/m32r/mvtaclo.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for mvtaclo $src1 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mvtaclo -mvtaclo: - mvi_h_accum0 0, 0 - mvi_h_gr r4, 0x11223344 - - mvtaclo r4 - - test_h_accum0 0, 0x11223344 - - pass diff --git a/sim/testsuite/sim/m32r/mvtc.cgs b/sim/testsuite/sim/m32r/mvtc.cgs deleted file mode 100644 index 94780dfa11a..00000000000 --- a/sim/testsuite/sim/m32r/mvtc.cgs +++ /dev/null @@ -1,18 +0,0 @@ -# m32r testcase for mvtc $sr,$dcr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mvtc -mvtc: - mvi_h_condbit 0 - mvi_h_gr r4, 1 - - mvtc r4, cr1 - bc ok - - fail -ok: - pass diff --git a/sim/testsuite/sim/m32r/neg.cgs b/sim/testsuite/sim/m32r/neg.cgs deleted file mode 100644 index 6051efaf256..00000000000 --- a/sim/testsuite/sim/m32r/neg.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for neg $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global neg -neg: - mvi_h_gr r4, 1 - mvi_h_gr r5, 2 - - neg r4, r5 - - test_h_gr r4, -2 - - pass diff --git a/sim/testsuite/sim/m32r/nop.cgs b/sim/testsuite/sim/m32r/nop.cgs deleted file mode 100644 index e06d656f20e..00000000000 --- a/sim/testsuite/sim/m32r/nop.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for nop -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global nop -nop: - nop - pass diff --git a/sim/testsuite/sim/m32r/not.cgs b/sim/testsuite/sim/m32r/not.cgs deleted file mode 100644 index e6ceb643ebf..00000000000 --- a/sim/testsuite/sim/m32r/not.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for not $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global not -not: - mvi_h_gr r4, 1 - mvi_h_gr r5, 2 - - not r4, r5 - - test_h_gr r4, 0xfffffffd - - pass diff --git a/sim/testsuite/sim/m32r/or.cgs b/sim/testsuite/sim/m32r/or.cgs deleted file mode 100644 index 1b08bd0c2a7..00000000000 --- a/sim/testsuite/sim/m32r/or.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for or $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global or -or: - mvi_h_gr r4, 3 - mvi_h_gr r5, 6 - - or r4, r5 - - test_h_gr r4, 7 - - pass diff --git a/sim/testsuite/sim/m32r/or3.cgs b/sim/testsuite/sim/m32r/or3.cgs deleted file mode 100644 index dc76ada9333..00000000000 --- a/sim/testsuite/sim/m32r/or3.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for or3 $dr,$sr,#$ulo16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global or3 -or3: - mvi_h_gr r4, 0 - mvi_h_gr r5, 6 - - or3 r4, r5, #3 - - test_h_gr r4, 7 - - pass diff --git a/sim/testsuite/sim/m32r/rac.cgs b/sim/testsuite/sim/m32r/rac.cgs deleted file mode 100644 index 35b9ae3cd91..00000000000 --- a/sim/testsuite/sim/m32r/rac.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# m32r testcase for rac -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global rac -rac: - - mvi_h_accum0 1, 0x4001 - rac - test_h_accum0 2, 0x10000 - - mvi_h_accum0 0x3fff, 0xffff4000 - rac - test_h_accum0 0x7fff, 0xffff0000 - - mvi_h_accum0 0xffff8000, 0 - rac - test_h_accum0 0xffff8000, 0 - - pass diff --git a/sim/testsuite/sim/m32r/rach.cgs b/sim/testsuite/sim/m32r/rach.cgs deleted file mode 100644 index c22469834f7..00000000000 --- a/sim/testsuite/sim/m32r/rach.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# m32r testcase for rach -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global rach -rach: - mvi_h_accum0 1, 0x40004001 - rach - test_h_accum0 3, 0 - - mvi_h_accum0 0x3fff, 0xc0000000 - rach - test_h_accum0 0x7fff, 0 - - mvi_h_accum0 0xffff8000, 0 - rach - test_h_accum0 0xffff8000, 0 - - pass diff --git a/sim/testsuite/sim/m32r/rem.cgs b/sim/testsuite/sim/m32r/rem.cgs deleted file mode 100644 index 78c11cbcf90..00000000000 --- a/sim/testsuite/sim/m32r/rem.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for rem $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global rem -rem: - mvi_h_gr r4, 12345678 - mvi_h_gr r5, 7 - - rem r4, r5 - - test_h_gr r4, 2 - - pass diff --git a/sim/testsuite/sim/m32r/remu.cgs b/sim/testsuite/sim/m32r/remu.cgs deleted file mode 100644 index 36336306b27..00000000000 --- a/sim/testsuite/sim/m32r/remu.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# m32r testcase for remu $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global remu -remu: - mvi_h_gr r4, 17 - mvi_h_gr r5, 7 - - remu r4, r5 - - test_h_gr r4, 3 - - mvi_h_gr r4, -17 - - remu r4, r5 - - test_h_gr r4, 1 - - pass diff --git a/sim/testsuite/sim/m32r/rte.cgs b/sim/testsuite/sim/m32r/rte.cgs deleted file mode 100644 index b389fe15431..00000000000 --- a/sim/testsuite/sim/m32r/rte.cgs +++ /dev/null @@ -1,87 +0,0 @@ -# m32r testcase for rte -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global rte -rte: - -; Test 1: bbpsw = 0, bpsw = 1, psw = 0 - - ; bbsm = 0, bie = 0, bbcond = 0 - mvi_h_gr r4, 0 - mvtc r4, cr8 - - ; bsm = 1, bie = 1, bcond = 1, sm = 0, ie = 0, cond = 0 - mvi_h_gr r4, 0xc100 - mvtc r4, cr0 - - ; bbpc = 0 - mvaddr_h_gr r4, 0 - mvtc r4, bbpc - - ; bpc = ret1 - mvaddr_h_gr r4, ret1 - mvtc r4, bpc - - rte - fail - -ret1: - ; test bbsm = 0, bbie = 0, bbcond = 0 - mvfc r4, cr8 - test_h_gr r4, 0 - - ; test bsm = 0, bie = 0, bcond = 0, sm = 1, ie = 1, cond = 1 - mvfc r4, cr0 - test_h_gr r4, 0xc1 - - ; test bbpc = 0 - mvfc r4, bbpc - test_h_gr r4, 0 - - ; test bpc = 0 - mvfc r4, bpc - test_h_gr r4, 0 - -; Test 2: bbpsw = 1, bpsw = 0, psw = 1 - - ; bbsm = 1, bie = 1, bbcond = 1 - mvi_h_gr r4, 0xc1 - mvtc r4, cr8 - - ; bsm = 0, bie = 0, bcond = 0, sm = 1, ie = 1, cond = 1 - mvi_h_gr r4, 0xc1 - mvtc r4, cr0 - - ; bbpc = 42 - mvaddr_h_gr r4, 42 - mvtc r4, bbpc - - ; bpc = ret2 + 2 - mvaddr_h_gr r4, ret2 + 2 - mvtc r4, bpc - - rte - fail - -ret2: - ; test bbsm = 1, bbie = 1, bbcond = 1 - mvfc r4, cr8 - test_h_gr r4, 0xc1 - - ; test bsm = 1, bie = 1, bcond = 1, sm = 0, ie = 0, cond = 0 - mvfc r4, cr0 - test_h_gr r4, 0xc100 - - ; test bbpc = 42 - mvfc r4, bbpc - test_h_gr r4, 42 - - ; test bpc = 42 - mvfc r4, bpc - test_h_gr r4, 42 - - pass diff --git a/sim/testsuite/sim/m32r/seth.cgs b/sim/testsuite/sim/m32r/seth.cgs deleted file mode 100644 index aec3230a548..00000000000 --- a/sim/testsuite/sim/m32r/seth.cgs +++ /dev/null @@ -1,20 +0,0 @@ -# m32r testcase for seth $dr,#$hi16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global seth -seth: - seth r4, #0x1234 - - ; do not use test_h_gr macro since this uses seth - - srli r4, #16 - ld24 r5, #0x1234 - beq r4, r5, ok - - fail -ok: - pass diff --git a/sim/testsuite/sim/m32r/sll.cgs b/sim/testsuite/sim/m32r/sll.cgs deleted file mode 100644 index fa3cfed8861..00000000000 --- a/sim/testsuite/sim/m32r/sll.cgs +++ /dev/null @@ -1,15 +0,0 @@ -# m32r testcase for sll $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global sll -sll: - mvi_h_gr r4, 6 - mvi_h_gr r5, 1 - sll r4, r5 - test_h_gr r4, 12 - - pass diff --git a/sim/testsuite/sim/m32r/sll3.cgs b/sim/testsuite/sim/m32r/sll3.cgs deleted file mode 100644 index ddd360cd111..00000000000 --- a/sim/testsuite/sim/m32r/sll3.cgs +++ /dev/null @@ -1,15 +0,0 @@ -# m32r testcase for sll3 $dr,$sr,#$simm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global sll3 -sll3: - mvi_h_gr r4, 1 - mvi_h_gr r5, 6 - sll3 r4, r5, #1 - test_h_gr r4, 12 - - pass diff --git a/sim/testsuite/sim/m32r/slli.cgs b/sim/testsuite/sim/m32r/slli.cgs deleted file mode 100644 index eab77daa695..00000000000 --- a/sim/testsuite/sim/m32r/slli.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# m32r testcase for slli $dr,#$uimm5 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global slli -slli: - mvi_h_gr r4, 6 - slli r4, #1 - test_h_gr r4, 12 - - pass diff --git a/sim/testsuite/sim/m32r/sra.cgs b/sim/testsuite/sim/m32r/sra.cgs deleted file mode 100644 index 11671ed8658..00000000000 --- a/sim/testsuite/sim/m32r/sra.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# m32r testcase for sra $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global sra -sra: - - mvi_h_gr r4, 0xf0f0f0ff - mvi_h_gr r5, 4 - sra r4, r5 - test_h_gr r4, 0xff0f0f0f - - pass diff --git a/sim/testsuite/sim/m32r/sra3.cgs b/sim/testsuite/sim/m32r/sra3.cgs deleted file mode 100644 index 0dd387adf46..00000000000 --- a/sim/testsuite/sim/m32r/sra3.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# m32r testcase for sra3 $dr,$sr,#$simm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global sra3 -sra3: - - mvi_h_gr r4, 0 - mvi_h_gr r5, 0xf0f0f0ff - sra3 r4, r5, #4 - test_h_gr r4, 0xff0f0f0f - - pass diff --git a/sim/testsuite/sim/m32r/srai.cgs b/sim/testsuite/sim/m32r/srai.cgs deleted file mode 100644 index 2a1569422a5..00000000000 --- a/sim/testsuite/sim/m32r/srai.cgs +++ /dev/null @@ -1,14 +0,0 @@ -# m32r testcase for srai $dr,#$uimm5 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global srai -srai: - mvi_h_gr r5, 0xf0f0f0ff - srai r5, #4 - test_h_gr r5, 0xff0f0f0f - - pass diff --git a/sim/testsuite/sim/m32r/srl.cgs b/sim/testsuite/sim/m32r/srl.cgs deleted file mode 100644 index 8838c2fbd48..00000000000 --- a/sim/testsuite/sim/m32r/srl.cgs +++ /dev/null @@ -1,15 +0,0 @@ -# m32r testcase for srl $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global srl -srl: - mvi_h_gr r4, 6 - mvi_h_gr r5, 1 - srl r4, r5 - test_h_gr r4, 3 - - pass diff --git a/sim/testsuite/sim/m32r/srl3.cgs b/sim/testsuite/sim/m32r/srl3.cgs deleted file mode 100644 index a1dc4840f63..00000000000 --- a/sim/testsuite/sim/m32r/srl3.cgs +++ /dev/null @@ -1,15 +0,0 @@ -# m32r testcase for srl3 $dr,$sr,#$simm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global srl3 -srl3: - mvi_h_gr r4, 0 - mvi_h_gr r5, 6 - srl3 r4, r5, #1 - test_h_gr r4, 3 - - pass diff --git a/sim/testsuite/sim/m32r/srli.cgs b/sim/testsuite/sim/m32r/srli.cgs deleted file mode 100644 index f358a768a7f..00000000000 --- a/sim/testsuite/sim/m32r/srli.cgs +++ /dev/null @@ -1,15 +0,0 @@ -# m32r testcase for srli $dr,#$uimm5 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global srli -srli: - mvi_h_gr r5, 6 - srli r5, #1 - test_h_gr r5, 3 - - - pass diff --git a/sim/testsuite/sim/m32r/st-d.cgs b/sim/testsuite/sim/m32r/st-d.cgs deleted file mode 100644 index e2668a05c04..00000000000 --- a/sim/testsuite/sim/m32r/st-d.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# m32r testcase for st $src1,@($slo16,$src2) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global st_d -st_d: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 1 - - st r5, @(#8,r4) - - mvaddr_h_gr r4, data_loc2 - ld r4, @r4 - test_h_gr r4, 1 - - pass - -data_loc: - .word 0 - .word 0 -data_loc2: - .word 0 - diff --git a/sim/testsuite/sim/m32r/st-minus.cgs b/sim/testsuite/sim/m32r/st-minus.cgs deleted file mode 100644 index fc90351c389..00000000000 --- a/sim/testsuite/sim/m32r/st-minus.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# m32r testcase for st $src1,@-$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global st_minus -st_minus: - mvaddr_h_gr r4, data_loc2 - mvi_h_gr r5, 1 - - st r5, @-r4 - - mvaddr_h_gr r5, data_loc - - bne r4, r5, not_ok - ld r4, @r4 - test_h_gr r4, 1 - - pass -not_ok: - fail - -data_loc: - .word 0 -data_loc2: - .word 0 - diff --git a/sim/testsuite/sim/m32r/st-plus.cgs b/sim/testsuite/sim/m32r/st-plus.cgs deleted file mode 100644 index 7bb4dd16fe7..00000000000 --- a/sim/testsuite/sim/m32r/st-plus.cgs +++ /dev/null @@ -1,28 +0,0 @@ -# m32r testcase for st $src1,@+$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global st_plus -st_plus: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 1 - - st r5, @+r4 - - mvaddr_h_gr r5, data_loc2 - - bne r4, r5, not_ok - ld r4, @r4 - test_h_gr r4, 1 - - pass -not_ok: - fail - -data_loc: - .word 0 -data_loc2: - .word 0 diff --git a/sim/testsuite/sim/m32r/st.cgs b/sim/testsuite/sim/m32r/st.cgs deleted file mode 100644 index 9588b8c40c8..00000000000 --- a/sim/testsuite/sim/m32r/st.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# m32r testcase for st $src1,@$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global st -st: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 1 - - st r5, @r4 - - ld r4, @r4 - test_h_gr r4, 1 - - pass - -data_loc: - .word 0 diff --git a/sim/testsuite/sim/m32r/stb-d.cgs b/sim/testsuite/sim/m32r/stb-d.cgs deleted file mode 100644 index 37c2d733d72..00000000000 --- a/sim/testsuite/sim/m32r/stb-d.cgs +++ /dev/null @@ -1,25 +0,0 @@ -# m32r testcase for stb $src1,@($slo16,$src2) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global stb_d -stb_d: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0x1234 - - stb r5, @(#8,r4) - - mvaddr_h_gr r4, data_loc2 - ld r4, @r4 - test_h_gr r4, 0x34000000 ; big endian processor - - pass - -data_loc: - .word 0 - .word 0 -data_loc2: - .word 0 diff --git a/sim/testsuite/sim/m32r/stb.cgs b/sim/testsuite/sim/m32r/stb.cgs deleted file mode 100644 index 01283169023..00000000000 --- a/sim/testsuite/sim/m32r/stb.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# m32r testcase for stb $src1,@$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global stb -stb: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0x1234 - - stb r5, @r4 - - ld r4, @r4 - test_h_gr r4, 0x34000000 ; big endian processor - - pass - -data_loc: - .word 0 diff --git a/sim/testsuite/sim/m32r/sth-d.cgs b/sim/testsuite/sim/m32r/sth-d.cgs deleted file mode 100644 index 11aaa6d76c1..00000000000 --- a/sim/testsuite/sim/m32r/sth-d.cgs +++ /dev/null @@ -1,25 +0,0 @@ -# m32r testcase for sth $src1,@($slo16,$src2) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global sth_d -sth_d: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0x123456 - - sth r5, @(#8,r4) - - mvaddr_h_gr r4, data_loc2 - ld r4, @r4 - test_h_gr r4, 0x34560000 ; big endian processor - - pass - -data_loc: - .word 0 - .word 0 -data_loc2: - .word 0 diff --git a/sim/testsuite/sim/m32r/sth.cgs b/sim/testsuite/sim/m32r/sth.cgs deleted file mode 100644 index 1a10fde1ce3..00000000000 --- a/sim/testsuite/sim/m32r/sth.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# m32r testcase for sth $src1,@$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global sth -sth: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 0x123456 - - sth r5, @r4 - - ld r4, @r4 - test_h_gr r4, 0x34560000 ; big endian processor - - pass - -data_loc: - .word 0 diff --git a/sim/testsuite/sim/m32r/sub.cgs b/sim/testsuite/sim/m32r/sub.cgs deleted file mode 100644 index 4d676e58083..00000000000 --- a/sim/testsuite/sim/m32r/sub.cgs +++ /dev/null @@ -1,18 +0,0 @@ -# m32r testcase for sub $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global sub -sub: - - mvi_h_gr r4, 7 - mvi_h_gr r5, 3 - - sub r4, r5 - - test_h_gr r4, 4 - - pass diff --git a/sim/testsuite/sim/m32r/subv.cgs b/sim/testsuite/sim/m32r/subv.cgs deleted file mode 100644 index 9474766e55b..00000000000 --- a/sim/testsuite/sim/m32r/subv.cgs +++ /dev/null @@ -1,20 +0,0 @@ -# m32r testcase for subv $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global subv -subv: - mvi_h_condbit 0 - mvi_h_gr r4, 0x80000000 - mvi_h_gr r5, 3 - - subv r4, r5 - - bc ok - - fail -ok: - pass diff --git a/sim/testsuite/sim/m32r/subx.cgs b/sim/testsuite/sim/m32r/subx.cgs deleted file mode 100644 index e890fcfabd7..00000000000 --- a/sim/testsuite/sim/m32r/subx.cgs +++ /dev/null @@ -1,26 +0,0 @@ -# m32r testcase for subx $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global subx -subx: - mvi_h_condbit 1 - mvi_h_gr r4, 6 - mvi_h_gr r5, 4 - subx r4, r5 - bc not_ok - test_h_gr r4, 1 - - mvi_h_condbit 1 - mvi_h_gr r4, 4 - mvi_h_gr r5, 4 - subx r4, r5 - bnc not_ok - test_h_gr r4, 0xffffffff - - pass -not_ok: - fail diff --git a/sim/testsuite/sim/m32r/testutils.inc b/sim/testsuite/sim/m32r/testutils.inc deleted file mode 100644 index 1d8822ae098..00000000000 --- a/sim/testsuite/sim/m32r/testutils.inc +++ /dev/null @@ -1,95 +0,0 @@ -# r0-r3 are used as tmps, consider them call clobbered by these macros. - - .macro start - .data -failmsg: - .ascii "fail\n" -passmsg: - .ascii "pass\n" - .text - .global _start -_start: - .endm - - .macro exit rc - ldi8 r1, \rc - ldi8 r0, #1 - trap #0 - .endm - - .macro pass - ldi8 r3, 5 - ld24 r2, passmsg - ldi8 r1, 1 - ldi8 r0, 5 - trap #0 - exit 0 - .endm - - .macro fail - ldi8 r3, 5 - ld24 r2, failmsg - ldi8 r1, 1 - ldi8 r0, 5 - trap #0 - exit 1 - .endm - - .macro mvi_h_gr reg, val - .if (\val >= -128) && (\val <= 127) - ldi8 \reg, \val - .else - seth \reg, high(\val) - or3 \reg, \reg, low(\val) - .endif - .endm - - .macro mvaddr_h_gr reg, addr - seth \reg, high(\addr) - or3 \reg, \reg, low(\addr) - .endm - -# Other macros know this only clobbers r0. - .macro test_h_gr reg, val - mvaddr_h_gr r0, \val - beq \reg, r0, test_gr\@ - fail -test_gr\@: - .endm - - .macro mvi_h_condbit val - ldi8 r0, 0 - ldi8 r1, 1 - .if \val - cmp r0, r1 - .else - cmp r1, r0 - .endif - .endm - - .macro test_h_condbit val - .if \val - bc test_c1\@ - fail -test_c1\@: - .else - bnc test_c0\@ - fail -test_c0\@: - .endif - .endm - - .macro mvi_h_accum0 hi, lo - mvi_h_gr r0, \hi - mvtachi r0 - mvi_h_gr r0, \lo - mvtaclo r0 - .endm - - .macro test_h_accum0 hi, lo - mvfachi r1 - test_h_gr r1, \hi - mvfaclo r1 - test_h_gr r1, \lo - .endm - diff --git a/sim/testsuite/sim/m32r/trap.cgs b/sim/testsuite/sim/m32r/trap.cgs deleted file mode 100644 index 59e136a0173..00000000000 --- a/sim/testsuite/sim/m32r/trap.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# m32r testcase for trap #$uimm4 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global trap -trap: - -; Test 1: bbpsw = 0, bpsw = 1, psw = 0 - - ; bbsm = 0, bie = 0, bbcond = 0 - mvi_h_gr r4, 0 - mvtc r4, cr8 - - ; bsm = 1, bie = 1, bcond = 1, sm = 0, ie = 0, cond = 0 - mvi_h_gr r4, 0xc100 - mvtc r4, cr0 - - ; bbpc = 0 - mvaddr_h_gr r4, 0 - mvtc r4, bbpc - - ; bpc = 42 - mvaddr_h_gr r4, 42 - mvtc r4, bpc - - ; Copy trap2_handler to trap area of memory. - ld24 r0,#0x48 ; address of trap 2 handler - ld24 r1,#trap2_handler - ld r2,@r1 - st r2,@r0 - ; Set up return address. - ld24 r5,#trap2_ret1 - -trap_insn1: - trap #2 - fail - -trap2_ret1: - ; test bbsm = 1, bbie = 1, bbcond = 1 - mvfc r4, cr8 - test_h_gr r4, 0xc1 - - ; test bsm = 0, bie = 0, bcond = 0, sm = 0, ie = 0, cond = 0 - mvfc r4, cr0 - test_h_gr r4, 0 - - ; test bbpc = 42 - mvfc r4, bbpc - test_h_gr r4, 42 - - ; test bpc = proper return address - mvfc r4, bpc - test_h_gr r4, trap_insn1 + 4 - -; Test 2: bbpsw = 1, bpsw = 0, psw = 1 - - ; bbsm = 1, bie = 1, bbcond = 1 - mvi_h_gr r4, 0xc1 - mvtc r4, cr8 - - ; bsm = 0, bie = 0, bcond = 0, sm = 1, ie = 1, cond = 1 - mvi_h_gr r4, 0xc1 - mvtc r4, cr0 - - ; bbpc = 42 - mvaddr_h_gr r4, 42 - mvtc r4, bbpc - - ; bpc = 0 - mvaddr_h_gr r4, 0 - mvtc r4, bpc - - ; Set up return address. - ld24 r5,#trap2_ret2 - -trap_insn2: - trap #2 - fail - -trap2_ret2: - ; test bbsm = 0, bbie = 0, bbcond = 0 - mvfc r4, cr8 - test_h_gr r4, 0 - - ; test bsm = 1, bie = 1, bcond = 1, sm = 1, ie = 0, cond = 0 - mvfc r4, cr0 - test_h_gr r4, 0xc180 - - ; test bbpc = 0 - mvfc r4, bbpc - test_h_gr r4, 0 - - ; test bpc = proper return address - mvfc r4, bpc - test_h_gr r4, trap_insn2 + 4 - - pass - - .data - -; Don't use rte as it will undo the effects of trap we're testing. - - .p2align 2 -trap2_handler: - jmp r5 - nop diff --git a/sim/testsuite/sim/m32r/unlock.cgs b/sim/testsuite/sim/m32r/unlock.cgs deleted file mode 100644 index 1a51b7ae4cf..00000000000 --- a/sim/testsuite/sim/m32r/unlock.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# m32r testcase for unlock $src1,@$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global unlock -unlock: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 1 - - lock r5, @r4 - - mvi_h_gr r5, 2 - unlock r5, @r4 - - ld r6, @r4 - test_h_gr r6, 2 - - mvi_h_gr r5, 0 - unlock r5, @r4 ; This should be a nop since the processor should be unlocked. - - ld r6, @r4 - test_h_gr r6, 2 - - pass - -data_loc: - .word 0 diff --git a/sim/testsuite/sim/m32r/uread16.ms b/sim/testsuite/sim/m32r/uread16.ms deleted file mode 100644 index 550e99a2dfc..00000000000 --- a/sim/testsuite/sim/m32r/uread16.ms +++ /dev/null @@ -1,18 +0,0 @@ -# mach: m32r m32rx -# xerror: -# output: *misaligned read* - - .include "testutils.inc" - - start - -; construct bra trap2_handler in trap 2 slot - ld24 r0,#foo+1 - ldh r0,@r0 - fail - exit 0 - -.data - .p2align 2 -foo: - .short 42 diff --git a/sim/testsuite/sim/m32r/uread32.ms b/sim/testsuite/sim/m32r/uread32.ms deleted file mode 100644 index 935c71624e4..00000000000 --- a/sim/testsuite/sim/m32r/uread32.ms +++ /dev/null @@ -1,18 +0,0 @@ -# mach: m32r m32rx -# xerror: -# output: *misaligned read* - - .include "testutils.inc" - - start - -; construct bra trap2_handler in trap 2 slot - ld24 r0,#foo+1 - ld r0,@r0 - fail - exit 0 - -.data - .p2align 2 -foo: - .word 42 diff --git a/sim/testsuite/sim/m32r/uwrite16.ms b/sim/testsuite/sim/m32r/uwrite16.ms deleted file mode 100644 index 11bfd6ee2a9..00000000000 --- a/sim/testsuite/sim/m32r/uwrite16.ms +++ /dev/null @@ -1,18 +0,0 @@ -# mach: m32r m32rx -# xerror: -# output: *misaligned write* - - .include "testutils.inc" - - start - -; construct bra trap2_handler in trap 2 slot - ld24 r0,#foo+1 - sth r0,@r0 - fail - exit 0 - -.data - .p2align 2 -foo: - .short 42 diff --git a/sim/testsuite/sim/m32r/uwrite32.ms b/sim/testsuite/sim/m32r/uwrite32.ms deleted file mode 100644 index 495a123b60e..00000000000 --- a/sim/testsuite/sim/m32r/uwrite32.ms +++ /dev/null @@ -1,18 +0,0 @@ -# mach: m32r m32rx -# xerror: -# output: *misaligned write* - - .include "testutils.inc" - - start - -; construct bra trap2_handler in trap 2 slot - ld24 r0,#foo+1 - st r0,@r0 - fail - exit 0 - -.data - .p2align 2 -foo: - .word 42 diff --git a/sim/testsuite/sim/m32r/xor.cgs b/sim/testsuite/sim/m32r/xor.cgs deleted file mode 100644 index 254da798167..00000000000 --- a/sim/testsuite/sim/m32r/xor.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# m32r testcase for xor $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global xor -xor: - - mvi_h_gr r4, 3 - mvi_h_gr r5, 6 - xor r4, r5 - test_h_gr r4, 5 - - pass diff --git a/sim/testsuite/sim/m32r/xor3.cgs b/sim/testsuite/sim/m32r/xor3.cgs deleted file mode 100644 index eee7269f934..00000000000 --- a/sim/testsuite/sim/m32r/xor3.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# m32r testcase for xor3 $dr,$sr,#$uimm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global xor3 -xor3: - - mvi_h_gr r5, 0 - mvi_h_gr r4, 3 - xor3 r5, r4, #6 - test_h_gr r5, 5 - - pass |