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-rw-r--r--sim/testsuite/sim/sh64/compact/addc.cgs90
1 files changed, 90 insertions, 0 deletions
diff --git a/sim/testsuite/sim/sh64/compact/addc.cgs b/sim/testsuite/sim/sh64/compact/addc.cgs
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+# sh testcase for addc $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+ .include "compact/testutils.inc"
+
+ # Initialise some registers with values which help us to verify
+ # that the correct source registers are used by the ADDC instruction.
+
+ .macro init
+ mov #0, r0
+ mov #1, r1
+ mov #2, r2
+ mov #3, r3
+ mov #5, r5
+ mov #15, r15
+ .endm
+
+ start
+
+ init
+add:
+ clrt
+ addc r0, r0
+ assert r0, #0
+ clrt
+ addc r0, r1
+ assert r1, #1
+ clrt
+ addc r1, r2
+ assert r2, #3
+ clrt
+ addc r3, r5
+ assert r5, #8
+ clrt
+ addc r5, r5
+ assert r5, #16
+ clrt
+ addc r15, r1
+ assert r1, #16
+
+ init
+addt:
+ sett
+ addc r0, r0
+ assert r0, #1
+ sett
+ addc r0, r1
+ assert r1, #3
+ sett
+ addc r1, r2
+ assert r2, #6
+ sett
+ addc r3, r5
+ assert r5, #9
+ sett
+ addc r5, r5
+ assert r5, #19
+ sett
+ addc r15, r1
+ assert r1, #19
+
+ bra next
+ nop
+
+wrong:
+ fail
+
+next:
+ init
+large:
+ clrt
+ mov #1, r0
+ neg r0, r0
+ mov #2, r1
+ addc r0, r1
+ assert r1, #1
+
+ init
+larget:
+ sett
+ mov #1, r0
+ neg r0, r0
+ mov #2, r1
+ addc r0, r1
+ assert r1, #2
+
+okay:
+ pass