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* * common.h (DT_HIOS): Correct value.Alan Modra2003-12-061-0/+5
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* Add support for the M32R2 processor.Nick Clifton2003-12-031-0/+4
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* * ppc.h (R_PPC_RELAX32PC): Define.Alan Modra2003-11-061-5/+9
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* * sh.h (EF_SH4A, EF_SH4AL_DSP, EF_SH4_NOFPU, EF_SH4A_NOFPU): New.Corinna Vinschen2003-10-231-0/+6
| | | | (EF_SH_MERGE_MACH): Combine them.
* * mmix.h (R_MMIX_PUSHJ_STUBBABLE): New reloc number.Hans-Peter Nilsson2003-10-181-0/+8
| | | | | | | (_bfd_mmix_before_linker_allocation): Rename from _bfd_mmix_prepare_linker_allocated_gregs. (_bfd_mmix_after_linker_allocation): Rename from _bfd_mmix_finalize_linker_allocated_gregs.
* 2003-10-06 Dave Brolley <brolley@redhat.com>Dave Brolley2003-10-081-0/+4
| | | | * frv.h (EF_FRV_CPU_FR550): New macro.
* [ bfd/ChangeLog ]Chris Demetriou2003-09-301-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.
* * sh.h (R_SH_SWITCH8, R_SH_GNU_VTINHERIT, R_SH_GNU_VTENTRY,DJ Delorie2003-09-241-0/+8
| | | | | | | | | | | | | | | | R_SH_LOOP_START,R_SH_LOOP_END): Move to "reserved" spaces. (R_SH_DIR16, R_SH_DIR8, R_SH_DIR8UL, R_SH_DIR8UW, R_SH_DIR8U, R_SH_DIR8SW, R_SH_DIR8S, R_SH_DIR4UL, R_SH_DIR4UW, R_SH_DIR4U, R_SH_PSHA, R_SH_PSHL): New. * elf32-sh.c (sh_elf_howto_table): R_SH_SWITCH8, R_SH_GNU_VTINHERIT, R_SH_GNU_VTENTRY, R_SH_LOOP_START,R_SH_LOOP_END moved to "reserved" spaces, R_SH_DIR16, R_SH_DIR8, R_SH_DIR8UL, R_SH_DIR8UW, R_SH_DIR8U, R_SH_DIR8SW, R_SH_DIR8S, R_SH_DIR4UL, R_SH_DIR4UW, R_SH_DIR4U, R_SH_PSHA, R_SH_PSHL added. (sh_reloc_map): Add R_SH_DIR16 and R_SH_DIR8. (sh_elf_relocate_section): Support new relocs.
* Add enum values for HP extensions to DWARF standardNick Clifton2003-09-111-0/+5
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* Add binutils support for v850e1 processorNick Clifton2003-09-041-0/+4
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* Add PGI extensionscagney_x86i386-20030821-branchpointNick Clifton2003-08-211-0/+4
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* Add MSP430 variantsNick Clifton2003-08-081-0/+5
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* Convert to C90.Alan Modra2003-08-071-4/+6
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* 2003-07-28 Eric Christopher <echristo@redhat.com>Eric Christopher2003-07-291-0/+4
| | | | | | | | | | | | | * elf32-ppc.c (R_PPC_RELAX32): New relocation. (ppc_elf_install_value): New function. (ppc_elf_sort_rela): Remove. (ppc_elf_relax_section): Rewrite. Remove old relaxation and replace with out of range branch stubs. (ppc_elf_relocate_section): Handle R_PPC_RELAX32. 2003-07-28 Eric Christopher <echristo@redhat.com> * ppc.h (R_PPC_RELAX32): New. Fake relocation.
* bfd/H.J. Lu2003-07-251-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2003-07-25 H.J. Lu <hongjiu.lu@intel.com> * elf-bfd.h (bfd_elf_special_section): New. (elf_backend_data): Add special_sections, a pointer to bfd_elf_special_section. (elf_section_type). New. (elf_section_flags): New. (_bfd_elf_get_sec_type_attr): New. * elf.c (_bfd_elf_make_section_from_shdr): Always use the real section type/flags. (special_sections): New. (get_special_section): New. (_bfd_elf_get_sec_type_attr): New. (_bfd_elf_new_section_hook): Check special_section to set elf_section_type and elf_section_flags. (elf_fake_sections): Don't use section name to set ELF section data. * elf32-m32r.c (m32r_elf_special_sections): New. (elf_backend_special_sections): Defined. * elf32-m68hc11.c (elf32_m68hc11_special_sections): New. (elf_backend_special_sections): Defined. * elf32-mcore.c (mcore_elf_special_sections): New. (elf_backend_special_sections): Defined. * elf32-ppc.c (ppc_elf_special_sections): New. (elf_backend_special_sections): Defined. * elf32-sh64.c (sh64_elf_special_sections): New. (elf_backend_special_sections): Defined. * elf32-v850.c (v850_elf_special_sections): New. (elf_backend_special_sections): Defined. * elf32-xtensa.c (elf_xtensa_special_sections): New. (elf_backend_special_sections): Defined. * elf64-alpha.c (elf64_alpha_special_sections): New. (elf_backend_special_sections): Defined. * elf64-hppa.c (elf64_hppa_special_sections): New. (elf_backend_special_sections): Defined. * elf64-ppc.c (ppc64_elf_special_sections): New. (elf_backend_special_sections): Defined. * elf64-sh64.c (sh64_elf64_special_sections): New. (elf_backend_special_sections): Defined. * elfxx-ia64.c (elfNN_ia64_special_sections): New. (elf_backend_special_sections): Defined. * elfxx-mips.c (_bfd_mips_elf_special_sections): New. * elfxx-mips.h (_bfd_mips_elf_special_sections): New. (elf_backend_special_sections): Defined. * elfxx-target.h (elf_backend_special_sections): New. Default to NULL. (elfNN_bed): Initialize special_sections. * section.c (bfd_abs_section): Remove const. (bfd_und_section): Likewise. (bfd_com_section): Likewise. (bfd_ind_section): Likewise. gas/ 2003-07-25 H.J. Lu <hongjiu.lu@intel.com> * config/obj-elf.c (special_sections): Removed. (obj_elf_change_section): Call _bfd_elf_get_sec_type_attr. Set elf_section_type and elf_section_flags. (elf_frob_file): Set SHT_GROUP. * config/obj-elf.h (obj_sec_set_private_data): New. * config/tc-alpha.h (ELF_TC_SPECIAL_SECTIONS): Removed. * config/tc-ia64.h: Likewise. * config/tc-m32r.h: Likewise. * config/tc-m68hc11.h: Likewise. * config/tc-mcore.h: Likewise. * config/tc-mips.h: Likewise. * config/tc-ppc.h: Likewise. * config/tc-sh64.h: Likewise. * config/tc-v850.h: Likewise. * config/tc-xtensa.h: Likewise. * config/tc-v850.h (SHF_V850_GPREL): Removed. (SHF_V850_EPREL): Likewise. (SHF_V850_R0REL): Likewise. * subsegs.c (subseg_get): Call obj_sec_set_private_data if it is defined. include/elf/ 2003-07-25 H.J. Lu <hongjiu.lu@intel.com> * v850.h (SHF_V850_GPREL): New. (SHF_V850_EPREL): Likewise. (SHF_V850_R0REL): Likewise.
* 2001-05-16 Alexandre Oliva <aoliva@redhat.com>Alexandre Oliva2003-07-101-0/+12
| | | | | | | | | | | * mn10300.h: Introduce GOTPC16, GOTOFF24, GOTOFF16 and PLT16, and rename GOTPC to GOTPC32 and GOTOFF to GOTOFF32. Renumbered all relocs. 2001-04-12 Alexandre Oliva <aoliva@redhat.com> * mn10300.h (R_MN10300_GOTPC, R_MN10300_GOTOFF, R_MN10300_PLT32, R_MN10300_GOT32, R_MN10300_GOT24, R_MN10300_GOT16, R_MN10300_COPY, R_MN10300_GLOB_DAT, R_MN10300_JMP_SLOT, R_MN10300_RELATIVE): New relocs.
* 2000-04-01 Alexandre Oliva <aoliva@cygnus.com>Alexandre Oliva2003-07-101-0/+8
| | | | | | | * mn10300.h (E_MN10300_MACH_AM33_2): Renamed from E_MN10300_MACH_AM332. 2000-03-31 Alexandre Oliva <aoliva@cygnus.com> * mn10300.h (E_MN10300_MACH_AM332): Defined.
* * s390.h (elf_s390_reloc_type): Add long displacement relocationsMartin Schwidefsky2003-07-011-0/+5
| | | | R_390_20, R_390_GOT20, R_390_GOTPLT20 and R_390_TLS_GOTIE20.
* * mmix.h: Convert to ISO C90 prototypes.Andreas Jaeger2003-06-291-1/+10
| | | | | | | | * mips.h: Likewise. * reloc-macros.h (START_RELOC_NUMBERS): Convert to ISO C90 prototype. (RELOC_NUMBER): Remove !__STDC__ code.
* (GNU_ABI_TAG_NETBSD): New tag.Nick Clifton2003-06-131-0/+5
| | | | (GNU_ABI_TAG_FREEBSD): New tag.
* include/elf/Richard Sandiford2003-06-101-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | * h8.h (E_H8_MACH_H8300SXN): New flag. bfd/ * archures.c (bfd_mach_h8300sxn): New architecture. * bfd-in2.h: Regenerate. * cpu-h8300.c (h8300_scan): Check for 'sxn'. (h8300sxn_info_struct): New. (h8300sx_info_struct): Link to it. * elf32-h8300.c (elf32_h8_mach): Add h8300sxn case. (elf32_h8_final_write_processing): Likewise. gas/ * config/tc-h8300.c (h8300sxnmode): New. (md_pseudo_table): Add .h8300sxn entry. Sync others with FSF version. ld/ * configure.tgt (h8300*): Add h8300sxn emulations. * Makefile.am (ALL_EMULATIONS): Add eh8300sxn.o and eh8300sxnelf.o. (eh8300sxn.c, eh8300sxnelf.c): New rules. * Makefile.in: Regenerate. * emulparams/h8300sxnelf.sh, emulparams/h8300sxn.sh: New files.
* Add pc-relative 32-bit reloc to v850 port. Fixes ld-elf/merge test failure.Nick Clifton2003-06-031-0/+5
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* .Roland McGrath2003-05-211-2/+8
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* 2003-05-14 Michael Snyder <msnyder@redhat.com>Michael Snyder2003-05-161-0/+4
| | | | | From Bernd Schmidt <bernds@redhat.com> * h8.h (E_H8_MACH_H8300SX): New.
* Add support for h8300hn and h8300snNick Clifton2003-04-241-0/+4
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* bfd:Joern Rennecke2003-04-231-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | * archures.c (enum bfd_architecture): Amend comment to refer to SuperH. * cpu-sh.c: Likewise. * elf32-sh.c: Likewise. * reloc.c (bfd_reloc_code_real): Likewise. * elf32-sh64-com.c: Change comment to refer to SuperH. * elf32-sh64.c: Likewise. * elf64-sh64.c: Likewise. * bfd-in2.h (enum bfd_architecture): Regenerate. binutils: * readelf.c (get_machine_name) <EM_SH>: Amend return value to refer to SuperH. gas: * config/tc-sh.c: Amend comment to refer to SuperH. * config/tc-sh.h: Likewise. (LISTING_HEADER): Amend to refer to SuperH. * config/tc-sh64.c: Change comment to refer to SuperH. * config/tc-sh64.h (LISTING_HEADER): Change to refer to SuperH. * doc/as.texinfo [SH, GENERIC]: Amend / Change to refer to SuperH. * doc/c-sh.texi: Amend to refer to SuperH. Add SuperH architecture documentation references. * doc/c-sh64.texi: Change to refer to SuperH. include/elf: * common.h (EM_SH): Amend comment to refer to SuperH. ld/testsuite: * ld-sh/sh64/crange3-cmpct.rd (Machine): Change to refer to SuperH. * ld-sh/sh64/crange3-media.rd (Machine): Likewise.
* Replace references to Mitsubishi M32R with references to Renesas M32R.Nick Clifton2003-04-221-0/+5
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* Replace occurrances of 'Hitachi' with 'Renesas'.Nick Clifton2003-04-151-0/+4
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* Add Xtensa portNick Clifton2003-04-011-0/+5
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* Fixes for iWMMXt contribution.Nick Clifton2003-04-011-0/+4
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* Add iWMMXt supportNick Clifton2003-03-251-1/+8
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* Fix sh-elf linker relaxation:Joern Rennecke2003-03-031-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc: * config/sh/sh.h (EXTRA_SPECS): Add subtarget_asm_relax_spec and subtarget_asm_isa_spec. (SUBTARGET_ASM_RELAX_SPEC, SUBTARGET_ASM_ISA_SPEC): Define. (ASM_SPEC): Define as SH_ASM_SPEC. (SH_ASM_SPEC): New; take the role of ASM_SPEC, but safe from svr4.h. Use subtarget_asm_relax_spec and subtarget_asm_isa_spec. * config/sh/elf.h (ASM_SPEC): Use SH_ASM_SPEC. (SUBTARGET_ASM_ISA_SPEC): Undef / define. gcc/testsuite: gcc.dg/sh-relax.c: New test. include/elf: * sh.h (EF_SH_MERGE_MACH): Make sure SH2E & SH3/SH3E merge to SH3E, and SH2E & SH4 merge to SH4, not SH2E. gas: * config/tc-sh.c (sh_dsp): Replace with preset_target_arch. (md_begin): Use preset_target_arch. (md_longopts): Make isa option unconditional. (md_parse_option): Make OPTION_DSP and OPTION_ISA sh4 / any set preset_target_arch. (md_apply_fix3): If BFD_ASSEMBLER, adjust SWITCH_TABLE fixups by -S_GET_VALUE (fixP->fx_subsy). (tc_gen_reloc): For SWITCH_TABLE fixups, the symbol is fixp->fx_subsy, and the addend is 0. Adjust addend of R_SH_IND12W relocations by fixp->fx_offset - 4. * config/tc-sh.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define. bfd: elf32-sh.c (sh_elf_howto_tab): Make R_SH_IND12W into an ordinary relocation (no special function), and make it non-partial_inplace. (sh_elf_relax_section): When creating a bsr, use a consistent value no matter if the symbol is extern or not; set addend to -4. Don't swap load / non-load instructions for SH4. (sh_elf_relax_delete_bytes): In R_SH_IND12W case, check the offset rather than if the symbol is external to determine if adjusting the offset makes sense. Adjust the addend too if appropriate. (sh_elf_relocate_section): In R_SH_IND12W, don't fiddle with the relocation.
* Add SHT_IA_64_LOPSREG, SHT_IA_64_HIPSREG and SHT_IA_64_PRIORITY_INIT.Nick Clifton2003-02-211-0/+5
| | | | Add code to display these values in readelf.
* * ppc64.h (IS_PPC64_TLS_RELOC): Rename from IS_TLS_RELOC.Alan Modra2003-02-181-0/+2
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* * ppc.h: Replace DTPMOD64, TPREL64, DTPREL64 with DTPMOD32 etc.Alan Modra2003-02-181-0/+5
| | | | (IS_PPC_TLS_RELOC): Define.
* Add support for marking ARM ELF binaries as support the Cirrus EP9312 Maverickw32api-2_2Nick Clifton2003-02-101-0/+4
| | | | floating point co-processor.
* * ppc.h: Add TLS relocs. Format.Alan Modra2003-02-041-0/+5
| | | | * ppc64.h: Likewise.
* * mips.h (EF_MIPS_XGOT): Define.Alexandre Oliva2003-01-281-0/+4
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* * s390.h: Add s390 TLS relocations.Martin Schwidefsky2003-01-241-0/+4
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* Add SH2E supportNick Clifton2003-01-231-0/+12
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* include/elf/ChangeLogAlan Modra2003-01-231-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * sh.h: Split out various bits to bfd/elf32-sh64.h. include/opcode/ChangeLog * m68hc11.h (cpu6812s): Define. bfd/ChangeLog * elf-bfd.h (struct bfd_elf_section_data): Remove tdata. Change dynindx to an int. Rearrange for better packing. * elf.c (_bfd_elf_new_section_hook): Don't alloc if already done. * elf32-mips.c (bfd_elf32_new_section_hook): Define. * elf32-sh64.h: New. Split out from include/elf/sh.h. (struct _sh64_elf_section_data): New struct. (sh64_elf_section_data): Don't dereference sh64_info (was tdata). * elf32-sh64-com.c: Include elf32-sh64.h. * elf32-sh64.c: Likewise. (sh64_elf_new_section_hook): New function. (bfd_elf32_new_section_hook): Define. (sh64_elf_fake_sections): Adjust for sh64_elf_section_data change. (sh64_bfd_elf_copy_private_section_data): Likewise. (sh64_elf_final_write_processing): Likewise. * elf32-sparc.c (struct elf32_sparc_section_data): New. (elf32_sparc_new_section_hook): New function. (SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete. (sec_do_relax): Define. (elf32_sparc_relax_section): Adjust to use sec_do_relax. (elf32_sparc_relocate_section): Likewise. * elf64-mips.c (bfd_elf64_new_section_hook): Define. * elf64-mmix.c (struct _mmix_elf_section_data): New. (mmix_elf_section_data): Define. Use throughout file. (mmix_elf_new_section_hook): New function. (bfd_elf64_new_section_hook): Define. * elf64-ppc.c (struct _ppc64_elf_section_data): New. (ppc64_elf_section_data): Define. Use throughout. (ppc64_elf_new_section_hook): New function. (bfd_elf64_new_section_hook): Define. * elf64-sparc.c (struct sparc64_elf_section_data): New. (sparc64_elf_new_section_hook): New function. (SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete. (sec_do_relax): Define. (sparc64_elf_relax_section): Adjust to use sec_do_relax. (sparc64_elf_relocate_section): Likewise. (bfd_elf64_new_section_hook): Define. * elfn32-mips.c (bfd_elf32_new_section_hook): Define. * elfxx-mips.c (struct _mips_elf_section_data): New. (mips_elf_section_data): Define. Use throughout. (_bfd_mips_elf_new_section_hook): New function. (mips_elf_create_got_section): Don't alloc used_by_bfd. * elfxx-mips.h (_bfd_mips_elf_new_section_hook): Declare. * elfxx-target.h (bfd_elfNN_new_section_hook): Add #ifndef. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. opcodes/ChangeLog * sh64-dis.c: Include elf32-sh64.h. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. gas/ChangeLog * config/tc-sh64.c (shmedia_frob_section_type): Adjust for changed sh64_elf_section_data. * config/tc-sh64.h: Include elf32-sh64.h. * config/tc-m68hc11.c: Don't include stdio.h. (md_show_usage): Fix missing continuation. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. ld/ChangeLog * emultempl/sh64elf.em: Include elf32-sh64.h. (sh64_elf_${EMULATION_NAME}_before_allocation): Adjust for changed sh64_elf_section_data. (sh64_elf_${EMULATION_NAME}_after_allocation): Likewise.
* * s390.h: Rename R_390_GOTOFF to R_390_GOTOFF32. Add new gotoff,Martin Schwidefsky2003-01-201-0/+5
| | | | gotplt and pltoff relocations.
* missed changelog entryAlan Modra2003-01-171-1/+1
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* * common.h: Formatting, typo fixes.Alan Modra2003-01-171-6/+17
| | | | | | | | (DT_ENCODING): Correct value. * common.h (ELFOSABI_AROS): Define. (ELFOSABI_OPENVMS): Likewise. (ELFOSABI_NSK): Likewise.
* * ppc.h: Split out ppc64 definitions to..Alan Modra2003-01-161-0/+6
| | | | | * pcc64.h: ..here. New file. (R_PPC64_REL30): Rename from R_PPC64_ADDR30.
* Change EM_MSP430 value to new, officially assigned number.Nick Clifton2003-01-131-1/+6
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* * dis-asm.h (print_insn_iq2000): Declare.Stan Cox2003-01-031-0/+5
| | | | | * common.h (EM_IQ2000): Define. * iq2000.h: New file.
* [ bfd/ChangeLog ]Chris Demetriou2002-12-311-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2002-12-30 Chris Demetriou <cgd@broadcom.com> * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate.
* Add support for msp430.Nick Clifton2002-12-301-0/+5
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* * xstormy16.h: Add XSTORMY16_12.DJ Delorie2002-12-201-0/+4
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