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* Fix ia64 gas testsuite. Update ia64 DV tables. Fix ia64 gas testsuite again.Jim Wilson2000-09-222-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | gas/ChangeLog * config/tc-ia64.c (dv_sem): Add "stop". (specify_resource, case IA64_RS_PR): Only handles regs 1 to 15 now. (specify_resource, case IA64_RS_PRr): New for regs 16 to 62. (specify_resource, case IA64_RS_PR63): Reorder (note == 7) test to match above. (mark_resources): Check IA64_RS_PRr. gas/testsuite/ChangeLog * gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/dv-imply.d: Regenerate. * gas/ia64/dv-mutex.d, gas/ia64/dv-raw-err.l, gas/ia64/dv-safe.d, gas/ia64/dv-srlz.d, gas/ia64/dv-war-err.l, gas/ia64/dv-waw-err.l, gas/ia64/opc-f.d, gas/ia64/opc-i.d, gas/ia64/opc-m.d: Likewise. include/opcode/ChangeLog * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP. opcodes/ChangeLog * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change. * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP. (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62". * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update. * ia64-asmtab.c: Regnerate.
* * sh.h (R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT,Alexandre Oliva2000-09-142-9/+20
| | | | | | | | R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): Change numbers to the range from 160 to 167. (R_SH_FIRST_INVALID_RELOC): Adjust. (R_SH_FIRST_INVALID_RELOC_2, R_SH_LAST_INVALID_RELOC_2): New relocs to fill in the gap.
* Add support for the MIPS32Nick Clifton2000-09-144-18/+65
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* * dyn-string.h: Adjust formatting.Christopher Faylor2000-09-082-4/+9
| | | | (dyn_string_insert_char): New macro. New declaration.
* * md5.h (md5_uint32): Choose via INT_MAX instead of UINT_MAX.Christopher Faylor2000-09-082-0/+150
| | | | * md5.h: New file.
* doco addition.Alan Modra2000-09-052-1/+7
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* Add some reloc types.Alan Modra2000-09-052-1/+14
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* Add ARRAY_SIZE macro from egcs versionNick Clifton2000-09-032-0/+6
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* Fix formatting, add copyright noticeNick Clifton2000-09-032-46/+66
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* * sh.h (R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT,Alexandre Oliva2000-09-022-1/+15
| | | | | R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): New relocs. (R_SH_FIRST_INVALID_RELOC): Adjust.
* Fix 3 DV bugs, and a few minor cleanups.Jim Wilson2000-08-162-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | gas/ * config/tc-ia64.c (specify_resource, case IA64_RS_GR): Handle postincrement modified registers. Handle IA64_OPND_R3_2 addl source registers. (note_register_values): Handle IA64_OPND_R3_2 operands. gas/testsuite/ * gas/ia64/dv-raw-err.s: Add new tests for addl and postinc. * gas/ia64/dv-raw-err.l: Likewise. * gas/ia64/dv-waw-err.l: Update sed pattern. * gas/ia64/opc-f.pl: Delete fpsub, and fpadd comment. * gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate. include/opcode/ * ia64.h (IA64_OPCODE_POSTINC): New. opcodes/ * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete break, mov-immediate, nop. * ia64-opc-f.c: Delete fpsub instructions. * ia64-opc-m.c: Add POSTINC to all instructions with postincrement address operand. Rewrite using macros to avoid long lines. * ia64-opc.h (POSTINC): Define. * ia64-asmtab.c: Regenerate.
* 2000-08-15 H.J. Lu <hjl@gnu.org>H.J. Lu2000-08-162-2/+7
| | | | | * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the IgnoreSize change.
* Add support for IA-64 specific elf header flags.Jim Wilson2000-08-142-1/+13
| | | | | | | | | | | | | | | | | | bfd/ 2000-08-14 Jim Wilson <wilson@cygnus.com> * elf64-ia64.c (elf64_ia64_merge_private_bfd_data): Handle EF_IA_64_REDUCEDFP, EF_IA_64_CONS_GP, and EF_IA_64_NOFUNCDESC_CONS_GP. (elf64_ia64_print_private_bfd_data): Likewise. Also handle EF_IA_64_ABSOLUTE. gas/ 2000-08-14 Jim Wilson <wilson@cygnus.com> * config/tc-ia64.c (md_longopts): Add -mconstant-gp and -mauto-pic. (md_parse_option): Add OPTION_MCONSTANT_GP and OPTION_MAUTO_PIC. (md_begin): Change assignment to md.flag to OR in the new bit. include/elf/ 2000-08-14 Jim Wilson <wilson@cygnus.com> * elf/ia64.h (EF_IA_64_REDUCEDFP, EF_IA_64_CONS_GP, EF_IA_64_NOFUNCDESC_CONS_GP, EF_IA_64_ABSOLUTE): Define.
* gas:Jason Eckhardt2000-08-092-29/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2000-08-08 Jason Eckhardt <jle@cygnus.com> * config/tc-i860.h: Rework completely for BFD_ASSEMBLER. (i860_fix_info): New enum. (MD_APPLY_FIX3): Define. (WORKING_DOT_WORD): Define. (TC_HANDLES_FX_DONE): Define. (DIFF_EXPR_OK): Define. (LISTING_HEADER): Define. (TARGET_FORMAT): Select target format based on endian flag. (TARGET_BYTES_BIG_ENDIAN): Default to little endian. (target_big_endian): Add external declaration. * config/tc-i860.c: All existing code reworked completely. Other new code shown below. (SYNTAX_SVR4): Define. (target_warn_expand): New variable. (md_shortopts): Declare and define (-Qy, -Qn, and -V options). (md_longopts): Declare and define with new options (-EL, -EB, and -mwarn-expand). (md_show_usage): New function. (md_operand): New function. (obtain_reloc_for_imm16): New function. (md_apply_fix3): New function. (tc_gen_reloc): New function. include: 2000-08-08 Jason Eckhardt <jle@cygnus.com> * opcode/i860.h: Small formatting adjustments. opcode: 2000-08-08 Jason Eckhardt <jle@cygnus.com> * i860-dis.c (print_br_address): Change third argument from int to long. bfd: 2000-08-08 Jason Eckhardt <jle@cygnus.com> * elf32-i860.c (elf32_i860_howto_table): Updated some fields.
* Remove spurious CYGNUS LOCAL commentsNick Clifton2000-08-073-8/+10
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* * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.Denis Chertykov2000-08-062-24/+79
| | | | | Move related opcodes closer to each other. Minor changes in comments, list undefined opcodes.
* Fix formattingNick Clifton2000-07-292-73/+90
| | | | Add copyright notice
* 2000-07-22 Jason Eckhardt <jle@cygnus.com>Jason Eckhardt2000-07-281-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | * opcode/i860.h (btne, bte, bla): Changed these opcodes to use sbroff ('r') instead of split16 ('s'). (J, K, L, M): New operand types for 16-bit aligned fields. (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to use I, J, K, L, M instead of just I. (T, U): New operand types for split 16-bit aligned fields. (st.x): Changed these opcodes to use S, T, U instead of just S. (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not exist on the i860. (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. (pfeq.ss, pfeq.dd): New opcodes. (st.s): Fixed incorrect mask bits. (fmlow): Fixed incorrect mask bits. (fzchkl, pfzchkl): Fixed incorrect mask bits. (faddz, pfaddz): Fixed incorrect mask bits. (form, pform): Fixed incorrect mask bits. (pfld.l): Fixed incorrect mask bits. (fst.q): Fixed incorrect mask bits. (all floating point opcodes): Fixed incorrect mask bits for handling of dual bit. * elf/i860.h: New file. (elf_i860_reloc_type): Defined ELF32 i860 relocations. * dis-asm.h (print_insn_i860): Add prototype.
* 2000-07-22 Jason Eckhardt <jle@cygnus.com>Jason Eckhardt2000-07-283-300/+373
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * include/opcode/i860.h (btne, bte, bla): Changed these opcodes to use sbroff ('r') instead of split16 ('s'). (J, K, L, M): New operand types for 16-bit aligned fields. (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to use I, J, K, L, M instead of just I. (T, U): New operand types for split 16-bit aligned fields. (st.x): Changed these opcodes to use S, T, U instead of just S. (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not exist on the i860. (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. (pfeq.ss, pfeq.dd): New opcodes. (st.s): Fixed incorrect mask bits. (fmlow): Fixed incorrect mask bits. (fzchkl, pfzchkl): Fixed incorrect mask bits. (faddz, pfaddz): Fixed incorrect mask bits. (form, pform): Fixed incorrect mask bits. (pfld.l): Fixed incorrect mask bits. (fst.q): Fixed incorrect mask bits. (all floating point opcodes): Fixed incorrect mask bits for handling of dual bit. * include/elf/i860.h: New file. (elf_i860_reloc_type): Defined ELF32 i860 relocations. * bfd/cpu-i860.c: Added comments. * bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to bfd_elf32_i860_little_vec. (TARGET_LITTLE_NAME): Defined to "elf32-i860-little". (ELF_MAXPAGESIZE): Changed to 4096. * bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of new target. (bfd_target_vector): Added bfd_elf32_i860_little_vec. * bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added config for little endian elf32 i860. (targ_defvec): Define for the new config above as "bfd_elf32_i860_little_vec". (targ_selvecs): Define for the new config above as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec" * bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition of new target vec. * bfd/configure: Regenerated. * opcodes/i860-dis.c: New file. (print_insn_i860): New function. (print_br_address): New function. (sign_extend): New function. (BITWISE_OP): New macro. (I860_REG_PREFIX): New macro. (grnames, frnames, crnames): New structures. * opcodes/disassemble.c (ARCH_i860): Define. (disassembler): Add check for bfd_arch_i860 to set disassemble function to print_insn_i860. * include/dis-asm.h (print_insn_i860): Add prototype. * opcodes/Makefile.in (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences. * opcodes/configure.in: New bits for bfd_i860_arch. * opcodes/configure: Regenerated.
* 2000-07-26 Dave Brolley <brolley@redhat.com>Dave Brolley2000-07-262-1/+5
| | | | * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
* 2000-07-20 H.J. Lu <hjl@gnu.org>H.J. Lu2000-07-202-0/+7
| | | | * bfdlink.h (bfd_link_info): Add new_dtags.
* merge with gccJason Merrill2000-07-202-24/+123
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* common.h (EM_CRIS): New machine number.Hans-Peter Nilsson2000-07-203-0/+50
| | | | cris.h: New file.
* cris.h: New file.Hans-Peter Nilsson2000-07-202-0/+302
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* * dis-asm.h (print_insn_cris): Declare.Hans-Peter Nilsson2000-07-202-0/+5
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* 2000-07-19 H.J. Lu (hjl@gnu.org)H.J. Lu2000-07-202-0/+10
| | | | * bfdlink.h (bfd_link_info): Add flags and flags_1.
* 2000-07-19 H.J. Lu <hjl@gnu.org>H.J. Lu2000-07-192-1/+5
| | | | * common.h (DF_1_NODEFLIB): Renamed from DF_1_NODEPLIB.
* 2000-07-19 H.J. Lu <hjl@gnu.org>H.J. Lu2000-07-192-11/+9
| | | | | * common.h (DT_CHECKSUM): Set to 0x6ffffdf8. (DTF_1_CONFEXP): It is 0x00000002 as suspected.
* 2000-07-19 H.J. Lu <hjl@gnu.org>H.J. Lu2000-07-192-2/+40
| | | | | | | | | | | | | | * common.h (DT_FEATURE): Renamed from DT_FEATURE_1. (DT_CONFIG): New. From Solaris 8. (DT_DEPAUDIT): Likewise. (DT_AUDIT): Likewise. (DT_PLTPAD): Likewise. (DT_MOVETAB): Likewise. (DF_1_NODEPLIB): Likewise. (DF_1_NODUMP): Likewise. (DF_1_CONLFAT): Likewise. (DT_CHECKSUM): Likewise. FIXME. Check the value on Solaris 8. (DTF_1_CONFEXP): Likewise.
* 2000-07-18 H.J. Lu <hjl@gnu.org>H.J. Lu2000-07-192-1/+5
| | | | * common.h (DT_FLAGS_1): Renamed from DT_1_FLAGS.
* Update comment.Alan Modra2000-07-122-2/+7
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* Comment the relocs.Alan Modra2000-07-102-185/+373
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* add MAINTAINERS filesDJ Delorie2000-07-052-0/+5
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* * peicode.h (coff_swap_filehdr_in): can't use e_magic because weDJ Delorie2000-06-302-2/+10
| | | | | can't assume the PE header is at 0x80. * coff/pe.h: clarify a comment
* Applied Marek Michalkiewicz <marekm@linux.org.pl>'s patch to ehance the AVR ↵Nick Clifton2000-06-274-11/+25
| | | | port.
* Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add supportNick Clifton2000-06-197-1/+496
| | | | for m68hc11 and m68hc12 processors.
* Changed values of MODSYNC and CRCCON as suggest by Russ Magee <rmagee@home.com>Nick Clifton2000-06-182-2/+7
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* 2000-06-17 H.J. Lu <hjl@gnu.org>H.J. Lu2000-06-174-4/+33
| | | | | | * getopt.h: Updated from gcc. * libiberty.h: Likewise. * symcat.h: Likewise.
* 2000-05-06 Zack Weinberg <zack@wolery.cumb.org>H.J. Lu2000-06-172-0/+12
| | | | | * ansidecl.h: #define __extension__ to nothing if GCC_VERSION < 2008.
* Fix some typos.H.J. Lu2000-06-151-2/+2
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* Remove entries from gcc. They don't make much senses here sinceH.J. Lu2000-06-151-18/+2
| | | | ChangeLogs in gcc and binutils are quite different.
* 2000-06-15 H.J. Lu <hjl@gnu.org>H.J. Lu2000-06-155-27/+202
| | | | | | | | | | | | | | | | | | | | | | | | * sort.h: New file. Impored from gcc. * hashtab.h: Updated from from gcc. 2000-06-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> * demangle.h (demangling_styles): Remove trailing comma in enum. * dyn-string.h (dyn_string_append_char): Change parameter from char to int. 2000-06-04 Alex Samuel <samuel@codesourcery.com> * dyn-string.h: Move here from gcc/dyn-string.h. Add new functions. * demangle.h (DMGL_GNU_NEW_ABI): New macro. (DMGL_STYLE_MASK): Or in DMGL_GNU_NEW_ABI. (current_demangling_style): Add gnu_new_abi_demangling. (GNU_NEW_ABI_DEMANGLING_STYLE_STRING): New macro. (GNU_NEW_ABI_DEMANGLING): Likewise. (cplus_demangle_new_abi): New declaration.
* * avr.h: clr,lsl,rol, ... moved after add,adc, ...Denis Chertykov2000-06-092-5/+9
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* * avr.h: New file with AVR opcodes.Denis Chertykov2000-06-072-0/+211
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* Update copyright dates for last patch.Alan Modra2000-06-0721-49/+50
| | | | Scanning ChangeLog showed others were lazy/forgetful too :-)
* Get rid of the -1 dummy valued enum in START_RELOC_NUMBERS.Alan Modra2000-06-0724-61/+69
| | | | | Remove duplicate reloc enums in elf32-d[13]0v.c Remove EMPTY_HOWTOs in elf32-i386.c
* Fix name clashAlan Modra2000-06-032-10/+16
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* Add field ``name'' to floatformat.Andrew Cagney2000-05-312-1/+8
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* Include year 2000 in copyright messageNick Clifton2000-05-282-2/+2
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* Fix capitialisation of setnaces in comment.Nick Clifton2000-05-281-3/+3
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