| Commit message (Collapse) | Author | Age | Files | Lines |
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Contribute the following changes:
2003-09-29 Dave Brolley <brolley@redhat.com>
* dis-asm.h (disassemble_info): insn_sets now (void *) to allow for
more exotic underlying types to be used.
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Contribute the following changes:
2005-02-16 Dave Brolley <brolley@redhat.com>
* cgen-bitset.h: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
cgen_isa_mask_* to cgen_bitset_*.
* cgen.h: Likewise.
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2005-10-24 Jan Beulich <jbeulich@novell.com>
* ia64.h (enum ia64_opnd): Move memory operand out of set of
indirect operands.
bfd/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of
set of indirect operands.
gas/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (enum reg_symbol): Delete IND_MEM.
(dot_rot): Change type of num_* variables. Check for positive count.
(ia64_optimize_expr): Re-structure.
(md_operand): Check for general register.
gas/testsuite/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* gas/ia64/index.[sl]: New.
* gas/ia64/rotX.[sl]: New.
* gas/ia64/ia64.exp: Run new tests.
opcodes/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* ia64-asmtab.c: Regenerate.
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Add FLAG_STRICT to pa10 ftest opcode.
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instructions from system.s.
* gas/hppa/basic/system.s (lha): Remove.
* hppa.h (pa_opcodes): Remove lha entries.
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(pa_ip): Promote from PA 1.0 to 1.1 immediately when 1.1 match is
found. Simplify handling of "ma" and "mb" completers.
* hppa.h (FLAG_STRICT): Revise comment.
(pa_opcode): Revise ordering rules. Add/move strict pa10 variants
before corresponding pa11 opcodes. Add strict pa10 register-immediate
entries for "fdc".
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bfd/
* elf32-arm.c: Move #include "elf/arm.h" after libbfd.h.
(NUM_KNOWN_ATTRIBUTES): Define.
(aeabi_attribute, aeabi_attribute_list): Define.
(elf32_arm_obj_tdata): Add known_eabi_attributes and
other_eabi_attributes.
(uleb128_size, is_default_attr, eabi_attr_size,
elf32_arm_eabi_attr_size, write_uleb128, write_eabi_attribute,
elf32_arm_set_eabi_attr_contents, elf32_arm_bfd_final_link,
elf32_arm_new_eabi_attr, attr_strdup, elf32_arm_add_eabi_attr_int,
elf32_arm_add_eabi_attr_compat, copy_eabi_attributes,
elf32_arm_merge_eabi_attributes): New functions.
(elf32_arm_copy_private_bfd_data): Copy EABI object attributes.
(elf32_arm_fake_sections): Handle .ARM.attributes.
(elf32_arm_parse_attributes): New function.
(elf32_arm_section_from_shdr): Use it.
(bfd_elf32_bfd_final_link): Define.
gas/
* config/tc-arm.c: Don't provide fallback default for CPU_DEFAULT.
(arm_arch_used, thumb_arch_used, selected_cpu, selected_cpu_name):
New variables.
(arm_cpu_option_table): Add canonical_name.
(arm_cpus): Populate canonical_name field.
(s_arm_eabi_attribute, s_arm_arch, s_arm_cpu, s_arm_fpu,
aeabi_set_public_attributes, arm_md_end): New functions.
(md_pseudo_table): Add "cpu", "arch", "fpu" and "eabi_attribute".
(md_assemble): Set thumb_arch_used and arm_arch_used.
(md_begin): Set defaut cpu if CPU_DEFAULT not defined.
* config/tc-arm.h (md_end): Define.
* doc/c-arm.texi: Document .cpu, .arch, .fpu and .eabi_attribute.
gas/testsuite/
* gas/arm/eabi_attr_1.s: New test.
* gas/arm/eabi_attr_1.d: New test.
* gas/arm/arm7t.d: Only disassemble code sections.
* gas/arm/bignum1.d: Ignore Arm object attribute sections.
* gas/arm/mapping.d: Ditto.
* gas/arm/unwind.d: Ditto.
* gas/elf/section0.d: Ditto.
* gas/elf/section1.d: Ditto.
* gas/elf/elf.exp: Set target_machine for Arm EABI based targets.
* gas/elf/section2.e-armeabi: New file.
include/elf/
* arm.h: Add prototypes for BFD object attribute routines.
ld/testsuite/
* ld-arm/arm-rel31.d: Ignore Arm object attribute sections.
* ld-arm/arm-target1-abs.d: Ditto.
* ld-arm/arm-target1-rel.d: Ditto.
* ld-arm/arm-target2-abs.d: Ditto.
* ld-arm/arm-target2-got-rel.d: Ditto.
* ld-arm/arm-target2-rel.d: Ditto.
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* elf/bfin.h: New file.
* elf/common.h (EM_BLACKFIN): Define.
* opcode/bfin.h: New file.
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* argv.c (safe-ctype.h): Include it.
(ISBLANK): Remove.
(stdio.h): Include.
(buildargv): Use ISSPACE instead of ISBLANK.
(expandargv): New function.
* Makefile.in: Regenerated.
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OP_SH_MTACC_T, OP_MASK_MTACC_T, OP_SH_MTACC_D, OP_MASK_MTACC_D): New
define.
Document !, $, *, &, g, +t, +T operand formats for MT instructions.
(INSN_ASE_MASK): Update to include INSN_MT.
(INSN_MT): New define for MT ASE.
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OP_MASK_DSPACC_S, OP_SH_DSPSFT, OP_MASK_DSPSFT, OP_SH_DSPSFT_7,
OP_MASK_DSPSFT_7, OP_SH_SA3, OP_MASK_SA3, OP_SH_SA4, OP_MASK_SA4,
OP_SH_IMM8, OP_MASK_IMM8, OP_SH_IMM10, OP_MASK_IMM10, OP_SH_WRDSP,
OP_MASK_WRDSP, OP_SH_RDDSP, OP_MASK_RDDSP): New define.
Document 3, 4, 5, 6, 7, 8, 9, 0, :, ', @ operand formats for DSP
instructions.
(INSN_DSP): New define for DSP ASE.
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* config/tc-ppc.c (parse_cpu): Add -me300 support.
(md_show_usage): Likewise.
* doc/c-ppc.texi (PowerPC-Opts): Document it.
include/opcode/
* ppc.h (PPC_OPCODE_E300): Define.
opcodes/
* ppc-dis.c (powerpc_dialect): Handle e300.
(print_ppc_disassembler_options): Likewise.
* ppc-opc.c (PPCE300): Define.
(powerpc_opcodes): Mark icbt as available for the e300.
binutils/
* doc/binutils.texi (objdump): Document -M e300.
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New defines.
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(PF_HP_CODE_DEPR, PF_HP_MODIFY_DEPR, PF_HP_LAZYSWAP_DEPR): New
deprecated defines.
(DT_HP_EPLTREL, DT_HP_EPLTRELSZ, DT_HP_FILTERED, DT_HP_FILTER_TLS,
DT_HP_COMPAT_FILTERED, DT_HP_LAZYLOAD, DT_HP_BIND_NOW_COUNT, DT_PLT,
DT_PLT_SIZE, DT_DLT, DT_DLT_SIZE, DT_HP_BIND_DEPTH_FIRST, DT_HP_GST,
DT_HP_SHLIB_FIXED, DT_HP_MERGE_SHLIB_SEG, DT_HP_NODELETE, DT_HP_GROUP,
DT_HP_PROTECT_LINKAGE_TABLE, PT_HP_OPT_ANNOT, PT_HP_HSL_ANNOT,
PT_HP_STACK, PT_HP_CORE_UTSNAME, NT_HP_COMPILER, NT_HP_COPYRIGHT,
NT_HP_VERSION, NT_HP_SRCFILE_INFO, NT_HP_LINKER, NT_HP_INSTRUMENTED,
NT_HP_UX_OPTIONS): Define.
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* hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb
and pitlb.
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2005-07-27 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): Add comment to movd. Use LongMem for all
movd-s. Add NoRex64 to movq-s dealing only with mmx or xmm registers.
Add movq-s as 64-bit variants of movd-s.
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* reloc.c: Remove unused M32C relocs, add BFD_RELOC_M32C_HI8.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
* elf32-m32c.c (m32c_elf_howto_table): Add R_M32C_8, R_M32C_LO16,
R_M32C_HI8, R_M32C_HI16.
(m32c_reloc_map): Likewise.
(m32c_elf_relocate_section): Add R_M32C_HI8 and R_M32C_HI16.
[cpu]
* m32c.opc (parse_unsigned8): Add %dsp8().
(parse_signed8): Add %hi8().
(parse_unsigned16): Add %dsp16().
(parse_signed16): Add %lo16() and %hi16().
(parse_lab_5_3): Make valuep a bfd_vma *.
[gas]
* config/tc-m32c.c (md_cgen_lookup_reloc): Add 8 bit operands.
Support %mod() modifiers from opcodes.
* doc/c-m32c.texi (M32C-Modifiers): New section.
[include/elf]
* m32c.h: Add R_M32C_8, R_M32C_LO16, R_M32C_HI8, and R_M32C_HI16.
[opcodes]
* m32c-asm.c Regenerate.
* m32c-dis.c Regenerate.
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2005-07-25 Jan Hubicka <jh@suse.cz>
H.J. Lu <hongjiu.lu@intel.com>
* elf-bfd.h (_bfd_elf_large_com_section): New.
* elf.c (_bfd_elf_large_com_section): New. Defined.
* elf64-x86-64.c (elf64_x86_64_add_symbol_hook): New.
(elf64_x86_64_elf_section_from_bfd_section): New.
(elf64_x86_64_symbol_processing): New.
(elf64_x86_64_common_definition): New.
(elf64_x86_64_common_section_index): New.
(elf64_x86_64_common_section): New.
(elf64_x86_64_merge_symbol): New.
(elf64_x86_64_additional_program_headers): New.
(elf64_x86_64_special_sections): New.
(elf_backend_section_from_bfd_section): New. Defined.
(elf_backend_add_symbol_hook): Likewise.
(elf_backend_common_section_index): Likewise.
(elf_backend_common_section): Likewise.
(elf_backend_common_definition): Likewise.
(elf_backend_merge_symbol): Likewise.
(elf_backend_special_sections): Likewise.
(elf_backend_additional_program_headers): Likewise.
binutils/
2005-07-25 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (dump_relocations): Handle SHN_X86_64_LCOMMON.
(get_symbol_index_type): Likewise.
(get_elf_section_flags): Handle SHF_X86_64_LARGE.
gas/
2005-07-25 Jan Hubicka <jh@suse.cz>
H.J. Lu <hongjiu.lu@intel.com>
* config/obj-elf.c: Include "elf/x86-64.h" if TC_I386 is
defined.
(elf_com_section_ptr): New.
(elf_begin): Set elf_com_section_ptr to bfd_com_section_ptr.
(elf_common_parse): Make it global. Use elf_com_section_ptr
instead of bfd_com_section_ptr.
(obj_elf_change_section): Handle x86-64 large bss sections.
* config/obj-elf.h (elf_com_section_ptr): New.
(elf_common_parse): New.
* config/tc-i386.c (handle_large_common): New.
(md_pseudo_table): Add "largecomm".
(x86_64_section_letter): New.
(x86_64_section_word): New.
* config/tc-i386.h (x86_64_section_word): New.
(x86_64_section_letter): New.
(md_elf_section_letter): New. Defined.
(md_elf_section_word): Likewise.
include/elf/
2005-07-25 Jan Hubicka <jh@suse.cz>
* x86-64.h (SHN_X86_64_LCOMMON): New.
(SHF_X86_64_LARGE): New.
ld/
2005-07-25 Jan Hubicka <jh@suse.cz>
H.J. Lu <hongjiu.lu@intel.com>
* emulparams/elf_x86_64.sh (LARGE_SECTIONS): New.
* scripttempl/elf.sc: Updated for large section support.
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implicit space-register addressing. Set space-register bits on opcodes
using implicit space-register addressing. Add various missing pa20
long-immediate opcodes. Remove various opcodes using implicit 3-bit
space-register addressing. Use "fE" instead of "fe" in various
fstw opcodes.
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2005-07-18 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): Operands of aam and aad are unsigned.
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* readelf.c (read_and_display_attr_value): Handle a DW_AT_encoding
value of DW_ATE_decimal_float instead of DW_ATE_GNU_decimal_float.
include/elf/
* dwarf2.h (enum dwarf_type): Remove DW_AT_GNU_decimal_float.
Replace with DW_ATE_decimal_float (now in DWARF 3).
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2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.h (CpuVMX): New.
(CpuUnknownFlags): Add CpuVMX.
gas/testsuite/
2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add vmx and x86-64-vmx.
* gas/i386/vmx.d: New file.
* gas/i386/vmx.s: Likewise.
* gas/i386/x86-64-vmx.d: Likewise.
* gas/i386/x86-64-vmx.s: Likewise.
include/opcode/
2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel VMX Instructions.
opcodes/
2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
(VMX_Fixup): New. Fix up Intel VMX Instructions.
(Em): New.
(Gm): New.
(VM): New.
(dis386_twobyte): Updated entries 0x78 and 0x79.
(twobyte_has_modrm): Likewise.
(grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
(OP_G): Handle m_mode.
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2005-07-14 Jim Blandy <jimb@redhat.com>
* configure.in: Add cases for Renesas m32c.
* configure: Regenerated.
bfd/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for m32c-*-elf (Renesas m32c and m16c).
* Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
(ALL_MACHINES_CFILES): Add cpu-m32c.c.
(BFD32_BACKENDS): Add elf32-m32c.lo.
(BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
(cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
* Makefile.in: Regenerated.
* archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
arch and mach codes.
(bfd_m32c_arch): New arch info object.
(bfd_archures_list): List bfd_m32c_arch.
* bfd-in2.h: Regenerated.
* config.bfd: Add case for the m32c.
* configure.in: Add case for the m32c.
* configure: Regenerated.
* cpu-m32c.c, elf32-m32c.c: New files.
* libbfd.h: Regenerated.
* targets.c (bfd_elf32_m32c_vec): Declare.
(_bfd_target_vector): List bfd_elf32_m32c_vec.
binutils/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* readelf.c: #include "elf/m32c.h"
(guess_is_rela, dump_relocations, get_machine_name): Add cases for
EM_M32C.
* Makefile.am (readelf.o): Update dependencies.
* Makefile.in: Regenerated.
cpu/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
gas/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C.
* Makefile.am (CPU_TYPES): List m32c.
(TARGET_CPU_CFILES): List config/tc-m32c.c.
(TARGET_CPU_HFILES): List config/tc-m32c.h.
* configure.in: Add case for m32c.
* configure.tgt: Add cases for m32c and m32c-*-elf.
* configure: Regenerated.
* config/tc-m32c.c, config/tc-m32c.h: New files.
* doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set M32C.
* doc/as.texinfo: Add text for the M32C-specific options and line
comment characters, and refer to c-m32c.texi.
* doc/c-m32c.texi: New file.
include/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* dis-asm.h (print_insn_m32c): New declaration.
include/elf/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for Renesas M32C and M16C.
* common.h (EM_M32C): New machine number.
* m32c.h: New file.
ld/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
(eelf32m32c.c): New target.
* Makefile.in: Regenerated.
* configure.tgt: Add case for m32c-*-elf.
* emulparams/elf32m32c.sh: New file.
opcodes/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
* m32c-desc.h, m32c-opc.h: New.
* Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
(CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
m32c-opc.c.
(ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
m32c-ibld.lo, m32c-opc.lo.
(CLEANFILES): List stamp-m32c.
(M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
(CGEN_CPUS): Add m32c.
(m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
(m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
(m32c_opc_h): New variable.
(stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
(m32c-opc.lo): New rules.
* Makefile.in: Regenerated.
* configure.in: Add case for bfd_m32c_arch.
* configure: Regenerated.
* disassemble.c (ARCH_m32c): New.
[ARCH_m32c]: #include "m32c-desc.h".
(disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
(disassemble_init_for_target) [ARCH_m32c]: Same.
* cgen-ops.h, cgen-types.h: New files.
* Makefile.am (HFILES): List them.
* Makefile.in: Regenerated.
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created by the DEC ALPHA compilers.
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bfd:
* elf32-xtensa.c (vsprint_msg): Add format attribute. Fix
format bugs.
* vms.h (_bfd_vms_debug): Add format attribute.
(_bfd_vms_debug, _bfd_hexdump): Fix typos.
binutils:
* bucomm.h (report): Add format attribute.
* dlltool.c (inform): Likewise.
* dllwrap.c (display, inform, warn): Likewise.
* objdump.c (objdump_sprintf): Likewise.
* readelf.c (error, warn): Likewise. Fix format bugs.
gas:
* config/tc-tic30.c (debug): Add format attribute. Fix format
bugs.
include:
* dis-asm.h (fprintf_ftype): Add format attribute.
opcodes:
* arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
v850-dis.c: Fix format bugs.
* ia64-gen.c (fail, warn): Add format attribute.
* or32-opc.c (debug): Likewise.
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2005-07-05 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (CpuSVME): New.
(CpuUnknownFlags): Include CpuSVME.
* config/tc-i386.c (cpu_arch): Add .pacifica and .svme. Add opteron
as alias of sledgehammer.
(md_assemble): Include invlpga in the check for insns with two source
operands.
(process_operands): Include SVME insns in the check for ignored
segment overrides. Adjust diagnostic.
(i386_index_check): Special-case SVME insns with memory operands.
gas/testsuite/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* gas/i386/svme.d: New.
* gas/i386/svme.s: New.
* gas/i386/svme64.d: New.
* gas/i386/i386.exp: Run new tests.
include/opcode/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): Add new insns.
opcodes/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (SVME_Fixup): New.
(grps): Use it for the lidt entry.
(PNI_Fixup): Call OP_M rather than OP_E.
(INVLPG_Fixup): Likewise.
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2005-06-20 Geoffrey Keating <geoffk@apple.com>
* libiberty.h (strverscmp): Prototype.
Index: libiberty/ChangeLog
2005-06-20 Geoffrey Keating <geoffk@apple.com>
* strverscmp.c: New.
* Makefile.in (CFILES): Add strverscmp.c.
(CONFIGURED_OFILES): Add strverscmp.o.
(strverscmp.o): New rule.
(stamp-functions): Add $(srcdir) to files in source directory.
* configure.ac (funcs): Add strverscmp.
(AC_CHECK_FUNCS): Add strverscmp.
* configure: Regenerate.
* functions.texi: Regenerate.
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2005-06-20 H.J. Lu <hongjiu.lu@intel.com>
PR 1013
* config/tc-i386.c (md_assemble): Don't call optimize_disp on
movabs.
(optimize_disp): Optimize only if possible. Don't use 64bit
displacement on non-constants and do same on constants if
possible.
gas/testsuite/
2005-06-20 H.J. Lu <hongjiu.lu@intel.com>
PR 1013
* i386/x86_64.s: Add absolute 64bit addressing tests for mov.
* i386/x86_64.s: Updated.
include/opcode/
2005-06-20 H.J. Lu <hongjiu.lu@intel.com>
PR 1013
* i386.h (i386_optab): Update comments for 64bit addressing on
mov. Allow 64bit addressing for mov and movq.
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* readelf.c (CHECK_ENTSIZE_VALUES, CHECK_ENTSIZE): Define.
(process_section_headers): Use it.
(process_relocs): Don't crash if symsec is not SHT_SYMTAB
or SHT_DYNSYM.
(process_version_sections): Use sizeof (Elf_External_Versym)
instead of sh_entsize.
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2005-06-17 Jan Beulich <jbeulich@novell.com>
* bfd-in2.h (elf_x86_64_reloc_type): Add BFD_RELOC_X86_64_GOTOFF64
and BFD_RELOC_X86_64_GOTPC32.
* libbfd.h (bfd_reloc_code_real_names): Likewise.
* elf64-x86-64.c (x86_64_elf_howto_table): Add entries for
R_X86_64_PC64, R_X86_64_GOTOFF64, and R_X86_64_GOTPC32.
(x86_64_reloc_map): Add entries for R_X86_64_PC64, R_X86_64_GOTOFF64,
and R_X86_64_GOTPC32.
(elf64_x86_64_info_to_howto): Adjust bounding relocation type.
(elf64_x86_64_check_relocs): Also handle R_X86_64_PC64,
R_X86_64_GOTOFF64, and R_X86_64_GOTPC32.
(elf64_x86_64_relocate_section): Likewise.
(elf64_x86_64_gc_sweep_hook): Also handle R_X86_64_PC64.
gas/
2005-06-17 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (reloc): Also handle BFD_RELOC_64_PCREL.
(tc_i386_fix_adjustable): Include BFD_RELOC_X86_64_GOTOFF64,
BFD_RELOC_X86_64_DTPOFF64, and BFD_RELOC_X86_64_TPOFF64.
(output_disp): Do GOTPC conversion also for BFD_RELOC_X86_64_32S
and BFD_RELOC_32_PCREL. Use BFD_RELOC_X86_64_GOTPC32 instead of
aborting.
(output_imm): Do GOTPC conversion also for BFD_RELOC_X86_64_32S.
Use BFD_RELOC_X86_64_GOTPC32 instead of aborting.
(tc_gen_reloc): Do GOTPC conversion also for BFD_RELOC_32_PCREL.
Use BFD_RELOC_X86_64_GOTPC32 instead of aborting. Also handle
BFD_RELOC_X86_64_GOTOFF64, BFD_RELOC_X86_64_GOTPC32,
BFD_RELOC_X86_64_DTPOFF64, and BFD_RELOC_X86_64_TPOFF64. Also
convert 8-byte pc-relative relocations.
(lex_got): Use BFD_RELOC_X86_64_GOTOFF64 for 64-bit @gotoff.
(i386_validate_fix): Likewise.
(x86_cons): Also handle quad values in 64-bit mode.
(i386_displacement): Also handle BFD_RELOC_X86_64_GOTOFF64.
(md_apply_fix): Include BFD_RELOC_X86_64_DTPOFF64 and
BFD_RELOC_X86_64_TPOFF64 in the TLS check. Also convert BFD_RELOC_64
to pc-relative variant. Also check for BFD_RELOC_64_PCREL.
gas/testsuite/
2005-06-17 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-pcrel.s: Add insn requiring 64-bit pc-relative
relocation. Add insns for all widths of non-pc-relative relocations.
* gas/i386/x86-64-pcrel.d: Adjust.
include/elf/
2005-06-17 Jan Beulich <jbeulich@novell.com>
* x86-64.h (elf_x86_64_reloc_type): Adjust comment for
R_X86_64_GOTPCREL. Add R_X86_64_PC64, R_X86_64_GOTOFF64, and
R_X86_64_GOTPC32.
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respectively, in various floating-point load and store patterns.
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* arm-opc.h: Delete; fold contents into ...
* arm-dis.c: ... here. Move includes of internal COFF headers
next to includes of internal ELF headers.
(streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
(struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
(struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
(arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
(iwmmxt_wwnames, iwmmxt_wwssnames):
Make const.
(regnames): Remove iWMMXt coprocessor register sets.
(iwmmxt_regnames, iwmmxt_cregnames): New statics.
(get_arm_regnames): Adjust fourth argument to match above changes.
(set_iwmmxt_regnames): Delete.
(print_insn_arm): Constify 'c'. Use ISO syntax for function
pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
and iwmmxt_cregnames, not set_iwmmxt_regnames.
(print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
ISO syntax for function pointer calls.
include:
* dis-asm.h (get_arm_regnames): Update prototype.
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