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* Change source files over to GPLv3.Nick Clifton2007-07-051-9/+10
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* 2007-06-28 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2007-06-281-1705/+1
| | | | | | | | | | | | | | | | | | | | * Makefile.am (HFILES): Add i386-opc.h and i386-tbl.h. (CFILES): Add i386-gen.c. (i386-gen): New rule. (i386-gen.o): Likewise. (i386-tbl.h): Likewise. Run "make dep-am". * Makefile.in: Regenerated. * i386-gen.c: New file. * i386-opc.tbl: Likewise. * i386-reg.tbl: Likewise. * i386-tbl.h: Likewise. * i386-opc.c: Include "i386-tbl.h". (i386_optab): Removed. (i386_regtab): Likewise. (i386_regtab_size): Likewise.
* gas/H.J. Lu2007-06-251-7/+7
| | | | | | | | | | | | | | | | 2007-06-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (process_operands): Replace regKludge with RegKludge. opcodes/ 2007-06-25 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.h (regKludge): Renamed to ... (RegKludge): This. * i386-opc.c (i386_optab): Replace regKludge with RegKludge.
* gas/H.J. Lu2007-05-031-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2007-05-03 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Don't explicitly check suffix for crc32 in Intel mode. (process_suffix): Issue an error for crc32 if the operand size is ambiguous. gas/testsuite/ 2007-05-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/crc32-intel.d: Updated. * gas/i386/crc32.d: Likewise. * gas/i386/sse4_2.d: Likewise. * gas/i386/x86-64-crc32-intel.d: Likewise. * gas/i386/x86-64-crc32.d: Likewise. * gas/i386/x86-64-sse4_2.d: Likewise. * gas/i386/crc32.s: Remove crc32 instructions with ambiguous operand size and suffix in crc32 instructions in Intel mode. * gas/i386/x86-64-crc32.s: Likewise. * gas/i386/sse4_2.s: Remove crc32 instructions with ambiguous operand size. * gas/i386/x86-64-sse4_2.s: Likewise. * gas/i386/i386.exp: Run inval-crc32 and x86-64-inval-crc32. * gas/i386/inval-crc32.l: New. * gas/i386/inval-crc32.s: Likewise. * gas/i386/x86-64-inval-crc32.l: Likewise. * gas/i386/x86-64-inval-crc32.s: Likewise. opcodes/ 2007-05-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode. * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand type for crc32.
* gas/config/H.J. Lu2007-05-011-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Check suffix for crc32 in Intel mdoe. (process_suffix): Default the suffix of 8bit crc32 to BYTE_MNEM_SUFFIX. (check_byte_reg): Skip check for 8bit crc32. gas/testsuite/ 2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/crc32-intel.d: New file. * gas/i386/crc32.d:Likewise. * gas/i386/crc32.s:Likewise. * gas/i386/x86-64-crc32-intel.d:Likewise. * gas/i386/x86-64-crc32.d:Likewise. * gas/i386/x86-64-crc32.s:Likewise. * gas/i386/i386.exp: Run crc32, crc32-intel, x86-64-crc32 and x86-64-crc32-intel. opcodes/ 2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and check data size prefix in 16bit mode. * i386-opc.c (i386_optab): Default crc32 to non-8bit and support Intel mode.
* gas/Alan Modra2007-04-211-7/+2
| | | | | | | | | | | | | | | | | * expr.c (expr): Assert on rankarg, not rank which can be unsigned. * read.c (read_a_source_file): Remove buffer_limit[-1] assertion. Don't skip over NUL char. (pseudo_set): Set X_op for registers to O_register. * symbols.c (symbol_clone): Remove assertion that sym is defined. (resolve_symbol_value): Resolve O_register symbols. * config/tc-i386.c (parse_real_register): Don't use i386_float_regtab. Instead find st(0) by hash lookup. * config/tc-ppc.c (ppc_macro): Warning fix. opcodes/ * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete. Move contents to.. (i386_regtab): ..here. * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
* gas/H.J. Lu2007-04-181-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add .sse4.2 and .sse4. (match_template): Handle operand size for crc32 in SSE4.2. (process_suffix): Handle operand type for crc32 in SSE4.2. (output_insn): Support SSE4.2. gas/testsuite/ 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add sse4.2 and x86-64-sse4.2. * gas/i386/sse4_2.d: New file. * gas/i386/sse4_2.s: Likewise. * gas/i386/x86-64-sse4_2.d: Likewise. * gas/i386/x86-64-sse4_2.s: Likewise. opcodes/ 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CRC32_Fixup): New. (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90, PREGRP91): New. (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2. (threebyte_0x3a_uses_DATA_prefix): Likewise. (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90 and PREGRP91. (three_byte_table): Likewise. * i386-opc.c (i386_optab): Add SSE4.2 opcodes. * gas/config/tc-i386.h (CpuSSE4_2): New. (CpuSSE4): Likewise. (CpuUnknownFlags): Add CpuSSE4_2.
* gas/H.J. Lu2007-04-181-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add .sse4.1. (process_operands): Adjust implicit operand for blendvpd, blendvps and pblendvb in SSE4.1. (output_insn): Support SSE4.1. gas/testsuite/ 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add sse4.1 and x86-64-sse4.1. * gas/i386/sse4_1.d: New file. * gas/i386/sse4_1.s: Likewise. * gas/i386/x86-64-sse4_1.d: Likewise. * gas/i386/x86-64-sse4_1.s: Likewise. opcodes/ 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (XMM_Fixup): New. (Edqb): New. (Edqd): New. (XMM0): New. (dqb_mode): New. (dqd_mode): New. (PREGRP39 ... PREGRP85): New. (threebyte_0x38_uses_DATA_prefix): Updated for SSE4. (threebyte_0x3a_uses_DATA_prefix): Likewise. (prefix_user_table): Add PREGRP39 ... PREGRP85. (three_byte_table): Likewise. (putop): Handle 'K'. (intel_operand_size): Handle dqb_mode, dqd_mode): (OP_E): Likewise. (OP_G): Likewise. * i386-opc.c (i386_optab): Add SSE4.1 opcodes. * i386-opc.h (CpuSSE4_1): New. (CpuUnknownFlags): Add CpuSSE4_1. (regKludge): Update comment.
* Remove trailing white spaces.H.J. Lu2007-04-131-1/+1
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* gas/H.J. Lu2007-03-291-13/+13
| | | | | | | | | | | | | | | | | | | 2007-03-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (build_modrm_byte): For instructions with 2 register operands, encode destination in i.rm.regmem if its RegMem bit is set. opcodes/ 2007-03-28 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and movq. Remove InvMem from sldt, smsw and str. * i386-opc.h (InvMem): Renamed to ... (RegMem): Update comments. (AnyMem): Remove InvMem.
* gas/H.J. Lu2007-03-231-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | 2003-03-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_begin): Allow '.' in mnemonic. gas/testsuite/ 2003-03-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/rex.s: Add tests for rex.WRXB. * gas/i386/rex.d: Updated. * gas/i386/rex.d: Replace rex64XYZ with rex.WRXB. * gas/i386/x86-64-io-intel.d : Likewise. * gas/i386/x86-64-io-suffix.d: Likewise. * gas/i386/x86-64-io.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. opcodes/ 2003-03-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB. * i386-opc.c (i386_optab): Add rex.wrxb.
* gas/H.J. Lu2007-03-211-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4218 * config/tc-i386.c (match_template): Properly handle 64bit mode "xchg %eax, %eax". gas/testsuite/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4218 * gas/i386/nops.s: Add testcases for nop r/m. * gas/i386/x86-64-nops.s: Likewise. * gas/i386/x86-64-opcode.s: Add testcases for xchg with %ax, %eax and %rax. * gas/i386/nops.d: Updated. * gas/i386/x86-64-nops.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. opcodes/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4218 * i386-dis.c (PREGRP38): New. (dis386): Use PREGRP38 for 0x90. (prefix_user_table): Add PREGRP38. (print_insn): Set uses_REPZ_prefix to 1 for pause. (NOP_Fixup1): Properly handle REX bits. (NOP_Fixup2): Likewise. * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit. Allow register with nop.
* gas/H.J. Lu2007-03-151-3/+5
| | | | | | | | | | | | | | | | | | | | | 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_begin): Use i386_regtab_size to scan i386_regtab. (parse_register): Use i386_regtab_size instead of ARRAY_SIZE on i386_regtab. opcodes/ 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.c: Include "libiberty.h". (i386_regtab): Remove the last entry. (i386_regtab_size): New. (i386_float_regtab_size): Likewise. * i386-opc.h (i386_regtab_size): New. (i386_float_regtab_size): Likewise.
* gas/H.J. Lu2007-03-151-0/+1657
2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am: Run "make dep-am". * Makefile.in: Regenerated. * config/tc-i386.c: Include "opcodes/i386-opc.h" instead of "opcode/i386.h". (md_begin): Check reg_name != NULL for the last entry in i386_regtab. * config/tc-i386.h: Move many entries to opcode/i386.h and opcodes/i386-opc.h. * configure.in (need_opcodes): Set true for i386. * configure: Regenerated. include/opcode/ 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * i386.h: Add entries from config/tc-i386.h and move tables to opcodes/i386-opc.h. opcodes/ 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (CFILES): Add i386-opc.c. (ALL_MACHINES): Add i386-opc.lo. Run "make dep-am". * Makefile.in: Regenerated. * configure.in: Add i386-opc.lo for bfd_i386_arch. * configure: Regenerated. * i386-dis.c: Include "opcode/i386.h". (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition. (FWAIT_OPCODE): Remove definition. (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition. (MAX_OPERANDS): Remove definition. * i386-opc.c: New file. * i386-opc.h: Likewise.