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* * openrisc-asm.c: Regenerate.Alan Modra2003-12-043-25/+47
| | | | * pj-opc.c: Update copyright date.
* Add support for the M32R2 processor.Nick Clifton2003-12-039-175/+528
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* * alpha-opc.c: Remove ARGSUSED.Kazu Hirata2003-12-034-35/+6
| | | | | * i370-opc.c: Likewise. * ppc-opc.c: Likewise.
* make "dep-am"Alan Modra2003-12-023-11/+16
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* * z8k-dis.c: Convert to ISO C90.Christian Groessler2003-11-284-295/+266
| | | | | | | * z8kgen.c: Convert to ISO C90. (opt): Move long opcode for "ldb rdb,imm8" after short one, now the short one is created when assembling. * z8k-opc.h: Regenerate with new z8kgen.c.
* * h8300-dis.c (print_colon_thingie): Remove.Kazu Hirata2003-11-192-19/+4
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* * config/tc-mips.c (macro): Handle new macros: "lca" and "dlca"Maciej W. Rozycki2003-11-182-0/+7
| | | | | | | | | | | | | | | for loading addresses using CALL relocations. Don't emit CALL relocations when a base register is used. * gas/mips/lca-svr4pic.d: New test for the "lca" macro. * gas/mips/lca-xgot.d: Likewise. * gas/mips/lca.s: Source for the new tests. * gas/mips/mips.exp: Run the new tests. * opcode/mips.h: Define new enum members, M_LCA_AB and M_DLCA_AB. * mips-opc.c (mips_builtin_opcodes): Handle new macros: "lca" and "dlca".
* Add new field to disassemble_info structure: symbol_is_valid() and use it toNick Clifton2003-11-145-1/+59
| | | | skip displaying arm elf mapping symbols in disassembly output.
* 2003-11-05 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2003-11-062-4/+8
| | | | * m68k-opc.c (m68k_opcodes): Reorder "fmovel".
* * arm-dis.c (print_arm_insn): Print "-" after "#".Daniel Jacobowitz2003-11-032-8/+12
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* Add second argument to rcpp instruction.Nick Clifton2003-10-302-2/+7
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* * m68hc11-dis.c: Convert to ISO C90 prototypes.Stephane Carrez2003-10-272-31/+19
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* Add ColfFire v4 supportNick Clifton2003-10-213-276/+522
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* 2003-06-03 Michael Snyder <msnyder@redhat.com>Michael Snyder2003-10-101-1/+2
| | | | | | | and Bernd Schmidt <bernds@redhat.com> and Alexandre Oliva <aoliva@redhat.com> * disassemble.c (disassembler): Add support for h8300sx.
* 2003-10-10 Dave Brolley <brolley@redhat.com>Dave Brolley2003-10-105-74/+67
| | | | * frv-asm.c,frv-desc.c,frv-opc.c: Regenerated.
* 2003-10-08 Dave Brolley <brolley@redhat.com>Dave Brolley2003-10-085-1250/+1634
| | | | * frv-desc.[ch], frv-opc.[ch]: Regenerated.
* * xtensa-dis.c (fetch_data): Remove numBytes parameter.Bob Wilson2003-10-012-6/+9
| | | | (print_insn_xtensa): Fix call to fetch_data.
* [ bfd/ChangeLog ]Chris Demetriou2003-09-303-3/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.
* 2003-09-24 Dave Brolley <brolley@redhat.com>Dave Brolley2003-09-244-157/+149
| | | | * frv-desc.c, frv-opc.c, frv-opc.h: Regenerated.
* * i386-dis.c: Convert to ISO C90 prototypes.Andreas Jaeger2003-09-146-380/+231
| | | | | | | * i370-dis.c: Likewise. * i370-opc.c: Likewiwse. * i960-dis.c: Likewise. * ia64-opc.c: Likewise.
* 2003-09-09 Dave Brolley <brolley@redhat.com>Dave Brolley2003-09-092-6/+10
| | | | * frv-desc.c: Regenerated.
* 2003-09-08 Dave Brolley <brolley@redhat.com>Dave Brolley2003-09-084-31/+60
| | | | | | | | | | | | On behalf of Doug Evans <dje@sebabeach.org> * Makefile.am (run-cgen): Pass new args archfile and opcfile to cgen.sh. (stamp-ip2k,stamp-m32r,stamp-fr30,stamp-frv,stamp-openrisc, stamp-iq2000,stamp-xstormy16): Pass paths of .cpu and .opc files to cgen.sh. (stamp-frv): Delete hardcoded path spec workaround. * Makefile.in: Regenerate. * cgen.sh: New args archfile and opcfile. Pass on to cgen.
* Add binutils support for v850e1 processorNick Clifton2003-09-043-76/+91
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* * ppc-dis.c (struct dis_private): New.Alan Modra2003-09-043-59/+88
| | | | | | | | | | | | | | (powerpc_dialect): Make static. Accept -Many in addition to existing options. Save dialect in dis_private. (print_insn_big_powerpc): Retrieve dialect from dis_private. (print_insn_little_powerpc): Likewise. (print_insn_powerpc): Call powpc_dialect here. Remove unnecessary efs/altivec check. Try harder to disassemble if given -Many. * ppc-opc.c (insert_fxm): Expand comment. (PPC, PPCCOM, PPC32, PPC64, PPCVEC): Remove PPC_OPCODE_ANY. (POWER, POWER2, PPCPWR2, POWER32, COM, COM32, M601, PWRCOM): Likewise. (POWER4): Remove PPCCOM. (PPCONLY): Don't define. Update all occurrences to PPC.
* Index: opcodes/ChangeLogAndrew Cagney2003-09-034-3/+58
| | | | | | | | | | | | | | | | | | | | | | | | | 2003-09-03 Andrew Cagney <cagney@redhat.com> * dis-init.c (init_disassemble_info): New file and function. * Makefile.am (CFILES): Add "dis-init.c". (libopcodes_la_SOURCES): Add "dis-init.c". (dis-init.lo): Specify dependencies. * Makefile.in: Regenerate. Index: include/ChangeLog 2003-08-27 Andrew Cagney <cagney@redhat.com> * dis-asm.h (init_disassemble_info): Declare. (INIT_DISASSEMBLE_INFO): Redefine as a call to init_disassemble_info. (INIT_DISASSEMBLE_INFO_NO_ARCH): Ditto. Index: binutils/ChangeLog 2003-09-03 Andrew Cagney <cagney@redhat.com> * objdump.c: Refer to init_disassemble_info in comments. (disassemble_data): Replace INIT_DISASSEMBLE_INFO with init_disassemble_info.
* 2003-09-03 Dave Brolley <brolley@redhat.com>Dave Brolley2003-09-038-319/+443
| | | | * frv-*: Regenerated.
* * ppc-opc.c (powerpc_opcodes): Combine identical PPC403/BOOKE entries.Alan Modra2003-09-023-243/+223
| | | | | | Move duplicate mnemonic entries together. Use RS instead of RT on all mt*. * ppc-dis.c: Convert to ISO C.
* 2003-08-29 Dave Brolley <brolley@redhat.com>Dave Brolley2003-08-293-6/+24
| | | | | | * Makefile.am (stamp-frv): Copy frv.cpu and frv.opc from $(srcdir)/../cpu temporarily when regenerating source files. * Makefile.in: Regenerated.
* Add support for unindexed form of Addressing Mode 5Nick Clifton2003-08-192-6/+19
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* * ppc-opc.c (PPC440): Define.Alan Modra2003-08-192-88/+98
| | | | | (powerpc_opcodes): Allow mac*, mul*, nmac*, dccci, dcread, iccci, icread instructions when PPC440. Add dlmzb instruction.
* * dep-in.sed: Remove libintl.h.Alan Modra2003-08-144-12/+20
| | | | | | * Makefile.am (POTFILES.in): Unset LC_COLLATE. Run "make dep-am". * Makefile.in: Regenerate.
* fix typo in ChangeLogMichael Meissner2003-08-091-6/+6
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* regenerate cgen files after prototype fixMichael Meissner2003-08-0922-994/+911
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* Fix typos in last changeMichael Meissner2003-08-081-3/+6
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* fix changelog dateMichael Meissner2003-08-081-1/+1
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* Convert cgen to C-90Michael Meissner2003-08-087-308/+331
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* Updated French translationsNick Clifton2003-08-062-19/+23
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* Add new Dutch translation.carlton_dictionary-20030805-mergeNick Clifton2003-08-054-2/+817
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* 2003-07-30 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2003-07-302-14/+7
| | | | * i860-dis.c: Convert to ISO C90. Remove superflous prototypes.
* Updated Romanian translationNick Clifton2003-07-302-100/+446
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* * ppc-opc.c (insert_mbe, extract_mbe): Shift 1L instead of 1 up.Jakub Jelinek2003-07-292-3/+7
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* Updated French translationsNick Clifton2003-07-242-91/+438
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* * objdump.c (main) :Accept multiple -M switch.Nick Clifton2003-07-182-19/+24
| | | | | | | | * doc/binutils.texi: Document that multiple -M switches are accepted and that a single -M switch can contain comma separated options. * arm-dis.c (parse_arm_disassembler_option): Do not expect option string to be NUL terminated. (parse_disassembler_options): Allow options to be space or comma separated.
* Update translationsNick Clifton2003-07-174-217/+924
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* include/opcode/Richard Sandiford2003-07-152-0/+8
| | | | | | | | | | | | | | | | | | | | | | | * mips.h (CPU_RM7000): New macro. (OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns. bfd/ * archures.c (bfd_mach_mips7000): New. * bfd-in2.h: Regenerated. * cpu-mips.c (arch_info_struct): Add an entry for mips:7000. * elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000. (mips_mach_extensions): Add an entry for it. opcodes/ * mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries. gas/ * config/tc-mips.c (hilo_interlocks): True for CPU_RM7000. (mips_cpu_info_table): Add rm7000 and rm9000 entries. gas/testsuite/ * gas/mips/rm7000.[sd]: New test. * gas/mips/mips.exp: Run it.
* Update Turkish translation files for bfd, gas and opcodesNick Clifton2003-07-144-104/+452
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* Update pot files.Alan Modra2003-07-112-29/+55
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* 2000-05-25 Alexandre Oliva <aoliva@cygnus.com>Alexandre Oliva2003-07-103-1/+352
| | | | | | | | | | | | | | | | | | | | | | * m10300-dis.c (disassemble): Negate negative accumulator's shift. 2000-05-24 Alexandre Oliva <aoliva@cygnus.com> * m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume 32-bit longs when sign-extending operands. 2000-04-20 Alexandre Oliva <aoliva@cygnus.com> * m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs. * m10300-dis.c (HAVE_AM33_2): Define. (disassemble): Use it. (HAVE_AM33): Redefine. (print_insn_mn10300): Fix mask for 5-byte extended insns. 2000-04-01 Alexandre Oliva <aoliva@cygnus.com> * m10300-opc.c: Renamed AM332 to AM33_2. 2000-03-31 Alexandre Oliva <aoliva@cygnus.com> * m10300-opc.c: Defined AM33 2.0 register operands. Added support for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and bclr. Implemented `fbCC', `flCC', `dcpf' and all FP insns. * m10300-dis.c (print_insn_mn10300): Recognize 5byte extended insn code of AM33 2.0. (disassemble): Recognize FMT_D3. Print out FP register names.
* 2003-07-09 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2003-07-092-2/+8
| | | | | | * mips-dis.c (set_default_mips_dis_options): Get BFD from the disassembler_info's section, rather than from the disassembler_info's symbols pointer.
* * ppc-opc.c: Remove NULL pointer checks. Formatting. RemoveAlan Modra2003-07-073-93/+79
| | | | | | extraneous ATTRIBUTE_UNUSED. * ppc-dis.c (print_insn_powerpc): Always pass a valid address to operand->extract.
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