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* 2000-05-25 Alexandre Oliva <aoliva@cygnus.com>Alexandre Oliva2003-07-103-1/+352
| | | | | | | | | | | | | | | | | | | | | | * m10300-dis.c (disassemble): Negate negative accumulator's shift. 2000-05-24 Alexandre Oliva <aoliva@cygnus.com> * m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume 32-bit longs when sign-extending operands. 2000-04-20 Alexandre Oliva <aoliva@cygnus.com> * m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs. * m10300-dis.c (HAVE_AM33_2): Define. (disassemble): Use it. (HAVE_AM33): Redefine. (print_insn_mn10300): Fix mask for 5-byte extended insns. 2000-04-01 Alexandre Oliva <aoliva@cygnus.com> * m10300-opc.c: Renamed AM332 to AM33_2. 2000-03-31 Alexandre Oliva <aoliva@cygnus.com> * m10300-opc.c: Defined AM33 2.0 register operands. Added support for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and bclr. Implemented `fbCC', `flCC', `dcpf' and all FP insns. * m10300-dis.c (print_insn_mn10300): Recognize 5byte extended insn code of AM33 2.0. (disassemble): Recognize FMT_D3. Print out FP register names.
* 2003-07-09 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2003-07-092-2/+8
| | | | | | * mips-dis.c (set_default_mips_dis_options): Get BFD from the disassembler_info's section, rather than from the disassembler_info's symbols pointer.
* * ppc-opc.c: Remove NULL pointer checks. Formatting. RemoveAlan Modra2003-07-073-93/+79
| | | | | | extraneous ATTRIBUTE_UNUSED. * ppc-dis.c (print_insn_powerpc): Always pass a valid address to operand->extract.
* * ppc-opc.c: Convert to C90, removing unnecessary prototypes andAlan Modra2003-07-042-267/+221
| | | | casts. Formatting.
* * ppc-opc.c: Remove PARAMS from prototypes.Alan Modra2003-07-042-115/+136
| | | | | | | | (FXM4): Define. (insert_fxm): New function, used by both FXM and FXM4. (extract_fxm): Likewise. (XFXFXM_MASK): Remove 1 << 20 term. (powerpc_opcodes): Add Power4 version of "mfcr". Simplify "mtcr" mask.
* * s390-dis.c (s390_extract_operand): Add support for long displacements.Martin Schwidefsky2003-07-015-14/+224
| | | | | | | | | | | | | * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z990. * s390-opc.c (D20_20): Add define for 20 bit displacements. (INSTR_RRF_R0RR, INSTR_RSL_R0RD, INSTR_RSY_RRRD, INSTR_RSY_RURD, INSTR_RSY_AARD, INSTR_RXY_RRRD, INSTR_RXY_FRRD, INSTR_SIY_URD): Add new instruction formats. (MASK_RRF_R0RR, MASK_RSL_R0RD, MASK_RSY_RRRD, MASK_RSY_RURD, MASK_RSY_AARD, MASK_RXY_RRRD, MASK_RXY_FRRD, MASK_SIY_URD): Likewise. (s390_opformats): Likewise. * s390-opc.txt: Add new instructions for cpu type z990. Add missing hfp instructions. Add missing instructions pgin, pgout and xsch.
* gas/H.J. Lu2003-06-232-17/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (md_assemble): Support Intel Precott New Instructions. * gas/config/tc-i386.h (CpuPNI): New. (CpuUnknownFlags): Add CpuPNI. gas/testsuite/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add prescott. * gas/i386/prescott.d: New file. * gas/i386/prescott.s: Likewise. include/opcode/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Support Intel Precott New Instructions. opcodes/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in Intel Precott New Instructions. (PREGRP27): New. Added for "addsubpd" and "addsubps". (PREGRP28): New. Added for "haddpd" and "haddps". (PREGRP29): New. Added for "hsubpd" and "hsubps". (PREGRP30): New. Added for "movsldup" and "movddup". (PREGRP31): New. Added for "movshdup" and "movhpd". (PREGRP32): New. Added for "lddqu". (dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry. Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for entry 0xd0. Use PREGRP32 for entry 0xf0. (twobyte_has_modrm): Updated. (twobyte_uses_SSE_prefix): Likewise. (grps): Use PNI_Fixup in the "sidtQ" entry. (prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30, PREGRP31 and PREGRP32. (float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb. Use "fisttpll" in entry 1 in opcode 0xdd. Use "fisttp" in entry 1 in opcode 0xdf.
* * z8k-dis.c (instr_data_s): Change tabl_index from long to int.Christian Groessler2003-06-194-793/+992
| | | | | | | | | | | | | | | | (print_insn_z8k): Correctly check return value from z8k_lookup_instr call. (unparse_instr): Handle CLASS_IRO case. * z8kgen.c: Fix function definitions. Fix formatting. (opt): Add brk opcode alias for non-simulator breakpoint. Add missing and fix existing in/out and sin/sout opcode definitions. (args): "@ri", "@ro" - add CLASS_IRO register usage for in/out opcodes. (internal): Check p->flags for non-zero before dereferencing it. (gas): Add CLASS_IRO line. Insert new OPC_xxx lines for the added opcodes and renumber the remaining lines repectively. (main): Remove "-d" command line switch. * z8k-opc.h: Regenerate with new z8kgen.c.
* bfd/H.J. Lu2003-06-112-11/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. binutils/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. gas/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. gprof/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. ld/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. opcodes/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise.
* * bfd/Makefile.am (config.status): Depend on version.h.Alan Modra2003-06-104-15/+25
| | | | Run "make dep-am" in bfd/ and elsewhere, and regen files.
* opcodes:Doug Evans2003-06-1024-36/+48
| | | | | | | | | | | | | | | | | | * cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to CGEN_INSN_RELAXED. * fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate. * frv-asm.c,frv-desc.c,frv-desc.h: Regenerate. * ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate. * iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate. * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate. * openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate. * xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate. gas: * cgen.c (gas_cgen_finish_insn): CGEN_INSN_RELAX renamed to CGEN_INSN_RELAXED. * config/tc-fr30.c (md_estimate_size_before_relax): Ditto. * config/tc-m32r.c (md_estimate_size_before_relax): Ditto. * config/tc-openrisc.c (md_estimate_size_before_relax): Ditto.
* Add "attn", "lq" and "stq" power4 insns.Alan Modra2003-06-102-42/+161
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* opcodes/Richard Sandiford2003-06-102-1/+6
| | | | | | | | | | | | | * h8300-dis.c (bfd_h8_disassemble): Don't print brackets round rts/l and rte/l register lists. gas/ * config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register lists. Allow single-register ranges. testsuite/ * gas/h8300/h8sx_rtsl.[sd]: New test. * gas/h8300/h8300.exp: Run it.
* Add code to handle even-numbered only register operandsNick Clifton2003-06-059-182/+364
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* 2003-06-03 Michael Snyder <msnyder@redhat.com>Michael Snyder2003-06-032-190/+538
| | | | | | | and Bernd Schmidt <bernds@redhat.com> and Alexandre Oliva <aoliva@redhat.com> * disassemble.c (disassembler): Add support for h8300sx. * h8300-dis.c: Ditto.
* FRV: Use a signed 6-bit immediate value not unsigned for mdrotli insn.Nick Clifton2003-06-0315-599/+961
| | | | Use maintainer mode to regenerate ports.
* 2003-05-23 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2003-05-242-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gas: * config/tc-i860.c (target_xp): Declare variable. (OPTION_XP): Declare macro. (md_longopts): Add option -mxp. (md_parse_option): Set target_xp. (md_show_usage): Add -mxp usage. (i860_process_insn): Recognize XP registers bear, ccr, p0-p3. (md_assemble): Don't try expansions if XP_ONLY is set. * doc/c-i860.texi: Document -mxp option. gas/testsuite: * gas/i860/xp.s: New file. * gas/i860/xp.d: New file. include/opcode: * i860.h (expand_type): Add XP_ONLY. (scyc.b): New XP instruction. (ldio.l): Likewise. (ldio.s): Likewise. (ldio.b): Likewise. (ldint.l): Likewise. (ldint.s): Likewise. (ldint.b): Likewise. (stio.l): Likewise. (stio.s): Likewise. (stio.b): Likewise. (pfld.q): Likewise. opcodes: * i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3. (print_insn_i860): Grab 4 bits of the control register field instead of 3.
* Regenerate - forgot to commit with last commitAndreas Jaeger2003-05-201-2/+2
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* 2003-05-18 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2003-05-182-2/+10
| | | | | | | | | | | | | | | | gas: * config/tc-i860.c (i860_process_insn): Initialize fc after each opcode mismatch. include/opcode: * i860.h (form, pform): Add missing .dd suffix. opcodes: * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit, print it. bfd: * elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.
* * Makefile.am (libopcodes_la_LIBADD): Add libbfd.la.kettenis_i386newframe-20030517-mergepointAndreas Jaeger2003-05-172-2/+8
| | | | | (libopcodes_la_DEPENDENCIES): Add libbfd.la. * Makefile.in: Regenerated.
* New Romanian translationNick Clifton2003-05-164-4/+456
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* Add support for h8300hn and h8300snNick Clifton2003-05-122-2/+8
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* * i386-dis.c (print_insn): Test intel_syntax against (char) -1 incagney_writestrings-20030508-branchpointAlan Modra2003-05-092-1/+6
| | | | case char is unsigned.
* * z8k-dis.c (z8k_lookup_instr): Optimize FETCH_DATA calls.Christian Groessler2003-05-011-0/+8
| | | | | | | (unpack_instr): Fix representation of segmented addresses. (intr_name): Added, contains names of the parameters to the EI/DI instructions. (unparse_instr): Fix display of EI/DI parameters.
* * expr.h: Fix comments in operatorT typedef.Christian Groessler2003-05-011-4/+26
| | | | | | | | | | | | | | | | | | | | | * config/tc-z8k.c: Add 2003 to copyright message. Fold s_segm() and s_unseg() into one function s_segm(parm) which decides by the parameter. (md_begin): Don't set linkrelax. Only set Z8002 default if no command line argument was given to select the intended architecure. (get_interrupt_operand): Warn if NOP type code is emitted. (newfix): New parameter 'size', forward it to 'fix_new_exp'. (apply_fix): Call newfix with additional 'size' parameter. (build_bytes): Remove unused variable 'nib'. Detect overflow in 4 bit immediate arguments. (md_longopts): Add 'linkrelax' option. (md_parse_option): Adapt to new s_segm function. Set 'linkrelax' variable when 'linkrelax' command line option is specified. (md_show_usage): Display 'linkrelax' option. (md_apply_fix3): Fix cases R_IMM4L, R_JR, and R_IMM8. Add cases R_CALLR and R_REL16. * config/tc-z8k.h: Undef WARN_SIGNED_OVERFLOW_WORD.
* * fr30-desc.c,fr30-desc.h,fr30-opc.c,fr30-opc.h: Regenerate.Doug Evans2003-04-2226-172/+199
| | | | | | | | | * frv-desc.c,frv-desc.h,frv-opc.c,frv-opc.h: Regenerate. * ip2k-desc.c,ip2k-desc.h,ip2k-opc.c,ip2k-opc.h: Regenerate. * m32r-desc.c,m32r-desc.h,m32r-opc.c,m32r-opc.h: Regenerate. * m32r-opinst.c: Regenerate. * openrisc-desc.c,openrisc-desc.h,openrisc-opc.c,openrisc-opc.h: Regenerate. * xstormy16-desc.c,xstormy16-desc.h,xstormy16-opc.c,xstormy16-opc.h: Regenerate.
* Replace occurrances of 'Hitachi' with 'Renesas'.Nick Clifton2003-04-152-16/+19
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* * ia64-ic.tbl (fr-readers): Add mem-writers-fp.Nick Clifton2003-04-083-85/+97
| | | | | | | * ia64-asmtab.c: Regenerate. * gas/ia64/dependency-1.s: New file: Test read before write dependency. * gas/ia64/dependency-1.d: New file: Expected assembly results. * gas/ia64/ia64.exp: Run the new test.
* * mips-dis.c (mips_gpr_names_newabi): Reverted previous patch.Alexandre Oliva2003-04-082-1/+5
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* * mips-dis.c (mips_gpr_names_newabi): $12-$15 are named $t4-$t7.Alexandre Oliva2003-04-082-1/+5
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* Namespace cleanup for the tic4x target. Replace s/c4x/tic4x/ and ↵Svein Seldal2003-04-042-152/+158
| | | | s/c3x/tic3x/. 2003 copyright update
* Add Xtensa portNick Clifton2003-04-016-189/+745
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* Fixes for iWMMXt contribution.Nick Clifton2003-04-013-3/+8
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* Add iWMMXt supportNick Clifton2003-03-253-20/+238
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* * i386-dis.c (dis386): Recognize icebp (0xf1).Doug Evans2003-03-222-1/+5
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* * s390-dis.c (init_disasm): Rename S390_OPCODE_ESAME toMartin Schwidefsky2003-03-215-666/+717
| | | | | | | | | | | | | | S390_OPCODE_ZARCH. (print_insn_s390): Use new modes field of s390_opcodes. * s390-mkopc.c (ARCHBITS_ESAONLY, ARCHBITS_ESA, ARCHBITS_ESAME): Remove. (s390_opcode_mode_val, s390_opcode_cpu_val): New enums. (struct op_struct): Remove archbits. Add mode_bits and min_cpu. (insertOpcode): Replace archbits by min_cpu and mode_bits. (dumpTable): Write mode_bits and min_cpu instead of archbits. (main): Adapt to new format in s390-opcode.txt. * s390-opc.c (s390_opformats): Replace archbits by min_cpu and mode_bits. * s390-opc.txt: Replace archbits by min_cpu and mode_bits.
* Fix formatting. Update copyright date.Nick Clifton2003-03-172-63/+66
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* ppc-opc.c (powerpc_opcodes): Readd tlbre for PPC403.Daniel Jacobowitz2003-03-142-0/+5
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* * hppa-dis.c: Formatting.Alan Modra2003-02-252-142/+194
| | | | * hppa-dis.c (print_insn_hppa): Implement fcnv instruction modifiers.
* * hppa-dis.c (print_insn_hppa <2 bit space register>): Do not printAlan Modra2003-02-252-2/+11
| | | | the space register when the value is zero.
* 2003-02-23 Elias Athanasopoulos <elathan@phys.uoa.gr>Chris Demetriou2003-02-232-3/+8
| | | | | * mips-dis.c (print_mips_disassembler_options): Make 'i' unsigned, use ARRAY_SIZE in loops.
* 003-02-12 Dave Brolley <brolley@redhat.com>Dave Brolley2003-02-122-34/+39
| | | | * fr30-desc.c: Regenerate.
* * i386-dis.c (dq_mode, Edq): Define.Alan Modra2003-02-062-121/+129
| | | | | (dis386_twobyte): Correct movd operands. (OP_E): Handle dq_mode case.
* (print_insn_sparc): When examining values added in to rs1, make sure thatNick Clifton2003-01-292-46/+61
| | | | there are previous instructions.
* Add SH2E supportNick Clifton2003-01-233-201/+225
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* include/elf/ChangeLogAlan Modra2003-01-234-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * sh.h: Split out various bits to bfd/elf32-sh64.h. include/opcode/ChangeLog * m68hc11.h (cpu6812s): Define. bfd/ChangeLog * elf-bfd.h (struct bfd_elf_section_data): Remove tdata. Change dynindx to an int. Rearrange for better packing. * elf.c (_bfd_elf_new_section_hook): Don't alloc if already done. * elf32-mips.c (bfd_elf32_new_section_hook): Define. * elf32-sh64.h: New. Split out from include/elf/sh.h. (struct _sh64_elf_section_data): New struct. (sh64_elf_section_data): Don't dereference sh64_info (was tdata). * elf32-sh64-com.c: Include elf32-sh64.h. * elf32-sh64.c: Likewise. (sh64_elf_new_section_hook): New function. (bfd_elf32_new_section_hook): Define. (sh64_elf_fake_sections): Adjust for sh64_elf_section_data change. (sh64_bfd_elf_copy_private_section_data): Likewise. (sh64_elf_final_write_processing): Likewise. * elf32-sparc.c (struct elf32_sparc_section_data): New. (elf32_sparc_new_section_hook): New function. (SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete. (sec_do_relax): Define. (elf32_sparc_relax_section): Adjust to use sec_do_relax. (elf32_sparc_relocate_section): Likewise. * elf64-mips.c (bfd_elf64_new_section_hook): Define. * elf64-mmix.c (struct _mmix_elf_section_data): New. (mmix_elf_section_data): Define. Use throughout file. (mmix_elf_new_section_hook): New function. (bfd_elf64_new_section_hook): Define. * elf64-ppc.c (struct _ppc64_elf_section_data): New. (ppc64_elf_section_data): Define. Use throughout. (ppc64_elf_new_section_hook): New function. (bfd_elf64_new_section_hook): Define. * elf64-sparc.c (struct sparc64_elf_section_data): New. (sparc64_elf_new_section_hook): New function. (SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete. (sec_do_relax): Define. (sparc64_elf_relax_section): Adjust to use sec_do_relax. (sparc64_elf_relocate_section): Likewise. (bfd_elf64_new_section_hook): Define. * elfn32-mips.c (bfd_elf32_new_section_hook): Define. * elfxx-mips.c (struct _mips_elf_section_data): New. (mips_elf_section_data): Define. Use throughout. (_bfd_mips_elf_new_section_hook): New function. (mips_elf_create_got_section): Don't alloc used_by_bfd. * elfxx-mips.h (_bfd_mips_elf_new_section_hook): Declare. * elfxx-target.h (bfd_elfNN_new_section_hook): Add #ifndef. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. opcodes/ChangeLog * sh64-dis.c: Include elf32-sh64.h. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. gas/ChangeLog * config/tc-sh64.c (shmedia_frob_section_type): Adjust for changed sh64_elf_section_data. * config/tc-sh64.h: Include elf32-sh64.h. * config/tc-m68hc11.c: Don't include stdio.h. (md_show_usage): Fix missing continuation. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. ld/ChangeLog * emultempl/sh64elf.em: Include elf32-sh64.h. (sh64_elf_${EMULATION_NAME}_before_allocation): Adjust for changed sh64_elf_section_data. (sh64_elf_${EMULATION_NAME}_after_allocation): Likewise.
* * alpha-opc.c (alpha_opcodes): Add bugchk, rduniq, wruniq, gentrapRichard Henderson2003-01-172-0/+9
| | | | PAL entry points.
* * Makefile.am: Run "make dep-am".Alan Modra2003-01-164-84/+128
| | | | | * Makefile.in: Regenerate. * po/POTFILES.in: Regenerate.
* 2003-01-08 Klee Dienes <kdienes@apple.com>Klee Dienes2003-01-093-0/+7
| | | | | * Makefile.am (ALL_MACHINES): Add msp430-dis.lo. * Makefile.in: Regenerate.
* * ppc-opc.c (powerpc_macros <extrwi>): Accept a shift of 32.Alan Modra2003-01-082-2/+6
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