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* 2001-11-16 Ben Harris <bjh21@netbsd.org>Ben Harris2001-11-162-2/+8
| | | | | | * Makefile.in (armemu32.o): Replace $< with autoconf recommended $(srcdir)/.... (armemu26.o): Ditto.
* Add support for XScale's coprocessor access check register.Nick Clifton2001-10-185-988/+944
| | | | Fix formatting.
* Fix handling of XScale LDRD and STRD instructions with post indexed ↵Nick Clifton2001-05-112-6/+11
| | | | addressing modes.
* Check Mode not Bank in order to determine rocesor mode.Nick Clifton2001-05-082-1/+7
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* * XScale coprocessor support.Matthew Green2001-04-186-22/+284
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2001-04-18 matthew green <mrg@redhat.com> * armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes. (read_cp15_reg): Make non-static. (XScale_cp15_LDC): Update for write_cp15_reg() change. (XScale_cp15_MCR): Likewise. (XScale_cp15_write_reg): Likewise. (XScale_check_memacc): New function. Check for breakpoints being activated by memory accesses. Does not support the Branch Target Buffer. (XScale_set_fsr_far): New function. Set FSR and FAR for XScale. (XScale_debug_moe): New function. Set the debug Method Of Entry, if configured. (write_cp14_reg): Reset count counter if requested. * armdefs.h (struct ARMul_State): New members `LastTime' and `CP14R0_CCD' used for the timer/counters. (ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS, ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD, ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2, ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2, ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT, ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X, ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT, ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New defines for XScale registers. (XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype. (ARMul_Emulate32, ARMul_Emulate26): Clean up function definition. (ARMul_Emulate32): Handle the clock counter and hardware instruction breakpoints. Call XScale_set_fsr_far() for software breakpoints and software interrupts. (LoadMult): Call XScale_set_fsr_far() for data aborts. (LoadSMult): Likewise. (StoreMult): Likewise. (StoreSMult): Likewise. * armemu.h (write_cp15_reg): Update prototype. * arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime. (ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13 register 0. * armvirt.c (GetWord): Call XScale_check_memacc(). (PutWord): Likewise.
* Do not enable alignment checking when loading unaligned thumb instructions.Nick Clifton2001-03-202-2/+7
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* Fix BLX(1) for ThumbNick Clifton2001-03-062-5/+24
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* Add support for disabling alignment checks when performing GDB interfaceNick Clifton2001-02-288-44/+95
| | | | | calls or SWI emulaiton routines. (Alignment checking code has not yet been contributed).
* Remove Prefetch abort for breakpoints. Instead set the state to RESUME.Nick Clifton2001-02-162-12/+7
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* Add code to preserve processor mode when a prefetchNick Clifton2001-02-152-0/+14
| | | | abort is signalled after processing a breakpoint.
* Reset processor into ARM mode for any machine type except the early ARMs.Nick Clifton2001-02-142-12/+20
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* remove spurious whitespaceNick Clifton2001-02-141-6/+6
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* Prevent Aborts from happening whilst emulating a SWINick Clifton2001-02-142-62/+83
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* Fix definition of NEGBRANCHNick Clifton2001-02-122-1/+6
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* Add parentheses ready for future conbtributionNick Clifton2001-02-011-39/+63
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* Update base address register after restoring register bank.Nick Clifton2001-02-012-26/+64
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* Detect installation of SWI vector by running program as well as loading program.Nick Clifton2001-02-015-7/+18
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* Fix test for StoreDouble Instruction.Nick Clifton2000-12-192-12/+17
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* Add 0x91 as an FPE SWI.Nick Clifton2000-12-112-0/+5
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* oops - remove redundant prototype introduced in previous deltaNick Clifton2000-12-081-2/+0
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* Add emulation of double word load and store instructions.Nick Clifton2000-12-082-3/+348
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* Suppress support of DEMON swi's in XScale mode.Nick Clifton2000-12-032-71/+109
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* Add support for ARM's v5TE architecture and Intel's XScale extenstionsNick Clifton2000-11-3010-250/+1763
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* Replace StrongARM property with v4 and v5 properties.Nick Clifton2000-09-156-90/+119
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* Compute write back value for post increment loads beforeNick Clifton2000-08-152-34/+47
| | | | performing the load in case the offset register is overwritten.
* 2000-07-14 Fernando Nasser <fnasser@cygnus.com>Fernando Nasser2000-07-142-1/+5
| | | | * wrapper.c (sim_create_inferior): Fix typo in the previous patch.
* 2000-07-14 Fernando Nasser <fnasser@cygnus.com>Fernando Nasser2000-07-142-0/+9
| | | | | * wrapper.c (sim_create_inferior): Reset mode to ARM when creating a new inferior.
* * armvirt.c (ABORTS): Do not define.Alexandre Oliva2000-07-042-1/+3
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* * armdefs.h (struct ARMul_State): Add is_StrongARM.Alexandre Oliva2000-07-045-11/+59
| | | | | | | | | | (ARM_Strong_Prop, STRONGARM): Define. * arminit.c (ARMul_NewState): Reset is_StrongARM. (ARMul_SelectProcessor): Set is_StrongARM. * wrapper.c (sim_create_inferior): Use bfd machine type to determine processor type to emulate. * armemu.h (BUSUSEDINCPCS, BUSUSEDINCPCN): Don't increment PC when emulating StrongARM.
* * armemu.c (ARMul_Emulate, t_undefined): Proceed to next insn.Alexandre Oliva2000-07-042-1/+3
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* * armemu.h (INSN_SIZE): New macro.Alexandre Oliva2000-07-044-45/+48
| | | | | | | (SET_ABORT): Save CPSR in SPSR and set LR. * armemu.c (ARMul_Emulate, isize): Set to INSN_SIZE. (WriteR15, WriteSR15): Do not discard bit 1 in Thumb mode. * arminit.c (ARMul_Abort): Use new SETABORT and INSN_SIZE.
* * armemu.c (LoadSMult): Use WriteR15() to discard the leastAlexandre Oliva2000-07-042-2/+5
| | | | significant bits of PC.
* * armemu.h (WRITEDESTB): New macro.Alexandre Oliva2000-07-043-37/+48
| | | | | | | | | * armemu.c (ARMul_Emulate26, bl): Use WriteR15Branch() to modify PC. Moved the existing logic... (WriteR15Branch): ... here. New function. (WriteR15, WriteSR15): Drop the two least significant bits. (LoadSMult): Use WriteR15Branch() to modify PC. (LoadMult): Use WRITEDESTB() instead of WRITEDEST().
* * armemu.h (GETSPSR): Call ARMul_GetSPSR().Alexandre Oliva2000-07-043-4/+18
| | | | | | | | * armsupp.c (ARMul_CPSRAltered): Zero out bits as they're extracted from state->Cpsr, but preserve the unused bits. (ARMul_GetCPSR): Get bits preserved in state->Cpsr. (ARMul_GetSPSR, ARMul_FixCPSR): Use ARMul_GetCPSR() to get the full CPSR word.
* * armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New.Alexandre Oliva2000-07-044-30/+40
| | | | | | | | | (SETPSR_F, SETPSR_S, SETPSR_X, SETPSR_C): New macros. (SETPSR, SET_INTMODE, SETCC): Removed. * armsupp.c (ARMul_FixCPSR, ARMul_FixSPSR): Do not test bit mask. Use SETPSR_* to modify PSR. (ARMul_SetCPSR): Load all bits from value. * armemu.c (ARMul_Emulate, msr): Do not test bit mask.
* * armemu.c (ARMul_Emulate): Compute writeback value beforeAlexandre Oliva2000-07-042-8/+20
| | | | | loading, since the offset register may be the destination register.
* * armdefs.h (SYSTEMBANK): Define as USERBANK.Alexandre Oliva2000-07-043-8/+6
| | | | * armsupp.c (ARMul_SwitchMode): Remove SYSTEMBANK cases.
* * armemu.c (Multiply64): Fix computation of flag N.Alexandre Oliva2000-06-222-4/+5
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* * armemu.c (MultiplyAdd64): Fix computation of flag N.Alexandre Oliva2000-06-222-4/+7
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* * armemu.h (NEGBRANCH): Do not overwrite the two most significantAlexandre Oliva2000-06-202-1/+6
| | | | bits of the offset.
* Add support for v4 SystemMode.Nick Clifton2000-05-3011-57/+159
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* Change profiling so that it is enabled by default. Re-generate everything.Andrew Cagney2000-05-242-147/+162
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* Add special case handling when GDB set CPSR registerNick Clifton2000-05-232-1/+12
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* * arm abort fixFrank Ch. Eigler2000-04-102-3/+8
| | | | | | | 2000-03-11 Philip Blundell <philb@gnu.org> * armemu.c (LoadSMult, LoadMult): Correct handling of aborts. Patch from Allan Skillman <Allan.Skillman@arm.com>.
* * memory corruption fixFrank Ch. Eigler2000-03-232-2/+8
| | | | | | Wed Mar 22 15:24:21 2000 glen mccready <gkm@pobox.com> * wrapper.c (sim_open,sim_close): Copy into myname, free myname.
* * adding forgotten entryFrank Ch. Eigler2000-03-021-0/+1
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* Fix compile time warning messages.Nick Clifton2000-02-0810-669/+109
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* import gdb-2000-02-04 snapshotJason Molenda2000-02-0527-8246/+9283
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* import gdb-2000-01-26 snapshotJason Molenda2000-01-262-5/+20
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* import gdb-1999-12-06 snapshotJason Molenda1999-12-073-8/+26
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