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* 2004-04-11 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2004-04-113-7/+31
| | | | | | | * utils-fpu.inc (enable_fpu, ckm_fp_cc): New macros. (clrset_fp_cc): Fix mask used for upper 7 condition codes. * utils-mdmx.inc: Include utils-fpu.inc. (enable_mdmx): Use enable_fpu.
* 2004-04-10 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2004-04-116-0/+904
| | | | | | | | * utils-fpu.inc: New file. * utils-mdmx.inc: New file. * mdmx-ob.s: New file. * mdmx-ob-sb1.s: New file. * basic.exp: Run new mdmx-ob and mdmx-ob-sb1 tests.
* im/mips/ChangeLog ]Chris Demetriou2004-04-105-1/+137
| | | | | | | | | | | | | 2004-04-10 Chris Demetriou <cgd@broadcom.com> * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New. [ sim/testsuite/sim/mips/ChangeLog ] 2004-04-10 Chris Demetriou <cgd@broadcom.com> * fpu64-ps-sb1.s: New file. * basic.exp: Recognize mipsisa64sb1 targets, and run fpu64-ps-sb1.s if appropriate.
* 2004-04-10 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2004-04-103-0/+374
| | | | | * fpu64-ps.s: New file. * basic.exp: Run fpu64-ps.s.
* (and adjust paths in last entry, for moveChris Demetriou2004-04-101-2/+2
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* move entry from:Chris Demetriou2004-04-102-9/+9
| | | | | 2004-03-29 Richard Sandiford <rsandifo@redhat.com> from ChangeLog into sim/mips/Changelog
* 2004-04-09 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2004-04-102-62/+47
| | | | | | | | | | | | | | * mips.igen (check_fmt): Remove. (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W) (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt) (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt) (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt) (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt) (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats. (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt) (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt) (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt. (C.cnd.fmta): Remove incorrect call to check_fmt_p.
* 2004-04-09 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2004-04-102-21/+28
| | | | | * sb1.igen (check_sbx): New function. (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
* Fix date in last delta.Richard Sandiford2004-03-292-2/+2
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* * sim/mips/hilo-hazard-[123].s: New files.Richard Sandiford2004-03-295-4/+107
| | | | | | | | * sim/mips/basic.exp (run_hilo_test): New procedure. (models): Only list models that are included in the configuration. (submodels): New variable, set to submodels of the above. (mips64vr-*-elf, mips64vrel-*-elf): New configuration stanza. Run hilo-hazard-[123].s.
* * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)Richard Sandiford2004-03-293-13/+72
| | | | | | | (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New. * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide separate implementations for mipsIV and mipsV. Use new macros to determine whether the restrictions apply.
* * MAINTAINERS: Update my mail address.Ben Elliston2004-03-102-1/+5
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* Add fr450 support.Richard Sandiford2004-03-0136-109/+20169
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* cpu/Richard Sandiford2004-03-015-65/+55
| | | | | | | | | | | | | | | | | | | | | | | | * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. (scutss): Change unit to I0. (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. (mqsaths): Fix FR400-MAJOR categorization. (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) combinations. opcodes/ * frv-desc.c, frv-opc.c: Regenerate. sim/frv/ * cache.c (frv_cache_init): Change fr400 cache statistics to match the fr405. (non_cache_access): Add missing breaks. * interrupts.c (set_exception_status_registers): Always set EAR15 for data_access_errors. * memory.c (fr400_check_write_address): Remove redundant alignment check. * model.c: Regenerate.
* sim/frv/Richard Sandiford2004-03-014-72/+132
| | | | | | | | * frv.c (frvbf_iacc_cut): Rework, taking rounding into account. testsuite/ * sim/frv/fr400/scutss.cgs: Fix tests to account for rounding. Add some new ones.
* cpu/Richard Sandiford2004-03-0116-3172/+151
| | | | | | | | | | | | | | | | | | | | | * frv.cpu (r-store, r-store-dual, r-store-quad): Delete. (rstb, rsth, rst, rstd, rstq): Delete. (rstbf, rsthf, rstf, rstdf, rstqf): Delete. gas/testsuite/ * gas/frv/allinsn.s (rstb, rsth, rst, rstd, rstq): Replace with nops. (rstbf, rsthf, rstf, rstdf, rstqf): Likewise. * gas/frv/allinsn.d: Update accordingly. opcodes/ * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate. sim/frv/ * decode.c, decode.h, model.c, sem.c: Regenerate. sim/testsuite/ * sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete. * sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
* 2004-02-02 Michael Snyder <msnyder@redhat.com>Michael Snyder2004-02-132-2/+6
| | | | * gencode.c (movua.l): Set thislock to 0, not n.
* 2004-02-12 Michael Snyder <msnyder@redhat.com>Michael Snyder2004-02-126-3/+201
| | | | | | * and.s, movi.s, sett.s: New files. * allinsn.exp: Add new tests. * testutils.inc (set_sr_bit): Fix macro labels.
* 2004-02-12 Michael Snyder <msnyder@redhat.com>Michael Snyder2004-02-123-5/+13
| | | | | | | | * gencode.c (table): Change from char to short. (dumptable): Change generated table from char to short. * interp.c (sh_jump_table, sh_dsp_table, ppi_table): char to short. (init_dsp): Compute size of sh_dsp_table. (sim_resume): Change jump_table from char to short.
* 2004-02-04 Andrew Cagney <cagney@redhat.com>Andrew Cagney2004-02-043-22/+133
| | | | | | | Committed by Andrew Cagney. * mloopx.in: Update copyright. (xextract-pbb): Fixed trap for system calls operation in parallel. * mloop2.in (xextract-pbb): Ditto.
* 2004-01-27 Michael Snyder <msnyder@redhat.com>Michael Snyder2004-01-272-8/+12
| | | | | | | * gencode.c: (op tab): Some refs and defs fixes. "fsrra" -> "fsrra <FREG_N>". "sleep": replace array ref with array addr. "trapa": ditto.
* 2004-01-27 Michael Snyder <msnyder@redhat.com>Michael Snyder2004-01-272-19/+22
| | | | * gencode.c: Comment and whitespace clean-ups.
* 2004-01-27 Andrew Cagney <cagney@redhat.com>Andrew Cagney2004-01-272-2/+7
| | | | | * ppc-instructions: Update copyright. (convert_to_integer): Add trailing ";" to label.
* [ sim/ChangeLog ]Chris Demetriou2004-01-268-5/+214
| | | | | | | | | | | | | | | | | | | 2004-01-26 Chris Demetriou <cgd@broadcom.com> * configure.in (mips*-*-*): Configure in testsuite. * configure: Regenerate. [ sim/testsuite/ChangeLog ] 2004-01-26 Chris Demetriou <cgd@broadcom.com> * sim/mips: New directory. Tests for the MIPS simulator. [ sim/testsuite/sim/mips/ChangeLog ] 2004-01-26 Chris Demetriou <cgd@broadcom.com> * basic.exp: New file. * testutils.inc: New file. * sanity.s: New file.
* * lib/sim-defs.exp (run_sim_test): Delete the .o and .x files if aBen Elliston2004-01-232-0/+7
| | | | test passes.
* 2004-01-19 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2004-01-202-11/+69
| | | | | | | | * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo) (check_mult_hilo): Improve comments. (check_div_hilo): Likewise. Also, fork off a new version to handle mips32/mips64 (since there are no hazards to check in MIPS32/MIPS64).
* * simops.c: Include <sys/types.h>.Mark Kettenis2004-01-182-0/+6
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* * Makefile.in (clean): Remove rm -f $(ALL), as $(ALL) is empty.Ben Elliston2004-01-152-1/+4
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* 2004-01-07 Michael Snyder <msnyder@redhat.com>Michael Snyder2004-01-103-122/+134
| | | | | * gencode.c: Whitespace cleanup. * interp.c: Ditto.
* 2004-01-07 Michael Snyder <msnyder@redhat.com>Michael Snyder2004-01-0916-1/+2462
| | | | | | | | * dmxy.s, fipr.s, fpchg.s, ldrc.s, loop.s, movli.s, movua.s, movxy.s, pabs.s, pclr.s, prnd.s, psub.s, pswap.s: New files. * allinsn.exp: Add new tests. * testutils.inc (set_sr_bit): Add argument. (set_greg): Add .align directives.
* 2004-01-07 Michael Snyder <msnyder@redhat.com>Michael Snyder2004-01-093-137/+588
| | | | | | | | | | | | | | | | | | | * gencode.c: Replace 'Hitachi' with 'Renesas'. (op tab): Add new instructions for sh4a, DBR, SBR. (expand_opcode): Add handling for new movxy combinations. (gensym_caselist): Ditto. (expand_ppi_movxy): Remove movx/movy expansions, now handled in expand_opcode. (gensym): Add some helpful macros. (expand_ppi_code): Flatten loop for simplicity, tweak for 12-bit instead of 8-bit table (some insns are ambiguous to 8 bits). (ppi_gensim, main): Generate 12-bit instead of 8-bit ppi table. * interp.c: Replace 'Hitachi' with 'Renesas'. (union saved_state_type): Add dbr, sgr, ldst. (get_loop_bounds_ext): New function. (init_dsp): Add bfd_mach_sh4al_dsp. (sim_resume): Handle extended loop bounds.
* 2003-12-18 Michael Snyder <msnyder@redhat.com>Michael Snyder2004-01-062-90/+93
| | | | | | | | | | | | * gencode.c (expand_opcode): Simplify and reorganize. Eliminate "shift" parameter. Eliminate "4 bits at a time" assumption. Flatten switch statement to a single level. Add "eeee" token for even-numbered registers. (bton): Delete. (fsca): Use "eeee" token. (ppi_moves): Rename to "expand_ppi_movxy". Do the ddt [movx/movy] expansion here, as well as the ppi expansion. (gensim_caselist): Accept 'eeee' along with 'nnnn'.
* 2004-01-05 Michael Snyder <msnyder@redhat.com>Michael Snyder2004-01-062-1/+5
| | | | * compile.c (sim_load): Don't pass a type to bfd_openr.
* * armos.c (fcntl.h): Do not include it.Mark Mitchell2003-12-293-26/+28
| | | | | | | | | | (O_RDONLY): Do not define. (O_WRONLY): Likewise. (O_RDWR): Likewise. (targ-vals.h): Include it. (translate_open_mode): Use TARGET_O_* instead of O_*. (SWIopen): Likewise. * Makefile.in (armos.o): Depend on targ-vals.h.
* Add support for m32r-linux target, including a RELA ABI and PIC.Nick Clifton2003-12-1910-2/+1668
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* 2003-12-16 Michael Snyder <msnyder@redhat.com>Michael Snyder2003-12-162-1/+6
| | | | | Patch submitted by Anil Paranjape <AnilP1@KPITCummins.com> * sim-main.h (H8300H_MSIZE): Increase from 18 bits to 24 bits.
* oops - forgot to add this file!Nick Clifton2003-12-121-0/+484
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* Add support for the m32r2 processorNick Clifton2003-12-1130-168/+16057
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* Fix GDB crash problem when object file of different H8 cpu is loadedDhananjay Deshpande2003-12-112-0/+6
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* More reversion of incomplete m32r changes. Should be back to normal.Andrew Cagney2003-12-075-188/+27
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* Revert last commit, build problems.Andrew Cagney2003-12-077-117/+18
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* 2003-12-02 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>Andrew Cagney2003-12-077-13/+122
| | | | | | | | | | | | * Makefile.in : Add new machine m32r2. * m32r2.c : New file for m32r2. * mloop2.in : Ditto * model2.c : Ditto * sem2-switch.c : Ditto * m32r-sim.h : Add EVB register. * sim-if.h : Ditto * sim-main.h : Ditto * traps.c : Ditto
* * frv-sim.h (GR_REGNUM_MAX, FR_REGNUM_MAX, PC_REGNUM, SPR_REGNUM_MIN)Kevin Buettner2003-11-243-21/+64
| | | | | | | | (SPR_REGNUM_MAX): Delete. * frv.c (gdb/sim-frv.h): Include. (frvbf_fetch_register, frvbf_store_register): Use register number constants from gdb/sim-frv.h. Check availability of general purpose and float registers.
* * sim-options.c (standard_options): Fix the names of H8Kazu Hirata2003-11-222-3/+8
| | | | variants.
* Move an entry that belong to sim/h8300/ChangeLog.Kazu Hirata2003-11-152-13/+15
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* 2003-11-03 Dave Brolley <brolley@redhat.com>Dave Brolley2003-11-032-3/+17
| | | | | * cache.c (address_interference): Check for higher priority requests in the same pipeline.
* * interp.c (fsca_s, fsrra_s): New functions.Joern Rennecke2003-11-033-6/+87
| | | | | * gencode.c (tab): Add entries for fsca and fsrra. (expand_opcode): Allow variable length n / m fields.
* Fix more typosDave Brolley2003-10-311-1/+1
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* Fix typos.Dave Brolley2003-10-311-2/+2
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* 2003-10-31 Dave Brolley <brolley@redhat.com>Dave Brolley2003-10-313-8/+38
| | | | | | | | | | * frv-sim.h (REGNUM_LR): Removed. (REGNUM_SPR_MIN,REGNUM_SPR_MAX): New macros. * frv.c (frvbf_fetch_register): Fetch SPR registers based on REGNUM_SPR_MIN and REGNUM_SPR_MAX. Check whether SPRs are implemented. Return 0 for an unimplemented register. Return the length of the data for an implemented register. (frvbf_store_register): Ditto.
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