| Commit message (Collapse) | Author | Age | Files | Lines |
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* gcore.c: Add restore-corefile-command.
(call_target_sbrk): Abstracted from derive_heap_segment.
(derive_heap_segment): Call call_target_sbrk instead of
coding it inline.
(load_core_sections): Callback for bfd_map_over_sections.
(rcore_command): Implements restore-corefile-command ('rcore').
(__initialize_gcore): Add new command rcore/restore-corefile.
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simulator.
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(open_map): Use TARGET_O_ACCMODE, TARGET_O_RDONLY and
TARGET_O_WRONLY.
(cris_break_13_handler) <case TARGET_SYS_fcntl>: Add support for
F_GETFL on fd 0, 1 and 2.
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last_open_fd, last_open_flags.
* cris/traps.c: Don't include targ-vals.h.
(TARGET_O_ACCMODE): Define.
(cris_break_13_handler): Set new _sim_cpu members.
<case TARGET_SYS_fcntl>: Support special case of F_GETFL.
Rearrange code as switch. Emit "unimplemented" abort for
unimplemented fcntl calls.
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(syscall_stat32_map): Add entry for TARGET_SYS_stat.
(cris_break_13_handler) <case TARGET_SYS_stat>: New case.
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* sim/arm/armos.c: Include limits.h
(unlink): Remove this macro. It is unused in this file and
conflicts with sim_callback->unlink.
(PATH_MAX): Define as 1024 if not already defined.
(ReadFileName): New function.
(SWIopen): Fix a potential buffer overflow.
(SWIremove): New function.
(SWIrename): Ditto.
(ARMul_OSHandleSWI): Handle the RDP calls SWI_IsTTY,
SWI_Remove, and SWI_Rename, as well as the RDI calls
AngelSWI_Reason_IsTTY, AngelSWI_Reason_Remove, and
AngelSWI_Reason_Rename.
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low 32 bits are used after an unsigned long cast.
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* interp.c (sim_memory_size): Use same amount of memory on Windows as
elsewhere.
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* cpu.c,cpu.h,decode.c,decode.h,model.c,sem.c: Regenerate.
Contribute the following changes:
2003-09-29 Dave Brolley <brolley@redhat.com>
* frv-sim.h: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
CGEN_ATTR_VALUE_TYPE.
* mloop.in: Ditto.
* pipeline.c: Ditto.
* traps.c: Ditto.
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* armdefs.h: Define ARMsword and ARMsdword. Use stdint.h when
available.
* armemu.c: Use them.
* armvirt.c (ARMul_MemoryInit): Use correct type for size.
* configure.ac: Check for stdint.h.
* config.in: Regenerate.
* configure: Regenerate.
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(mcalloc): New function / macro.
(mfree): New macro.
(sim_size): Use mcalloc and mfree.
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* hw_register.c: Likewise.
* hw_trace.c: Likewise.
* hw_vm.c: Likewise.
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change.
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different fraction for a quiet NaN.
(unpack_fpu): Likewise.
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* sim-load.c: Likewise.
* syscall.c: Likewise.
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Ralf Corsepius <ralf.corsepius@rtems.org>.
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(check_u64): Add mips16e tag.
* m16e.igen: New file for MIPS16e instructions.
* configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
models.
* configure: Regenerate.
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* MAINTAINERS: Update my mail address, move myself to the
"Past maintainers" section.
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* mips.igen (mips32r2, mips64r2): New ISA models. Add new model
tags to all instructions which are applicable to the new ISAs.
(do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
vr.igen.
* mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
instructions.
* vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
to mips.igen.
* configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
* configure: Regenerate.
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(ARMul_ThumbDecode): Call handle_v6_thumb_insn() when an undefined instruction
binary is encountered.
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check.
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* configure: Regenerate.
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inclusion of cgen.h.
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* common/callback.c (PIPE_BUF): Provide default refinition.
(os_lstat): Use stat if lstat is not available on the host.
(os_ftruncate): Return EINVAL if not available on the host.
(os_truncate): Ditto.
* common/configure.ac: Check for lstat, truncate and ftruncate.
* common/configure: Regenerate.
* common/config.in: Regenerate.
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* common/Make-common.in: Add $(EXEEXT) to "run".
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instructions - the ones now generated by GCC.
(ARMulEmulate32): Call handle_v6_insn when a possible v6 insn is found.
* armdefs.h (struct ARMul_State): Add new field: is_v6.#
(ARM_v6_Prop): Define.
* arminit.c (ARMul_NewState): Initialise the v6 flag.
(ARMul_SelectProcessor): Determine if the v6 flag should be set.
* wrapper.c (sim_create_inferior): For unknown architectures, default to allowing the v6 instructions.
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2005-04-20 Manoj Iyer <manjo@austin.ibm.com>
* psim.c: Added libiberty.h header file.
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2005-04-20 Manoj Iyer <manjo@austin.ibm.com>
* sim-types.h: Changed unsigned32 and unsigned64 to signed32
and signed64 for __ALPHA__.
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__GNU__.
2005-04-18 Manoj Iyer <manjo@austin.ibm.com>
* configure.ac: Added check for long long.
* config.in: Regenerated.
* configure: Regenerated.
* words.h: Modified logic to check for HAVE_LONG_LONG instead of
__GNUC__, added config.h header file.
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(WSLL, WSRA, WSRL, WUNPCKEH, WUNPACKEL): Use ULL suffix to indicate an
unsigned long long constant.
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For ((len & 8191) != 0 && fd == (USI) -1), don't say this isn't
implemented. In call to create_map, pad length argument to 8k.
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* configure: Regenerate.
* sh64/configure.ac: New file.
* sh64/configure.in: Remove.
* sh64/configure: Regenerate.
* sh64/defs-media.h (sem_fields): Add missing sfmt_ldhil member.
* sh64/sim-if.c (sim_open): Use struct bfd instead of struct _bfd.
(sim_create_inferior): Ditto.
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* arm/wrapper.c: Provide SIGTRAP and SIGBUS.
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include cgen-ops.h in decodev10.c and decodev32.c.
* cris/sim-main.h: Don't include cgen-ops.h here.
* cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c,
cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
cris/semcrisv32f-switch.c: Regenerate.
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TARGET_SYS_rt_sigaction>: Rename sa_handler, sa_flags,
sa_restorer, sa_mask_low, sa_mask_high to target_sa_handler etc.
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