From 1393f652d71c0c84faba5a69fbb02aa459b8f8de Mon Sep 17 00:00:00 2001 From: Chris Demetriou Date: Tue, 30 Sep 2003 16:17:15 +0000 Subject: [ bfd/ChangeLog ] 2003-09-30 Chris Demetriou * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2. --- bfd/ChangeLog | 12 ++++++++++++ bfd/aoutx.h | 1 + bfd/archures.c | 1 + bfd/bfd-in2.h | 1 + bfd/cpu-mips.c | 2 ++ bfd/elfxx-mips.c | 11 +++++++++++ 6 files changed, 28 insertions(+) (limited to 'bfd') diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 92dbe68c60e..aae16dbe95a 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,15 @@ +2003-09-30 Chris Demetriou + + * archures.c (bfd_mach_mipsisa64r2): New define. + * bfd-in2.h: Regenerate. + * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. + * cpu-mips.c (I_mipsisa64r2): New enum value. + (arch_info_struct): Add entry for I_mipsisa64r2. + * elfxx-mips.c (_bfd_elf_mips_mach) + (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. + (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. + (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. + 2003-09-29 H.J. Lu * elfxx-ia64.c (elfNN_hpux_backend_symbol_processing): New. diff --git a/bfd/aoutx.h b/bfd/aoutx.h index 674fc76316e..3c495380d15 100644 --- a/bfd/aoutx.h +++ b/bfd/aoutx.h @@ -801,6 +801,7 @@ NAME(aout,machine_type) (arch, machine, unknown) case bfd_mach_mipsisa32r2: case bfd_mach_mips5: case bfd_mach_mipsisa64: + case bfd_mach_mipsisa64r2: case bfd_mach_mips_sb1: /* FIXME: These should be MIPS3, MIPS4, MIPS16, MIPS32, etc. */ arch_flags = M_MIPS2; diff --git a/bfd/archures.c b/bfd/archures.c index 9033f2826de..c79e925bb38 100644 --- a/bfd/archures.c +++ b/bfd/archures.c @@ -148,6 +148,7 @@ DESCRIPTION .#define bfd_mach_mipsisa32 32 .#define bfd_mach_mipsisa32r2 33 .#define bfd_mach_mipsisa64 64 +.#define bfd_mach_mipsisa64r2 65 . bfd_arch_i386, {* Intel 386 *} .#define bfd_mach_i386_i386 1 .#define bfd_mach_i386_i8086 2 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index a7cca3e26cd..d74fc1c48e0 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -1577,6 +1577,7 @@ enum bfd_architecture #define bfd_mach_mipsisa32 32 #define bfd_mach_mipsisa32r2 33 #define bfd_mach_mipsisa64 64 +#define bfd_mach_mipsisa64r2 65 bfd_arch_i386, /* Intel 386 */ #define bfd_mach_i386_i386 1 #define bfd_mach_i386_i8086 2 diff --git a/bfd/cpu-mips.c b/bfd/cpu-mips.c index e64ee069c57..10d4e4775d3 100644 --- a/bfd/cpu-mips.c +++ b/bfd/cpu-mips.c @@ -85,6 +85,7 @@ enum I_mipsisa32, I_mipsisa32r2, I_mipsisa64, + I_mipsisa64r2, I_sb1, }; @@ -116,6 +117,7 @@ static const bfd_arch_info_type arch_info_struct[] = N (32, 32, bfd_mach_mipsisa32, "mips:isa32", FALSE, NN(I_mipsisa32)), N (32, 32, bfd_mach_mipsisa32r2,"mips:isa32r2", FALSE, NN(I_mipsisa32r2)), N (64, 64, bfd_mach_mipsisa64, "mips:isa64", FALSE, NN(I_mipsisa64)), + N (64, 64, bfd_mach_mipsisa64r2,"mips:isa64r2", FALSE, NN(I_mipsisa64r2)), N (64, 64, bfd_mach_mips_sb1, "mips:sb1", FALSE, 0), }; diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index 0063100f8ec..fa572958d47 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -4056,6 +4056,10 @@ _bfd_elf_mips_mach (flags) case E_MIPS_ARCH_32R2: return bfd_mach_mipsisa32r2; break; + + case E_MIPS_ARCH_64R2: + return bfd_mach_mipsisa64r2; + break; } } @@ -7192,6 +7196,10 @@ mips_set_isa_flags (abfd) case bfd_mach_mipsisa32r2: val = E_MIPS_ARCH_32R2; break; + + case bfd_mach_mipsisa64r2: + val = E_MIPS_ARCH_64R2; + break; } elf_elfheader (abfd)->e_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH); elf_elfheader (abfd)->e_flags |= val; @@ -8929,6 +8937,7 @@ struct mips_mach_extension { static const struct mips_mach_extension mips_mach_extensions[] = { /* MIPS64 extensions. */ + { bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 }, { bfd_mach_mips_sb1, bfd_mach_mipsisa64 }, /* MIPS V extensions. */ @@ -9275,6 +9284,8 @@ _bfd_mips_elf_print_private_bfd_data (abfd, ptr) fprintf (file, _(" [mips64]")); else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32R2) fprintf (file, _(" [mips32r2]")); + else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_64R2) + fprintf (file, _(" [mips64r2]")); else fprintf (file, _(" [unknown ISA]")); -- cgit v1.2.1