From 1b2dc2998ba4d95dca036cb0f8cb2ee23d903ffb Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Mon, 13 Aug 2001 08:09:58 +0000 Subject: * mcore-dis.c: Fix formatting. * mips-dis.c: Likewise. * pj-dis.c: Likewise. * z8k-dis.c: Likewise. --- opcodes/mips-dis.c | 79 ++++++++++++++++++++++++++---------------------------- 1 file changed, 38 insertions(+), 41 deletions(-) (limited to 'opcodes/mips-dis.c') diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index eb18ff876b5..36d80ae40d4 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -28,7 +28,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* FIXME: These are needed to figure out if the code is mips16 or not. The low bit of the address is often a good indicator. No symbol table is available when this code runs out in an embedded - system as when it is used for disassembler support in a monitor. */ + system as when it is used for disassembler support in a monitor. */ #if !defined(EMBEDDED_ENV) #define SYMTAB_AVAILABLE 1 @@ -54,13 +54,11 @@ static void print_mips16_insn_arg /* FIXME: These should be shared with gdb somehow. */ /* The mips16 register names. */ -static const char * const mips16_reg_names[] = -{ +static const char * const mips16_reg_names[] = { "s0", "s1", "v0", "v1", "a0", "a1", "a2", "a3" }; -static const char * const mips32_reg_names[] = -{ +static const char * const mips32_reg_names[] = { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", @@ -74,8 +72,7 @@ static const char * const mips32_reg_names[] = "epc", "prid" }; -static const char * const mips64_reg_names[] = -{ +static const char * const mips64_reg_names[] = { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", "t0", "t1", "t2", "t3", "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", @@ -93,7 +90,7 @@ static const char * const mips64_reg_names[] = table to use. */ static const char * const *reg_names = NULL; -/* Print insn arguments for 32/64-bit code */ +/* Print insn arguments for 32/64-bit code. */ static void print_insn_arg (d, l, pc, info) @@ -129,10 +126,10 @@ print_insn_arg (d, l, pc, info) case 'i': case 'u': (*info->fprintf_func) (info->stream, "0x%x", - (l >> OP_SH_IMMEDIATE) & OP_MASK_IMMEDIATE); + (l >> OP_SH_IMMEDIATE) & OP_MASK_IMMEDIATE); break; - case 'j': /* same as i, but sign-extended */ + case 'j': /* Same as i, but sign-extended. */ case 'o': delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA; if (delta & 0x8000) @@ -155,13 +152,13 @@ print_insn_arg (d, l, pc, info) case 'a': (*info->print_address_func) - ((((pc + 4) & ~ (bfd_vma) 0x0fffffff) + ((((pc + 4) & ~(bfd_vma) 0x0fffffff) | (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2)), info); break; case 'p': - /* sign extend the displacement */ + /* Sign extend the displacement. */ delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA; if (delta & 0x8000) delta |= ~0xffff; @@ -177,25 +174,25 @@ print_insn_arg (d, l, pc, info) case 'U': { - /* First check for both rd and rt being equal. */ - unsigned int reg = (l >> OP_SH_RD) & OP_MASK_RD; - if (reg == ((l >> OP_SH_RT) & OP_MASK_RT)) - (*info->fprintf_func) (info->stream, "%s", - reg_names[reg]); - else - { - /* If one is zero use the other. */ - if (reg == 0) - (*info->fprintf_func) (info->stream, "%s", - reg_names[(l >> OP_SH_RT) & OP_MASK_RT]); - else if (((l >> OP_SH_RT) & OP_MASK_RT) == 0) - (*info->fprintf_func) (info->stream, "%s", - reg_names[reg]); - else /* Bogus, result depends on processor. */ - (*info->fprintf_func) (info->stream, "%s or %s", - reg_names[reg], - reg_names[(l >> OP_SH_RT) & OP_MASK_RT]); - } + /* First check for both rd and rt being equal. */ + unsigned int reg = (l >> OP_SH_RD) & OP_MASK_RD; + if (reg == ((l >> OP_SH_RT) & OP_MASK_RT)) + (*info->fprintf_func) (info->stream, "%s", + reg_names[reg]); + else + { + /* If one is zero use the other. */ + if (reg == 0) + (*info->fprintf_func) (info->stream, "%s", + reg_names[(l >> OP_SH_RT) & OP_MASK_RT]); + else if (((l >> OP_SH_RT) & OP_MASK_RT) == 0) + (*info->fprintf_func) (info->stream, "%s", + reg_names[reg]); + else /* Bogus, result depends on processor. */ + (*info->fprintf_func) (info->stream, "%s or %s", + reg_names[reg], + reg_names[(l >> OP_SH_RT) & OP_MASK_RT]); + } } break; @@ -294,7 +291,7 @@ print_insn_arg (d, l, pc, info) } } -/* Figure out the MIPS ISA and CPU based on the machine number. */ +/* Figure out the MIPS ISA and CPU based on the machine number. */ static void mips_isa_type (mach, isa, cputype) @@ -398,7 +395,7 @@ mips_isa_type (mach, isa, cputype) /* Check if the object uses NewABI conventions. */ static int -is_newabi(header) +is_newabi (header) Elf_Internal_Ehdr *header; { if ((header->e_flags @@ -443,7 +440,7 @@ print_insn_mips (memaddr, word, info) break; } } - } + } init = 1; } @@ -477,9 +474,9 @@ print_insn_mips (memaddr, word, info) d = op->args; if (d != NULL && *d != '\0') { - (*info->fprintf_func) (info->stream, "\t"); + (*info->fprintf_func) (info->stream, "\t"); for (; *d != '\0'; d++) - print_insn_arg (d, word, memaddr, info); + print_insn_arg (d, word, memaddr, info); } return INSNLEN; @@ -530,8 +527,8 @@ _print_insn_mips (memaddr, info, endianness) { Elf_Internal_Ehdr *header; - header = elf_elfheader(bfd_asymbol_bfd(*(info->symbols))); - if (is_newabi(header)) + header = elf_elfheader (bfd_asymbol_bfd (*(info->symbols))); + if (is_newabi (header)) reg_names = mips64_reg_names; } @@ -541,7 +538,7 @@ _print_insn_mips (memaddr, info, endianness) unsigned long insn; if (endianness == BFD_ENDIAN_BIG) - insn = (unsigned long) bfd_getb32 (buffer); + insn = (unsigned long) bfd_getb32 (buffer); else insn = (unsigned long) bfd_getl32 (buffer); @@ -791,7 +788,7 @@ print_mips16_insn_arg (type, op, l, use_extend, extend, memaddr, info) case 'X': (*info->fprintf_func) (info->stream, "%s", mips32_reg_names[((l >> MIPS16OP_SH_REGR32) - & MIPS16OP_MASK_REGR32)]); + & MIPS16OP_MASK_REGR32)]); break; case 'Y': @@ -1051,7 +1048,7 @@ print_mips16_insn_arg (type, op, l, use_extend, extend, memaddr, info) baseaddr = memaddr - 2; } } - val = (baseaddr & ~ ((1 << shift) - 1)) + immed; + val = (baseaddr & ~((1 << shift) - 1)) + immed; (*info->print_address_func) (val, info); info->target = val; } -- cgit v1.2.1