1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
|
# frv testcase for ftule $FCCi_2,$GRi,$GRj
# mach: all
.include "testutils.inc"
start
.global ftule
ftule:
and_spr_immed -4081,tbr ; clear tbr.tt
set_gr_spr tbr,gr7
inc_gr_immed 2112,gr7 ; address of exception handler
set_bctrlr_0_0 gr7 ; bctrlr 0,0
set_spr_immed 128,lcr
set_gr_immed 0,gr7
set_gr_immed 4,gr8
set_spr_addr bad,lr
set_fcc 0x0 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
set_psr_et 1
set_spr_addr ok1,lr
set_fcc 0x1 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok1:
set_spr_addr bad,lr
set_fcc 0x2 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
set_psr_et 1
set_spr_addr ok3,lr
set_fcc 0x3 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok3:
set_psr_et 1
set_spr_addr ok4,lr
set_fcc 0x4 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok4:
set_psr_et 1
set_spr_addr ok5,lr
set_fcc 0x5 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok5:
set_psr_et 1
set_spr_addr ok6,lr
set_fcc 0x6 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok6:
set_psr_et 1
set_spr_addr ok7,lr
set_fcc 0x7 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok7:
set_psr_et 1
set_spr_addr ok8,lr
set_fcc 0x8 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok8:
set_psr_et 1
set_spr_addr ok9,lr
set_fcc 0x9 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok9:
set_psr_et 1
set_spr_addr oka,lr
set_fcc 0xa 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
oka:
set_psr_et 1
set_spr_addr okb,lr
set_fcc 0xb 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
okb:
set_psr_et 1
set_spr_addr okc,lr
set_fcc 0xc 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
okc:
set_psr_et 1
set_spr_addr okd,lr
set_fcc 0xd 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
okd:
set_psr_et 1
set_spr_addr oke,lr
set_fcc 0xe 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
oke:
set_psr_et 1
set_spr_addr okf,lr
set_fcc 0xf 0
ftule fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
okf:
pass
bad:
fail
|
