summaryrefslogtreecommitdiff
path: root/sim/testsuite/sim/m32r/mulwlo.cgs
blob: d22c26827cd02891d4f57849927a5c4655a3ab1b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
# m32r testcase for mulwlo $src1,$src2
# mach(): m32r m32rx

	.include "testutils.inc"

	start

	.global mulwlo
mulwlo:
	mvi_h_accum0 0, 1
	mvi_h_gr r4, 0x10123
	mvi_h_gr r5, 0x40002

	mulwlo r4, r5

	test_h_accum0 0, 0x20246

	pass