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# sh testcase for all fmov instructions
# mach: all
# as: -isa=shcompact
# ld: -m shelf32
.include "compact/testutils.inc"
.macro init
fldi0 fr0
fldi1 fr2
.endm
# Set the SZ (SiZe) bit in the fpscr.
.macro _setsz
sts fpscr, r7
mov #16, r8
shll16 r8
or r8, r7
lds r7, fpscr
.endm
# Clear the SZ bit.
.macro _clrsz
sts fpscr, r7
mov #16, r8
shll16 r8
not r8, r8
and r8, r7
lds r7, fpscr
.endm
start
fmov1: # Test fr -> fr.
init
_clrpr
_clrsz
fmov fr0, fr10
# Ensure fr0 and fr10 are now equal.
fcmp/eq fr0, fr10
bt fmov2
fail
fmov2: # Test dr -> dr.
init
_setpr
_setsz
fmov dr0, dr2
# Ensure dr0 and dr2 are now equal.
fcmp/eq dr0, dr2
bt fmov3
fail
fmov3: # Test dr -> xd and xd -> dr.
init
_setsz
fmov dr0, xd0
# Ensure dr0 and xd0 are now equal.
fmov xd0, dr2
fcmp/eq dr0, dr2
bt fmov4
fail
fmov4: # Test xd -> xd.
init
_setsz
_setpr
fmov dr0, xd0
fmov xd0, xd2
fmov xd2, dr2
# Ensure dr0 and dr2 are now equal.
fcmp/eq dr0, dr2
bt fmov5
fail
fmov5: # Test fr -> @rn and @rn -> fr.
init
_clrsz
_clrpr
mov #40, r0
shll8 r0
fmov fr0, @r0
fmov @r0, fr1
fcmp/eq fr0, fr1
bt fmov6
fail
fmov6: # Test dr -> @rn and @rn -> dr.
init
_setsz
_setpr
mov #40, r0
shll8 r0
fmov dr0, @r0
fmov @r0, dr2
fcmp/eq dr0, dr2
bt fmov7
fail
fmov7: # Test xd -> @rn and @rn -> xd.
init
_setsz
_setpr
mov #40, r0
shll8 r0
fmov dr0, xd0
fmov xd0, @r0
fmov @r0, xd2
fmov xd2, dr2
fcmp/eq dr0, dr2
bt fmov8
fail
fmov8: # Test fr -> @-rn.
init
_clrsz
_clrpr
mov #40, r0
shll8 r0
# Preserve.
mov r0, r1
fmov fr0, @-r0
fmov @r0, fr2
fcmp/eq fr0, fr2
bt f8b
fail
f8b: # check pre-dec.
add #4, r0
cmp/eq r0, r1
bt fmov9
fail
fmov9: # Test dr -> @-rn.
init
_setsz
_setpr
mov #40, r0
shll8 r0
# Preserve r0.
mov r0, r1
fmov dr0, @-r0
fmov @r0, dr2
fcmp/eq dr0, dr2
bt f9b
fail
f9b: # check pre-dec.
add #8, r0
cmp/eq r0, r1
bt fmov10
fail
fmov10: # Test xd -> @-rn.
init
_setsz
_setpr
mov #40, r0
shll8 r0
# Preserve r0.
mov r0, r1
fmov dr0, xd0
fmov xd0, @-r0
fmov @r0, xd2
fmov xd2, dr2
fcmp/eq dr0, dr2
bt f10b
fail
f10b: # check pre-dec.
add #8, r0
cmp/eq r0, r1
bt fmov11
fail
fmov11: # Test @rn+ -> fr.
init
_clrsz
_clrpr
mov #40, r0
shll8 r0
# Preserve r0.
mov r0, r1
fmov fr0, @r0
fmov @r0+, fr2
fcmp/eq fr0, fr2
bt f11b
fail
f11b: # check post-inc.
add #4, r1
cmp/eq r0, r1
bt fmov12
fail
fmov12: # Test @rn+ -> dr.
init
_setsz
_setpr
mov #40, r0
shll8 r0
# preserve r0.
mov r0, r1
fmov dr0, @r0
fmov @r0+, dr2
fcmp/eq dr0, dr2
bt f12b
fail
f12b: # check post-inc.
add #8, r1
cmp/eq r0, r1
bt fmov13
fail
fmov13: # Test @rn -> xd.
init
_setsz
_setpr
mov #40, r0
shll8 r0
# Preserve r0.
mov r0, r1
fmov dr0, xd0
fmov xd0, @r0
fmov @r0+, xd2
fmov xd2, dr2
fcmp/eq dr0, dr2
bt f13b
fail
f13b:
add #8, r1
cmp/eq r0, r1
bt fmov14
fail
fmov14: # Test fr -> @(r0,rn), @(r0, rn) -> fr.
init
_clrsz
_clrpr
mov #40, r0
shll8 r0
mov #0, r1
fmov fr0, @(r0, r1)
fmov @(r0, r1), fr1
fcmp/eq fr0, fr1
bt fmov15
fail
fmov15: # Test dr -> @(r0, rn), @(r0, rn) -> dr.
init
_setsz
_setpr
mov #40, r0
shll8 r0
mov #0, r1
fmov dr0, @(r0, r1)
fmov @(r0, r1), dr2
fcmp/eq dr0, dr2
bt fmov16
fail
fmov16: # Test xd -> @(r0, rn), @(r0, rn) -> xd.
init
_setsz
_setpr
mov #40, r0
shll8 r0
mov #0, r1
fmov dr0, xd0
fmov xd0, @(r0, r1)
fmov @(r0, r1), xd2
fmov xd2, dr2
fcmp/eq dr0, dr2
bt okay
fail
okay:
pass
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