diff options
author | James Clarke <jrtc27@jrtc27.com> | 2017-01-24 09:20:06 -0200 |
---|---|---|
committer | Aurelien Jarno <aurelien@aurel32.net> | 2017-07-31 22:36:13 +0200 |
commit | 6aacb5befa4992dcbd6df17e914dd802fba8a1ea (patch) | |
tree | b81bb85098d7f6f5c9c920383421eb923bffeef3 | |
parent | fd5fade3054e4e5356154ea24e65d7ed816f5a1d (diff) | |
download | glibc-6aacb5befa4992dcbd6df17e914dd802fba8a1ea.tar.gz |
Bug 21053: sh: Reduce namespace pollution from sys/ucontext.h
The problem is basically that sys/ucontext.h is defining R0..R15
which happens to conflict with some packages like Firefox when
trying to build on SH.
The very same problem existed on arm back then [1] and it was fixed by
renaming R0..R15 to REG_R0..REG_R15. This patch imploy a similar
strategy for SH.
Checked on sh4-linux-gnu with run-built-tests=no and I also got reports
that it fixes Firefox build on Debian sh4.
* sysdeps/unix/sysv/linux/sh/sh3/ucontext_i.sym: Use new REG_R*
constants instead of the old R* ones.
* sysdeps/unix/sysv/linux/sh/sh4/ucontext_i.sym: Likewise.
* sysdeps/unix/sysv/linux/sh/sys/ucontext.h (NGPREG): Rename...
(NGREG): ... to this, to fit in with other architectures.
(gpregset_t): Use new NGREG macro.
[__USE_GNU]: Remove condition; all architectures other than tile
are unconditional.
(R*): Rename to REG_R*.
(cherry picked from commit 3e1b518550634792de13332edaab0ad722322c2b)
-rw-r--r-- | ChangeLog | 12 | ||||
-rw-r--r-- | sysdeps/unix/sysv/linux/sh/sh3/ucontext_i.sym | 32 | ||||
-rw-r--r-- | sysdeps/unix/sysv/linux/sh/sh4/ucontext_i.sym | 32 | ||||
-rw-r--r-- | sysdeps/unix/sysv/linux/sh/sys/ucontext.h | 70 |
4 files changed, 78 insertions, 68 deletions
@@ -1,3 +1,15 @@ +2017-01-24 James Clarke <jrtc27@jrtc27.com> + + * sysdeps/unix/sysv/linux/sh/sh3/ucontext_i.sym: Use new REG_R* + constants instead of the old R* ones. + * sysdeps/unix/sysv/linux/sh/sh4/ucontext_i.sym: Likewise. + * sysdeps/unix/sysv/linux/sh/sys/ucontext.h (NGPREG): Rename... + (NGREG): ... to this, to fit in with other architectures. + (gpregset_t): Use new NGREG macro. + [__USE_GNU]: Remove condition; all architectures other than tile + are unconditional. + (R*): Rename to REG_R*. + 2017-07-26 H.J. Lu <hongjiu.lu@intel.com> [BZ #21666] diff --git a/sysdeps/unix/sysv/linux/sh/sh3/ucontext_i.sym b/sysdeps/unix/sysv/linux/sh/sh3/ucontext_i.sym index 17397c5511..25f914a93b 100644 --- a/sysdeps/unix/sysv/linux/sh/sh3/ucontext_i.sym +++ b/sysdeps/unix/sysv/linux/sh/sh3/ucontext_i.sym @@ -13,22 +13,22 @@ SIG_SETMASK oLINK ucontext (uc_link) oSS_SP ucontext (uc_stack.ss_sp) oSS_SIZE ucontext (uc_stack.ss_size) -oR0 mcontext (gregs[R0]) -oR1 mcontext (gregs[R1]) -oR2 mcontext (gregs[R2]) -oR3 mcontext (gregs[R3]) -oR4 mcontext (gregs[R4]) -oR5 mcontext (gregs[R5]) -oR6 mcontext (gregs[R6]) -oR7 mcontext (gregs[R7]) -oR8 mcontext (gregs[R8]) -oR9 mcontext (gregs[R9]) -oR10 mcontext (gregs[R10]) -oR11 mcontext (gregs[R11]) -oR12 mcontext (gregs[R12]) -oR13 mcontext (gregs[R13]) -oR14 mcontext (gregs[R14]) -oR15 mcontext (gregs[R15]) +oR0 mcontext (gregs[REG_R0]) +oR1 mcontext (gregs[REG_R1]) +oR2 mcontext (gregs[REG_R2]) +oR3 mcontext (gregs[REG_R3]) +oR4 mcontext (gregs[REG_R4]) +oR5 mcontext (gregs[REG_R5]) +oR6 mcontext (gregs[REG_R6]) +oR7 mcontext (gregs[REG_R7]) +oR8 mcontext (gregs[REG_R8]) +oR9 mcontext (gregs[REG_R9]) +oR10 mcontext (gregs[REG_R10]) +oR11 mcontext (gregs[REG_R11]) +oR12 mcontext (gregs[REG_R12]) +oR13 mcontext (gregs[REG_R13]) +oR14 mcontext (gregs[REG_R14]) +oR15 mcontext (gregs[REG_R15]) oPC mcontext (pc) oPR mcontext (pr) oSR mcontext (sr) diff --git a/sysdeps/unix/sysv/linux/sh/sh4/ucontext_i.sym b/sysdeps/unix/sysv/linux/sh/sh4/ucontext_i.sym index 65633fbcf4..130f60cd96 100644 --- a/sysdeps/unix/sysv/linux/sh/sh4/ucontext_i.sym +++ b/sysdeps/unix/sysv/linux/sh/sh4/ucontext_i.sym @@ -13,22 +13,22 @@ SIG_SETMASK oLINK ucontext (uc_link) oSS_SP ucontext (uc_stack.ss_sp) oSS_SIZE ucontext (uc_stack.ss_size) -oR0 mcontext (gregs[R0]) -oR1 mcontext (gregs[R1]) -oR2 mcontext (gregs[R2]) -oR3 mcontext (gregs[R3]) -oR4 mcontext (gregs[R4]) -oR5 mcontext (gregs[R5]) -oR6 mcontext (gregs[R6]) -oR7 mcontext (gregs[R7]) -oR8 mcontext (gregs[R8]) -oR9 mcontext (gregs[R9]) -oR10 mcontext (gregs[R10]) -oR11 mcontext (gregs[R11]) -oR12 mcontext (gregs[R12]) -oR13 mcontext (gregs[R13]) -oR14 mcontext (gregs[R14]) -oR15 mcontext (gregs[R15]) +oR0 mcontext (gregs[REG_R0]) +oR1 mcontext (gregs[REG_R1]) +oR2 mcontext (gregs[REG_R2]) +oR3 mcontext (gregs[REG_R3]) +oR4 mcontext (gregs[REG_R4]) +oR5 mcontext (gregs[REG_R5]) +oR6 mcontext (gregs[REG_R6]) +oR7 mcontext (gregs[REG_R7]) +oR8 mcontext (gregs[REG_R8]) +oR9 mcontext (gregs[REG_R9]) +oR10 mcontext (gregs[REG_R10]) +oR11 mcontext (gregs[REG_R11]) +oR12 mcontext (gregs[REG_R12]) +oR13 mcontext (gregs[REG_R13]) +oR14 mcontext (gregs[REG_R14]) +oR15 mcontext (gregs[REG_R15]) oPC mcontext (pc) oPR mcontext (pr) oSR mcontext (sr) diff --git a/sysdeps/unix/sysv/linux/sh/sys/ucontext.h b/sysdeps/unix/sysv/linux/sh/sys/ucontext.h index ab9a7e66bf..037fbb73e8 100644 --- a/sysdeps/unix/sysv/linux/sh/sys/ucontext.h +++ b/sysdeps/unix/sysv/linux/sh/sys/ucontext.h @@ -31,49 +31,47 @@ typedef int greg_t; /* Number of general registers. */ -#define NGPREG 16 +#define NGREG 16 /* Container for all general registers. */ -typedef greg_t gregset_t[NGPREG]; +typedef greg_t gregset_t[NGREG]; -#ifdef __USE_GNU /* Number of each register is the `gregset_t' array. */ enum { - R0 = 0, -#define R0 R0 - R1 = 1, -#define R1 R1 - R2 = 2, -#define R2 R2 - R3 = 3, -#define R3 R3 - R4 = 4, -#define R4 R4 - R5 = 5, -#define R5 R5 - R6 = 6, -#define R6 R6 - R7 = 7, -#define R7 R7 - R8 = 8, -#define R8 R8 - R9 = 9, -#define R9 R9 - R10 = 10, -#define R10 R10 - R11 = 11, -#define R11 R11 - R12 = 12, -#define R12 R12 - R13 = 13, -#define R13 R13 - R14 = 14, -#define R14 R14 - R15 = 15, -#define R15 R15 + REG_R0 = 0, +#define REG_R0 REG_R0 + REG_R1 = 1, +#define REG_R1 REG_R1 + REG_R2 = 2, +#define REG_R2 REG_R2 + REG_R3 = 3, +#define REG_R3 REG_R3 + REG_R4 = 4, +#define REG_R4 REG_R4 + REG_R5 = 5, +#define REG_R5 REG_R5 + REG_R6 = 6, +#define REG_R6 REG_R6 + REG_R7 = 7, +#define REG_R7 REG_R7 + REG_R8 = 8, +#define REG_R8 REG_R8 + REG_R9 = 9, +#define REG_R9 REG_R9 + REG_R10 = 10, +#define REG_R10 REG_R10 + REG_R11 = 11, +#define REG_R11 REG_R11 + REG_R12 = 12, +#define REG_R12 REG_R12 + REG_R13 = 13, +#define REG_R13 REG_R13 + REG_R14 = 14, +#define REG_R14 REG_R14 + REG_R15 = 15, +#define REG_R15 REG_R15 }; -#endif #if (defined(__SH4__) || defined(__SH4A__)) typedef int freg_t; |