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| author | Vladislav Khmelevsky <och95@yandex.ru> | 2022-11-17 12:47:29 +0400 |
|---|---|---|
| committer | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2022-11-22 10:34:14 -0300 |
| commit | 691f70b84a1284f35c8cf9fbf3ef3b1cec41c234 (patch) | |
| tree | 81687b215b45964edf7ea6b5a061636923054f30 | |
| parent | 75b0edb7ef338084e53925139ae81fb0dfc07dd4 (diff) | |
| download | glibc-691f70b84a1284f35c8cf9fbf3ef3b1cec41c234.tar.gz | |
elf: Fix rtld-audit trampoline for aarch64
This patch fixes two problems with audit:
1. The DL_OFFSET_RV_VPCS offset was mixed up with DL_OFFSET_RG_VPCS,
resulting in x2 register value nulling in RG structure.
2. We need to preserve the x8 register before function call, but
don't have to save it's new value and restore it before return.
Anyway the final restore was using OFFSET_RV instead of OFFSET_RG value
which is wrong (althoug doesn't affect anything).
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
(cherry picked from commit eb4181e9f4a512de37dad4ba623c921671584dea)
| -rw-r--r-- | sysdeps/aarch64/dl-trampoline.S | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/sysdeps/aarch64/dl-trampoline.S b/sysdeps/aarch64/dl-trampoline.S index 457570e7df..b84c53d1a5 100644 --- a/sysdeps/aarch64/dl-trampoline.S +++ b/sysdeps/aarch64/dl-trampoline.S @@ -298,12 +298,11 @@ _dl_runtime_profile: stp x2, x3, [x29, #OFFSET_RV + DL_OFFSET_RV_X0 + 16*1] stp x4, x5, [x29, #OFFSET_RV + DL_OFFSET_RV_X0 + 16*2] stp x6, x7, [x29, #OFFSET_RV + DL_OFFSET_RV_X0 + 16*3] - str x8, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*4] stp q0, q1, [x29, #OFFSET_RV + DL_OFFSET_RV_V0 + 32*0] stp q2, q3, [x29, #OFFSET_RV + DL_OFFSET_RV_V0 + 32*1] stp q4, q5, [x29, #OFFSET_RV + DL_OFFSET_RV_V0 + 32*2] stp q6, q7, [x29, #OFFSET_RV + DL_OFFSET_RV_V0 + 32*3] - str xzr, [X29, #OFFSET_RV + DL_OFFSET_RG_VPCS] + str xzr, [X29, #OFFSET_RV + DL_OFFSET_RV_VPCS] /* Setup call to pltexit */ ldp x0, x1, [x29, #OFFSET_SAVED_CALL_X0] @@ -315,7 +314,6 @@ _dl_runtime_profile: ldp x2, x3, [x29, #OFFSET_RV + DL_OFFSET_RV_X0 + 16*1] ldp x4, x5, [x29, #OFFSET_RV + DL_OFFSET_RV_X0 + 16*2] ldp x6, x7, [x29, #OFFSET_RV + DL_OFFSET_RV_X0 + 16*3] - ldr x8, [x29, #OFFSET_RV + DL_OFFSET_RV_X0 + 16*4] ldp q0, q1, [x29, #OFFSET_RV + DL_OFFSET_RV_V0 + 32*0] ldp q2, q3, [x29, #OFFSET_RV + DL_OFFSET_RV_V0 + 32*1] ldp q4, q5, [x29, #OFFSET_RV + DL_OFFSET_RV_V0 + 32*2] |