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* Count number of logical processors sharing L2 cachehjl/erms/2.23H.J. Lu2016-06-061-34/+116
* Remove special L2 cache case for Knights LandingH.J. Lu2016-06-061-2/+0
* Correct Intel processor level type mask from CPUIDH.J. Lu2016-06-061-1/+1
* Check the HTT bit before counting logical threadsH.J. Lu2016-06-062-76/+85
* Remove alignments on jump targets in memsetH.J. Lu2016-06-061-32/+5
* Call init_cpu_features only if SHARED is definedH.J. Lu2016-06-062-0/+8
* Support non-inclusive caches on Intel processorsH.J. Lu2016-06-061-1/+11
* Remove x86 ifunc-defines.sym and rtld-global-offsets.symH.J. Lu2016-06-068-51/+18
* Move sysdeps/x86_64/cacheinfo.c to sysdeps/x86H.J. Lu2016-06-062-1/+1
* Detect Intel Goldmont and Airmont processorsH.J. Lu2016-06-061-0/+8
* X86-64: Add dummy memcopy.h and wordcopy.cH.J. Lu2016-04-082-0/+2
* X86-64: Remove previous default/SSE2/AVX2 memcpy/memmoveH.J. Lu2016-04-0819-1490/+394
* X86-64: Remove the previous SSE2/AVX2 memsetsH.J. Lu2016-04-088-319/+60
* X86-64: Use non-temporal store in memcpy on large dataH.J. Lu2016-04-085-171/+234
* X86-64: Prepare memmove-vec-unaligned-erms.SH.J. Lu2016-04-061-54/+84
* X86-64: Prepare memset-vec-unaligned-erms.SH.J. Lu2016-04-061-13/+19
* Force 32-bit displacement in memset-vec-unaligned-erms.SH.J. Lu2016-04-051-0/+13
* Add a comment in memset-sse2-unaligned-erms.SH.J. Lu2016-04-051-0/+2
* Don't put SSE2/AVX/AVX512 memmove/memset in ld.soH.J. Lu2016-04-056-32/+40
* Fix memmove-vec-unaligned-erms.SH.J. Lu2016-04-051-24/+30
* Remove Fast_Copy_Backward from Intel Core processorsH.J. Lu2016-04-021-5/+1
* Add x86-64 memset with unaligned store and rep stosbH.J. Lu2016-04-026-1/+335
* Add x86-64 memmove with unaligned load/store and rep movsbH.J. Lu2016-04-026-1/+594
* Initial Enhanced REP MOVSB/STOSB (ERMS) supportH.J. Lu2016-04-021-0/+4
* Make __memcpy_avx512_no_vzeroupper an aliasH.J. Lu2016-04-023-430/+404
* Implement x86-64 multiarch mempcpy in memcpyH.J. Lu2016-04-029-57/+69
* [x86] Add a feature bit: Fast_Unaligned_CopyH.J. Lu2016-04-023-2/+17
* tst-audit10: Fix compilation on compilers without bit_AVX512F [BZ #19860]Florian Weimer2016-04-021-1/+4
* Don't set %rcx twice before "rep movsb"H.J. Lu2016-04-021-1/+0
* Set index_arch_AVX_Fast_Unaligned_Load only for Intel processorsH.J. Lu2016-04-022-74/+88
* Add _arch_/_cpu_ to index_*/bit_* in x86 cpu-features.hH.J. Lu2016-04-023-151/+159
* Fix tst-audit10 build when -mavx512f is not supported.Roland McGrath2016-04-022-3/+4
* tst-audit4, tst-audit10: Compile AVX/AVX-512 code separately [BZ #19269]Florian Weimer2016-04-025-55/+112
* Group AVX512 functions in .text.avx512 sectionH.J. Lu2016-04-022-2/+2
* x86-64: Fix memcpy IFUNC selectionH.J. Lu2016-04-021-13/+14
* S390: Extend structs La_s390_regs / La_s390_retval with vector-registers.Stefan Liebler2016-04-014-65/+136
* S390: Save and restore fprs/vrs while resolving symbols.Stefan Liebler2016-04-017-248/+516
* resolv: Always set *resplen2 out parameter in send_dg [BZ #19791]Florian Weimer2016-03-283-23/+50
* math: don't clobber old libm.so on install [BZ #19822]Dylan Alex Simon2016-03-213-1/+9
* Fix resource leak in resolver (bug 19257)Andreas Schwab2016-03-202-1/+7
* Or bit_Prefer_MAP_32BIT_EXEC in EXTRA_LD_ENVVARSH.J. Lu2016-03-113-1/+8
* Define _HAVE_STRING_ARCH_mempcpy to 1 for x86H.J. Lu2016-03-113-0/+9
* Mention BZ #19762 in NEWSH.J. Lu2016-03-101-0/+1
* Use HAS_ARCH_FEATURE with Fast_Rep_StringH.J. Lu2016-03-1010-9/+27
* mips: terminate the FDE before the return trampoline in makecontextAurelien Jarno2016-03-093-0/+14
* Add sys/auxv.h wrapper to include/sys/Aurelien Jarno2016-03-082-0/+5
* sln: use stat64Hongjiu Zhang2016-03-072-2/+7
* Update NEWS.Carlos O'Donell2016-02-261-0/+11
* NEWS (2.23): Fix typo in bug 19048 text.Carlos O'Donell2016-02-252-1/+5
* Don't use long double math functions if NO_LONG_DOUBLEAndreas Schwab2016-02-252-1/+11
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