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author | Kevin Ryde <user42@zip.com.au> | 2003-10-12 02:35:58 +0200 |
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committer | Kevin Ryde <user42@zip.com.au> | 2003-10-12 02:35:58 +0200 |
commit | 82526cc60c3366d280aed200deb8621b0012c2aa (patch) | |
tree | 86a9a464e70530198100906b9030622e4d2a6cfa /doc/tasks.html | |
parent | bed37503208fb9ce29d856959a72cebf6aff40e3 (diff) | |
download | gmp-82526cc60c3366d280aed200deb8621b0012c2aa.tar.gz |
Remove sparc64 32-bit special case mpn_divrem_1 and mpn_mod_1, done.
Diffstat (limited to 'doc/tasks.html')
-rw-r--r-- | doc/tasks.html | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/doc/tasks.html b/doc/tasks.html index 21d3bb204..3c6f1d298 100644 --- a/doc/tasks.html +++ b/doc/tasks.html @@ -342,10 +342,6 @@ MA 02111-1307, USA. "<code>mulx</code>"s either with an asm block or via the generic C code is about 90 cycles. Try using fp operations, and also try using karatsuba for just three "<code>mulx</code>"s. -<li> UltraSPARC/64: <code>mpn_divrem_1</code> and <code>mpn_mod_1</code>, - could process 32 bits at a time when the divisor fits 32-bits. This will - need only 4 <code>mulx</code>'s per limb instead of 8 in the general - case. <li> UltraSPARC/32: Rewrite <code>mpn_lshift</code>, <code>mpn_rshift</code>. Will give 2 cycles/limb. Trivial modifications of mpn/sparc64 should do. <li> UltraSPARC/32: Write special mpn_Xmul_1 loops for s2 < 2^16. |