1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
|
dnl Intel P6-15 mpn_add_n/mpn_sub_n -- mpn add or subtract.
dnl Copyright 2006, 2007 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of the GNU Lesser General Public License as published
dnl by the Free Software Foundation; either version 3 of the License, or (at
dnl your option) any later version.
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
dnl License for more details.
dnl You should have received a copy of the GNU Lesser General Public License
dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 2.25
C AMD K10 2
C Intel P4 10
C Intel core2 2.05
C Intel NHM 2.3
C Intel SBR 1.9
C Intel atom ?
C VIA nano ?
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`vp', `%rdx')
define(`n', `%rcx')
define(`cy', `%r8')
ifdef(`OPERATION_add_n', `
define(ADCSBB, adc)
define(func, mpn_add_n)
define(func_nc, mpn_add_nc)')
ifdef(`OPERATION_sub_n', `
define(ADCSBB, sbb)
define(func, mpn_sub_n)
define(func_nc, mpn_sub_nc)')
MULFUNC_PROLOGUE(mpn_add_n mpn_add_nc mpn_sub_n mpn_sub_nc)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func_nc)
jmp L(start)
EPILOGUE()
PROLOGUE(func)
xor %r8, %r8
L(start):
mov (up), %r10
mov (vp), %r11
lea -8(up,n,8), up
lea -8(vp,n,8), vp
lea -16(rp,n,8), rp
mov R32(%rcx), R32(%rax)
neg n
and $3, R32(%rax)
je L(b00)
add %rax, n C clear low rcx bits for jrcxz
cmp $2, R32(%rax)
jl L(b01)
je L(b10)
L(b11): shr %r8 C set cy
jmp L(e11)
L(b00): shr %r8 C set cy
mov %r10, %r8
mov %r11, %r9
lea 4(n), n
jmp L(e00)
L(b01): shr %r8 C set cy
jmp L(e01)
L(b10): shr %r8 C set cy
mov %r10, %r8
mov %r11, %r9
jmp L(e10)
L(end): ADCSBB %r11, %r10
mov %r10, 8(rp)
mov R32(%rcx), R32(%rax) C clear eax, ecx contains 0
adc R32(%rax), R32(%rax)
ret
ALIGN(16)
L(top):
mov -24(up,n,8), %r8
mov -24(vp,n,8), %r9
ADCSBB %r11, %r10
mov %r10, -24(rp,n,8)
L(e00):
mov -16(up,n,8), %r10
mov -16(vp,n,8), %r11
ADCSBB %r9, %r8
mov %r8, -16(rp,n,8)
L(e11):
mov -8(up,n,8), %r8
mov -8(vp,n,8), %r9
ADCSBB %r11, %r10
mov %r10, -8(rp,n,8)
L(e10):
mov (up,n,8), %r10
mov (vp,n,8), %r11
ADCSBB %r9, %r8
mov %r8, (rp,n,8)
L(e01):
jrcxz L(end)
lea 4(n), n
jmp L(top)
EPILOGUE()
|
