diff options
Diffstat (limited to 'src/liblink/obj5.c')
| -rw-r--r-- | src/liblink/obj5.c | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/src/liblink/obj5.c b/src/liblink/obj5.c index a571d8f16..d7f2714ed 100644 --- a/src/liblink/obj5.c +++ b/src/liblink/obj5.c @@ -119,14 +119,30 @@ progedit(Link *ctxt, Prog *p) ctxt->diag("%L: TLS MRC instruction must write to R0 as it might get translated into a BL instruction", p->lineno); if(ctxt->goarm < 7) { - // Replace it with BL runtime.read_tls_fallback(SB). + // Replace it with BL runtime.read_tls_fallback(SB) for ARM CPUs that lack the tls extension. if(tlsfallback == nil) tlsfallback = linklookup(ctxt, "runtime.read_tls_fallback", 0); - // BL runtime.read_tls_fallback(SB) + // MOVW LR, R11 + p->as = AMOVW; + p->from.type = D_REG; + p->from.reg = REGLINK; + p->to.type = D_REG; + p->to.reg = REGTMP; + + // BL runtime.read_tls_fallback(SB) + p = appendp(ctxt, p); p->as = ABL; p->to.type = D_BRANCH; p->to.sym = tlsfallback; p->to.offset = 0; + + // MOVW R11, LR + p = appendp(ctxt, p); + p->as = AMOVW; + p->from.type = D_REG; + p->from.reg = REGTMP; + p->to.type = D_REG; + p->to.reg = REGLINK; break; } } @@ -1061,6 +1077,7 @@ LinkArch linkarm = { .D_PARAM = D_PARAM, .D_SCONST = D_SCONST, .D_STATIC = D_STATIC, + .D_OREG = D_OREG, .ACALL = ABL, .ADATA = ADATA, |