From 133cf52dde3138763a10d29f376f5fc353b6e99c Mon Sep 17 00:00:00 2001 From: Russ Cox Date: Thu, 26 Jun 2014 11:54:39 -0400 Subject: all: remove 'extern register M *m' from runtime The runtime has historically held two dedicated values g (current goroutine) and m (current thread) in 'extern register' slots (TLS on x86, real registers backed by TLS on ARM). This CL removes the extern register m; code now uses g->m. On ARM, this frees up the register that formerly held m (R9). This is important for NaCl, because NaCl ARM code cannot use R9 at all. The Go 1 macrobenchmarks (those with per-op times >= 10 ?s) are unaffected: BenchmarkBinaryTree17 5491374955 5471024381 -0.37% BenchmarkFannkuch11 4357101311 4275174828 -1.88% BenchmarkGobDecode 11029957 11364184 +3.03% BenchmarkGobEncode 6852205 6784822 -0.98% BenchmarkGzip 650795967 650152275 -0.10% BenchmarkGunzip 140962363 141041670 +0.06% BenchmarkHTTPClientServer 71581 73081 +2.10% BenchmarkJSONEncode 31928079 31913356 -0.05% BenchmarkJSONDecode 117470065 113689916 -3.22% BenchmarkMandelbrot200 6008923 5998712 -0.17% BenchmarkGoParse 6310917 6327487 +0.26% BenchmarkRegexpMatchMedium_1K 114568 114763 +0.17% BenchmarkRegexpMatchHard_1K 168977 169244 +0.16% BenchmarkRevcomp 935294971 914060918 -2.27% BenchmarkTemplate 145917123 148186096 +1.55% Minux previous reported larger variations, but these were caused by run-to-run noise, not repeatable slowdowns. Actual code changes by Minux. I only did the docs and the benchmarking. LGTM=dvyukov, iant, minux R=minux, josharian, iant, dave, bradfitz, dvyukov CC=golang-codereviews https://codereview.appspot.com/109050043 --- doc/asm.html | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) (limited to 'doc') diff --git a/doc/asm.html b/doc/asm.html index d44cb799d..f4ef1e62f 100644 --- a/doc/asm.html +++ b/doc/asm.html @@ -149,7 +149,7 @@ hardware's SP register.

Instructions, registers, and assembler directives are always in UPPER CASE to remind you that assembly programming is a fraught endeavor. -(Exceptions: the m and g register renamings on ARM.) +(Exception: the g register renaming on ARM.)

@@ -344,7 +344,7 @@ Here follows some descriptions of key Go-specific details for the supported arch

32-bit Intel 386

-The runtime pointers to the m and g structures are maintained +The runtime pointer to the g structure is maintained through the value of an otherwise unused (as far as Go is concerned) register in the MMU. A OS-dependent macro get_tls is defined for the assembler if the source includes an architecture-dependent header file, like this: @@ -356,14 +356,15 @@ an architecture-dependent header file, like this:

Within the runtime, the get_tls macro loads its argument register -with a pointer to a pair of words representing the g and m pointers. +with a pointer to the g pointer, and the g struct +contains the m pointer. The sequence to load g and m using CX looks like this: 

 get_tls(CX)
-MOVL	g(CX), AX	// Move g into AX.
-MOVL	m(CX), BX	// Move m into BX.
+MOVL	g(CX), AX     // Move g into AX.
+MOVL	g_m(AX), BX   // Move g->m into BX.

64-bit Intel 386 (a.k.a. amd64)

@@ -376,22 +377,21 @@ pointers is the same as on the 386, except it uses MOVQ rather than 
 get_tls(CX)
-MOVQ	g(CX), AX	// Move g into AX.
-MOVQ	m(CX), BX	// Move m into BX.
+MOVQ	g(CX), AX     // Move g into AX.
+MOVQ	g_m(AX), BX   // Move g->m into BX.

ARM

-The registers R9, R10, and R11 +The registers R10 and R11 are reserved by the compiler and linker.

-R9 and R10 point to the m (machine) and g -(goroutine) structures, respectively. -Within assembler source code, these pointers must be referred to as m and g; -the names R9 and R10 are not recognized. +R10 points to the g (goroutine) structure. +Within assembler source code, this pointer must be referred to as g; +the name R10 is not recognized.

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