From 190eb820b96c43eb96845b393b6db7771ccefc8b Mon Sep 17 00:00:00 2001 From: Shenghou Ma Date: Wed, 6 Aug 2014 23:41:29 -0400 Subject: [dev.power64] cmd/9a, cmd/9c, cmd/9l, liblink: import code from Vita Nuova. No modifications other than adding copyright header to each file, and concatenating several cmd/9l files together to form the liblink files. LGTM=rsc R=rsc, iant CC=golang-codereviews https://codereview.appspot.com/123840043 --- src/liblink/asm9.c | 1889 ++++++++++++++++++++++++++++++++++++++++++ src/liblink/list9.c | 342 ++++++++ src/liblink/obj9.c | 2233 ++++++++++++++++++++++++++++++++++++++++++++++++++ src/liblink/sched9.c | 835 +++++++++++++++++++ 4 files changed, 5299 insertions(+) create mode 100644 src/liblink/asm9.c create mode 100644 src/liblink/list9.c create mode 100644 src/liblink/obj9.c create mode 100644 src/liblink/sched9.c (limited to 'src/liblink') diff --git a/src/liblink/asm9.c b/src/liblink/asm9.c new file mode 100644 index 000000000..ea510df79 --- /dev/null +++ b/src/liblink/asm9.c @@ -0,0 +1,1889 @@ +// cmd/9l/optab.c, cmd/9l/asmout.c from Vita Nuova. +// +// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. +// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) +// Portions Copyright © 1997-1999 Vita Nuova Limited +// Portions Copyright © 2000-2008 Vita Nuova Holdings Limited (www.vitanuova.com) +// Portions Copyright © 2004,2006 Bruce Ellis +// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) +// Revisions Copyright © 2000-2008 Lucent Technologies Inc. and others +// Portions Copyright © 2009 The Go Authors. All rights reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a copy +// of this software and associated documentation files (the "Software"), to deal +// in the Software without restriction, including without limitation the rights +// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +// copies of the Software, and to permit persons to whom the Software is +// furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +// THE SOFTWARE. + +// +build ignore + +#include "l.h" + +Optab optab[] = +{ + { ATEXT, C_LEXT, C_NONE, C_NONE, C_LCON, 0, 0, 0 }, + { ATEXT, C_LEXT, C_REG, C_NONE, C_LCON, 0, 0, 0 }, + { ATEXT, C_LEXT, C_NONE, C_LCON, C_LCON, 0, 0, 0 }, + { ATEXT, C_LEXT, C_REG, C_LCON, C_LCON, 0, 0, 0 }, + { ATEXT, C_ADDR, C_NONE, C_NONE, C_LCON, 0, 0, 0 }, + { ATEXT, C_ADDR, C_REG, C_NONE, C_LCON, 0, 0, 0 }, + { ATEXT, C_ADDR, C_NONE, C_LCON, C_LCON, 0, 0, 0 }, + { ATEXT, C_ADDR, C_REG, C_LCON, C_LCON, 0, 0, 0 }, + + /* move register */ + { AMOVD, C_REG, C_NONE, C_NONE, C_REG, 1, 4, 0 }, + { AMOVB, C_REG, C_NONE, C_NONE, C_REG, 12, 4, 0 }, + { AMOVBZ, C_REG, C_NONE, C_NONE, C_REG, 13, 4, 0 }, + { AMOVW, C_REG, C_NONE, C_NONE, C_REG, 12, 4, 0 }, + { AMOVWZ, C_REG, C_NONE, C_NONE, C_REG, 13, 4, 0 }, + + { AADD, C_REG, C_REG, C_NONE, C_REG, 2, 4, 0 }, + { AADD, C_REG, C_NONE, C_NONE, C_REG, 2, 4, 0 }, + { AADD, C_ADDCON,C_REG, C_NONE, C_REG, 4, 4, 0 }, + { AADD, C_ADDCON,C_NONE, C_NONE, C_REG, 4, 4, 0 }, + { AADD, C_UCON, C_REG, C_NONE, C_REG, 20, 4, 0 }, + { AADD, C_UCON, C_NONE, C_NONE, C_REG, 20, 4, 0 }, + { AADD, C_LCON, C_REG, C_NONE, C_REG, 22, 12, 0 }, + { AADD, C_LCON, C_NONE, C_NONE, C_REG, 22, 12, 0 }, + + { AADDC, C_REG, C_REG, C_NONE, C_REG, 2, 4, 0 }, + { AADDC, C_REG, C_NONE, C_NONE, C_REG, 2, 4, 0 }, + { AADDC, C_ADDCON,C_REG, C_NONE, C_REG, 4, 4, 0 }, + { AADDC, C_ADDCON,C_NONE, C_NONE, C_REG, 4, 4, 0 }, + { AADDC, C_LCON, C_REG, C_NONE, C_REG, 22, 12, 0 }, + { AADDC, C_LCON, C_NONE, C_NONE, C_REG, 22, 12, 0 }, + + { AAND, C_REG, C_REG, C_NONE, C_REG, 6, 4, 0 }, /* logical, no literal */ + { AAND, C_REG, C_NONE, C_NONE, C_REG, 6, 4, 0 }, + { AANDCC, C_REG, C_REG, C_NONE, C_REG, 6, 4, 0 }, + { AANDCC, C_REG, C_NONE, C_NONE, C_REG, 6, 4, 0 }, + + { AANDCC, C_ANDCON,C_NONE, C_NONE, C_REG, 58, 4, 0 }, + { AANDCC, C_ANDCON,C_REG, C_NONE, C_REG, 58, 4, 0 }, + { AANDCC, C_UCON, C_NONE, C_NONE, C_REG, 59, 4, 0 }, + { AANDCC, C_UCON, C_REG, C_NONE, C_REG, 59, 4, 0 }, + { AANDCC, C_LCON, C_NONE, C_NONE, C_REG, 23, 12, 0 }, + { AANDCC, C_LCON, C_REG, C_NONE, C_REG, 23, 12, 0 }, + + { AMULLW, C_REG, C_REG, C_NONE, C_REG, 2, 4, 0 }, + { AMULLW, C_REG, C_NONE, C_NONE, C_REG, 2, 4, 0 }, + { AMULLW, C_ADDCON,C_REG, C_NONE, C_REG, 4, 4, 0 }, + { AMULLW, C_ADDCON,C_NONE, C_NONE, C_REG, 4, 4, 0 }, + { AMULLW, C_ANDCON,C_REG, C_NONE, C_REG, 4, 4, 0 }, + { AMULLW, C_ANDCON, C_NONE, C_NONE, C_REG, 4, 4, 0 }, + { AMULLW, C_LCON, C_REG, C_NONE, C_REG, 22, 12, 0}, + { AMULLW, C_LCON, C_NONE, C_NONE, C_REG, 22, 12, 0}, + + { ASUBC, C_REG, C_REG, C_NONE, C_REG, 10, 4, 0 }, + { ASUBC, C_REG, C_NONE, C_NONE, C_REG, 10, 4, 0 }, + { ASUBC, C_REG, C_NONE, C_ADDCON, C_REG, 27, 4, 0 }, + { ASUBC, C_REG, C_NONE, C_LCON, C_REG, 28, 12, 0}, + + { AOR, C_REG, C_REG, C_NONE, C_REG, 6, 4, 0 }, /* logical, literal not cc (or/xor) */ + { AOR, C_REG, C_NONE, C_NONE, C_REG, 6, 4, 0 }, + { AOR, C_ANDCON, C_NONE, C_NONE, C_REG, 58, 4, 0 }, + { AOR, C_ANDCON, C_REG, C_NONE, C_REG, 58, 4, 0 }, + { AOR, C_UCON, C_NONE, C_NONE, C_REG, 59, 4, 0 }, + { AOR, C_UCON, C_REG, C_NONE, C_REG, 59, 4, 0 }, + { AOR, C_LCON, C_NONE, C_NONE, C_REG, 23, 12, 0 }, + { AOR, C_LCON, C_REG, C_NONE, C_REG, 23, 12, 0 }, + + { ADIVW, C_REG, C_REG, C_NONE, C_REG, 2, 4, 0 }, /* op r1[,r2],r3 */ + { ADIVW, C_REG, C_NONE, C_NONE, C_REG, 2, 4, 0 }, + { ASUB, C_REG, C_REG, C_NONE, C_REG, 10, 4, 0 }, /* op r2[,r1],r3 */ + { ASUB, C_REG, C_NONE, C_NONE, C_REG, 10, 4, 0 }, + + { ASLW, C_REG, C_NONE, C_NONE, C_REG, 6, 4, 0 }, + { ASLW, C_REG, C_REG, C_NONE, C_REG, 6, 4, 0 }, + { ASLD, C_REG, C_NONE, C_NONE, C_REG, 6, 4, 0 }, + { ASLD, C_REG, C_REG, C_NONE, C_REG, 6, 4, 0 }, + { ASLD, C_SCON, C_REG, C_NONE, C_REG, 25, 4, 0 }, + { ASLD, C_SCON, C_NONE, C_NONE, C_REG, 25, 4, 0 }, + { ASLW, C_SCON, C_REG, C_NONE, C_REG, 57, 4, 0 }, + { ASLW, C_SCON, C_NONE, C_NONE, C_REG, 57, 4, 0 }, + + { ASRAW, C_REG, C_NONE, C_NONE, C_REG, 6, 4, 0 }, + { ASRAW, C_REG, C_REG, C_NONE, C_REG, 6, 4, 0 }, + { ASRAW, C_SCON, C_REG, C_NONE, C_REG, 56, 4, 0 }, + { ASRAW, C_SCON, C_NONE, C_NONE, C_REG, 56, 4, 0 }, + { ASRAD, C_REG, C_NONE, C_NONE, C_REG, 6, 4, 0 }, + { ASRAD, C_REG, C_REG, C_NONE, C_REG, 6, 4, 0 }, + { ASRAD, C_SCON, C_REG, C_NONE, C_REG, 56, 4, 0 }, + { ASRAD, C_SCON, C_NONE, C_NONE, C_REG, 56, 4, 0 }, + + { ARLWMI, C_SCON, C_REG, C_LCON, C_REG, 62, 4, 0 }, + { ARLWMI, C_REG, C_REG, C_LCON, C_REG, 63, 4, 0 }, + { ARLDMI, C_SCON, C_REG, C_LCON, C_REG, 30, 4, 0 }, + + { ARLDC, C_SCON, C_REG, C_LCON, C_REG, 29, 4, 0 }, + { ARLDCL, C_SCON, C_REG, C_LCON, C_REG, 29, 4, 0 }, + { ARLDCL, C_REG, C_REG, C_LCON, C_REG, 14, 4, 0 }, + { ARLDCL, C_REG, C_NONE, C_LCON, C_REG, 14, 4, 0 }, + + { AFADD, C_FREG, C_NONE, C_NONE, C_FREG, 2, 4, 0 }, + { AFADD, C_FREG, C_REG, C_NONE, C_FREG, 2, 4, 0 }, + { AFABS, C_FREG, C_NONE, C_NONE, C_FREG, 33, 4, 0 }, + { AFABS, C_NONE, C_NONE, C_NONE, C_FREG, 33, 4, 0 }, + { AFMOVD, C_FREG, C_NONE, C_NONE, C_FREG, 33, 4, 0 }, + + { AFMADD, C_FREG, C_REG, C_FREG, C_FREG, 34, 4, 0 }, + { AFMUL, C_FREG, C_NONE, C_NONE, C_FREG, 32, 4, 0 }, + { AFMUL, C_FREG, C_REG, C_NONE, C_FREG, 32, 4, 0 }, + + /* store, short offset */ + { AMOVD, C_REG, C_REG, C_NONE, C_ZOREG, 7, 4, REGZERO }, + { AMOVW, C_REG, C_REG, C_NONE, C_ZOREG, 7, 4, REGZERO }, + { AMOVWZ, C_REG, C_REG, C_NONE, C_ZOREG, 7, 4, REGZERO }, + { AMOVBZ, C_REG, C_REG, C_NONE, C_ZOREG, 7, 4, REGZERO }, + { AMOVBZU, C_REG, C_REG, C_NONE, C_ZOREG, 7, 4, REGZERO }, + { AMOVB, C_REG, C_REG, C_NONE, C_ZOREG, 7, 4, REGZERO }, + { AMOVBU, C_REG, C_REG, C_NONE, C_ZOREG, 7, 4, REGZERO }, + { AMOVD, C_REG, C_NONE, C_NONE, C_SEXT, 7, 4, REGSB }, + { AMOVW, C_REG, C_NONE, C_NONE, C_SEXT, 7, 4, REGSB }, + { AMOVWZ, C_REG, C_NONE, C_NONE, C_SEXT, 7, 4, REGSB }, + { AMOVBZ, C_REG, C_NONE, C_NONE, C_SEXT, 7, 4, REGSB }, + { AMOVB, C_REG, C_NONE, C_NONE, C_SEXT, 7, 4, REGSB }, + { AMOVD, C_REG, C_NONE, C_NONE, C_SAUTO, 7, 4, REGSP }, + { AMOVW, C_REG, C_NONE, C_NONE, C_SAUTO, 7, 4, REGSP }, + { AMOVWZ, C_REG, C_NONE, C_NONE, C_SAUTO, 7, 4, REGSP }, + { AMOVBZ, C_REG, C_NONE, C_NONE, C_SAUTO, 7, 4, REGSP }, + { AMOVB, C_REG, C_NONE, C_NONE, C_SAUTO, 7, 4, REGSP }, + { AMOVD, C_REG, C_NONE, C_NONE, C_SOREG, 7, 4, REGZERO }, + { AMOVW, C_REG, C_NONE, C_NONE, C_SOREG, 7, 4, REGZERO }, + { AMOVWZ, C_REG, C_NONE, C_NONE, C_SOREG, 7, 4, REGZERO }, + { AMOVBZ, C_REG, C_NONE, C_NONE, C_SOREG, 7, 4, REGZERO }, + { AMOVBZU, C_REG, C_NONE, C_NONE, C_SOREG, 7, 4, REGZERO }, + { AMOVB, C_REG, C_NONE, C_NONE, C_SOREG, 7, 4, REGZERO }, + { AMOVBU, C_REG, C_NONE, C_NONE, C_SOREG, 7, 4, REGZERO }, + + /* load, short offset */ + { AMOVD, C_ZOREG,C_REG, C_NONE, C_REG, 8, 4, REGZERO }, + { AMOVW, C_ZOREG,C_REG, C_NONE, C_REG, 8, 4, REGZERO }, + { AMOVWZ, C_ZOREG,C_REG, C_NONE, C_REG, 8, 4, REGZERO }, + { AMOVBZ, C_ZOREG,C_REG, C_NONE, C_REG, 8, 4, REGZERO }, + { AMOVBZU, C_ZOREG,C_REG, C_NONE, C_REG, 8, 4, REGZERO }, + { AMOVB, C_ZOREG,C_REG, C_NONE, C_REG, 9, 8, REGZERO }, + { AMOVBU, C_ZOREG,C_REG, C_NONE, C_REG, 9, 8, REGZERO }, + { AMOVD, C_SEXT, C_NONE, C_NONE, C_REG, 8, 4, REGSB }, + { AMOVW, C_SEXT, C_NONE, C_NONE, C_REG, 8, 4, REGSB }, + { AMOVWZ, C_SEXT, C_NONE, C_NONE, C_REG, 8, 4, REGSB }, + { AMOVBZ, C_SEXT, C_NONE, C_NONE, C_REG, 8, 4, REGSB }, + { AMOVB, C_SEXT, C_NONE, C_NONE, C_REG, 9, 8, REGSB }, + { AMOVD, C_SAUTO,C_NONE, C_NONE, C_REG, 8, 4, REGSP }, + { AMOVW, C_SAUTO,C_NONE, C_NONE, C_REG, 8, 4, REGSP }, + { AMOVWZ, C_SAUTO,C_NONE, C_NONE, C_REG, 8, 4, REGSP }, + { AMOVBZ, C_SAUTO,C_NONE, C_NONE, C_REG, 8, 4, REGSP }, + { AMOVB, C_SAUTO,C_NONE, C_NONE, C_REG, 9, 8, REGSP }, + { AMOVD, C_SOREG,C_NONE, C_NONE, C_REG, 8, 4, REGZERO }, + { AMOVW, C_SOREG,C_NONE, C_NONE, C_REG, 8, 4, REGZERO }, + { AMOVWZ, C_SOREG,C_NONE, C_NONE, C_REG, 8, 4, REGZERO }, + { AMOVBZ, C_SOREG,C_NONE, C_NONE, C_REG, 8, 4, REGZERO }, + { AMOVBZU, C_SOREG,C_NONE, C_NONE, C_REG, 8, 4, REGZERO }, + { AMOVB, C_SOREG,C_NONE, C_NONE, C_REG, 9, 8, REGZERO }, + { AMOVBU, C_SOREG,C_NONE, C_NONE, C_REG, 9, 8, REGZERO }, + + /* store, long offset */ + { AMOVD, C_REG, C_NONE, C_NONE, C_LEXT, 35, 8, REGSB }, + { AMOVW, C_REG, C_NONE, C_NONE, C_LEXT, 35, 8, REGSB }, + { AMOVWZ, C_REG, C_NONE, C_NONE, C_LEXT, 35, 8, REGSB }, + { AMOVBZ, C_REG, C_NONE, C_NONE, C_LEXT, 35, 8, REGSB }, + { AMOVB, C_REG, C_NONE, C_NONE, C_LEXT, 35, 8, REGSB }, + { AMOVD, C_REG, C_NONE, C_NONE, C_LAUTO, 35, 8, REGSP }, + { AMOVW, C_REG, C_NONE, C_NONE, C_LAUTO, 35, 8, REGSP }, + { AMOVWZ, C_REG, C_NONE, C_NONE, C_LAUTO, 35, 8, REGSP }, + { AMOVBZ, C_REG, C_NONE, C_NONE, C_LAUTO, 35, 8, REGSP }, + { AMOVB, C_REG, C_NONE, C_NONE, C_LAUTO, 35, 8, REGSP }, + { AMOVD, C_REG, C_NONE, C_NONE, C_LOREG, 35, 8, REGZERO }, + { AMOVWZ, C_REG, C_NONE, C_NONE, C_LOREG, 35, 8, REGZERO }, + { AMOVBZ, C_REG, C_NONE, C_NONE, C_LOREG, 35, 8, REGZERO }, + { AMOVB, C_REG, C_NONE, C_NONE, C_LOREG, 35, 8, REGZERO }, + { AMOVD, C_REG, C_NONE, C_NONE, C_ADDR, 74, 8, 0 }, + { AMOVW, C_REG, C_NONE, C_NONE, C_ADDR, 74, 8, 0 }, + { AMOVWZ, C_REG, C_NONE, C_NONE, C_ADDR, 74, 8, 0 }, + { AMOVBZ, C_REG, C_NONE, C_NONE, C_ADDR, 74, 8, 0 }, + { AMOVB, C_REG, C_NONE, C_NONE, C_ADDR, 74, 8, 0 }, + + /* load, long offset */ + { AMOVD, C_LEXT, C_NONE, C_NONE, C_REG, 36, 8, REGSB }, + { AMOVW, C_LEXT, C_NONE, C_NONE, C_REG, 36, 8, REGSB }, + { AMOVWZ, C_LEXT, C_NONE, C_NONE, C_REG, 36, 8, REGSB }, + { AMOVBZ, C_LEXT, C_NONE, C_NONE, C_REG, 36, 8, REGSB }, + { AMOVB, C_LEXT, C_NONE, C_NONE, C_REG, 37, 12, REGSB }, + { AMOVD, C_LAUTO,C_NONE, C_NONE, C_REG, 36, 8, REGSP }, + { AMOVW, C_LAUTO,C_NONE, C_NONE, C_REG, 36, 8, REGSP }, + { AMOVWZ, C_LAUTO,C_NONE, C_NONE, C_REG, 36, 8, REGSP }, + { AMOVBZ, C_LAUTO,C_NONE, C_NONE, C_REG, 36, 8, REGSP }, + { AMOVB, C_LAUTO,C_NONE, C_NONE, C_REG, 37, 12, REGSP }, + { AMOVD, C_LOREG,C_NONE, C_NONE, C_REG, 36, 8, REGZERO }, + { AMOVW, C_LOREG,C_NONE, C_NONE, C_REG, 36, 8, REGZERO }, + { AMOVWZ, C_LOREG,C_NONE, C_NONE, C_REG, 36, 8, REGZERO }, + { AMOVBZ, C_LOREG,C_NONE, C_NONE, C_REG, 36, 8, REGZERO }, + { AMOVB, C_LOREG,C_NONE, C_NONE, C_REG, 37, 12, REGZERO }, + { AMOVD, C_ADDR, C_NONE, C_NONE, C_REG, 75, 8, 0 }, + { AMOVW, C_ADDR, C_NONE, C_NONE, C_REG, 75, 8, 0 }, + { AMOVWZ, C_ADDR, C_NONE, C_NONE, C_REG, 75, 8, 0 }, + { AMOVBZ, C_ADDR, C_NONE, C_NONE, C_REG, 75, 8, 0 }, + { AMOVB, C_ADDR, C_NONE, C_NONE, C_REG, 76, 12, 0 }, + + /* load constant */ + { AMOVD, C_SECON,C_NONE, C_NONE, C_REG, 3, 4, REGSB }, + { AMOVD, C_SACON,C_NONE, C_NONE, C_REG, 3, 4, REGSP }, + { AMOVD, C_LECON,C_NONE, C_NONE, C_REG, 26, 8, REGSB }, + { AMOVD, C_LACON,C_NONE, C_NONE, C_REG, 26, 8, REGSP }, + { AMOVD, C_ADDCON,C_NONE, C_NONE, C_REG, 3, 4, REGZERO }, + { AMOVW, C_SECON,C_NONE, C_NONE, C_REG, 3, 4, REGSB }, /* TO DO: check */ + { AMOVW, C_SACON,C_NONE, C_NONE, C_REG, 3, 4, REGSP }, + { AMOVW, C_LECON,C_NONE, C_NONE, C_REG, 26, 8, REGSB }, + { AMOVW, C_LACON,C_NONE, C_NONE, C_REG, 26, 8, REGSP }, + { AMOVW, C_ADDCON,C_NONE, C_NONE, C_REG, 3, 4, REGZERO }, + { AMOVWZ, C_SECON,C_NONE, C_NONE, C_REG, 3, 4, REGSB }, /* TO DO: check */ + { AMOVWZ, C_SACON,C_NONE, C_NONE, C_REG, 3, 4, REGSP }, + { AMOVWZ, C_LECON,C_NONE, C_NONE, C_REG, 26, 8, REGSB }, + { AMOVWZ, C_LACON,C_NONE, C_NONE, C_REG, 26, 8, REGSP }, + { AMOVWZ, C_ADDCON,C_NONE, C_NONE, C_REG, 3, 4, REGZERO }, + + /* load unsigned/long constants (TO DO: check) */ + { AMOVD, C_UCON, C_NONE, C_NONE, C_REG, 3, 4, REGZERO }, + { AMOVD, C_LCON, C_NONE, C_NONE, C_REG, 19, 8, 0 }, + { AMOVW, C_UCON, C_NONE, C_NONE, C_REG, 3, 4, REGZERO }, + { AMOVW, C_LCON, C_NONE, C_NONE, C_REG, 19, 8, 0 }, + { AMOVWZ, C_UCON, C_NONE, C_NONE, C_REG, 3, 4, REGZERO }, + { AMOVWZ, C_LCON, C_NONE, C_NONE, C_REG, 19, 8, 0 }, + + { AMOVHBR, C_ZOREG, C_REG, C_NONE, C_REG, 45, 4, 0 }, + { AMOVHBR, C_ZOREG, C_NONE, C_NONE, C_REG, 45, 4, 0 }, + { AMOVHBR, C_REG, C_REG, C_NONE, C_ZOREG, 44, 4, 0 }, + { AMOVHBR, C_REG, C_NONE, C_NONE, C_ZOREG, 44, 4, 0 }, + + { ASYSCALL, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0 }, + + { ABEQ, C_NONE, C_NONE, C_NONE, C_SBRA, 16, 4, 0 }, + { ABEQ, C_CREG, C_NONE, C_NONE, C_SBRA, 16, 4, 0 }, + + { ABR, C_NONE, C_NONE, C_NONE, C_LBRA, 11, 4, 0 }, + + { ABC, C_SCON, C_REG, C_NONE, C_SBRA, 16, 4, 0 }, + { ABC, C_SCON, C_REG, C_NONE, C_LBRA, 17, 4, 0 }, + + { ABR, C_NONE, C_NONE, C_NONE, C_LR, 18, 4, 0 }, + { ABR, C_NONE, C_NONE, C_NONE, C_CTR, 18, 4, 0 }, + { ABR, C_NONE, C_NONE, C_NONE, C_ZOREG, 15, 8, 0 }, + + { ABC, C_NONE, C_REG, C_NONE, C_LR, 18, 4, 0 }, + { ABC, C_NONE, C_REG, C_NONE, C_CTR, 18, 4, 0 }, + { ABC, C_SCON, C_REG, C_NONE, C_LR, 18, 4, 0 }, + { ABC, C_SCON, C_REG, C_NONE, C_CTR, 18, 4, 0 }, + { ABC, C_NONE, C_NONE, C_NONE, C_ZOREG, 15, 8, 0 }, + + { AFMOVD, C_SEXT, C_NONE, C_NONE, C_FREG, 8, 4, REGSB }, + { AFMOVD, C_SAUTO,C_NONE, C_NONE, C_FREG, 8, 4, REGSP }, + { AFMOVD, C_SOREG,C_NONE, C_NONE, C_FREG, 8, 4, REGZERO }, + + { AFMOVD, C_LEXT, C_NONE, C_NONE, C_FREG, 8, 4, REGSB }, + { AFMOVD, C_LAUTO,C_NONE, C_NONE, C_FREG, 8, 4, REGSP }, + { AFMOVD, C_LOREG,C_NONE, C_NONE, C_FREG, 8, 4, REGZERO }, + { AFMOVD, C_ADDR, C_NONE, C_NONE, C_FREG, 75, 8, 0 }, + + { AFMOVD, C_FREG, C_NONE, C_NONE, C_SEXT, 7, 4, REGSB }, + { AFMOVD, C_FREG, C_NONE, C_NONE, C_SAUTO, 7, 4, REGSP }, + { AFMOVD, C_FREG, C_NONE, C_NONE, C_SOREG, 7, 4, REGZERO }, + + { AFMOVD, C_FREG, C_NONE, C_NONE, C_LEXT, 7, 4, REGSB }, + { AFMOVD, C_FREG, C_NONE, C_NONE, C_LAUTO, 7, 4, REGSP }, + { AFMOVD, C_FREG, C_NONE, C_NONE, C_LOREG, 7, 4, REGZERO }, + { AFMOVD, C_FREG, C_NONE, C_NONE, C_ADDR, 74, 8, 0 }, + + { ASYNC, C_NONE, C_NONE, C_NONE, C_NONE, 46, 4, 0 }, + { AWORD, C_LCON, C_NONE, C_NONE, C_NONE, 40, 4, 0 }, + { ADWORD, C_LCON, C_NONE, C_NONE, C_NONE, 31, 8, 0 }, + + { AADDME, C_REG, C_NONE, C_NONE, C_REG, 47, 4, 0 }, + + { AEXTSB, C_REG, C_NONE, C_NONE, C_REG, 48, 4, 0 }, + { AEXTSB, C_NONE, C_NONE, C_NONE, C_REG, 48, 4, 0 }, + + { ANEG, C_REG, C_NONE, C_NONE, C_REG, 47, 4, 0 }, + { ANEG, C_NONE, C_NONE, C_NONE, C_REG, 47, 4, 0 }, + + { AREM, C_REG, C_NONE, C_NONE, C_REG, 50, 12, 0 }, + { AREM, C_REG, C_REG, C_NONE, C_REG, 50, 12, 0 }, + { AREMD, C_REG, C_NONE, C_NONE, C_REG, 51, 12, 0 }, + { AREMD, C_REG, C_REG, C_NONE, C_REG, 51, 12, 0 }, + + { AMTFSB0, C_SCON, C_NONE, C_NONE, C_NONE, 52, 4, 0 }, + { AMOVFL, C_FPSCR, C_NONE, C_NONE, C_FREG, 53, 4, 0 }, + { AMOVFL, C_FREG, C_NONE, C_NONE, C_FPSCR, 64, 4, 0 }, + { AMOVFL, C_FREG, C_NONE, C_LCON, C_FPSCR, 64, 4, 0 }, + { AMOVFL, C_LCON, C_NONE, C_NONE, C_FPSCR, 65, 4, 0 }, + + { AMOVD, C_MSR, C_NONE, C_NONE, C_REG, 54, 4, 0 }, /* mfmsr */ + { AMOVD, C_REG, C_NONE, C_NONE, C_MSR, 54, 4, 0 }, /* mtmsrd */ + { AMOVWZ, C_REG, C_NONE, C_NONE, C_MSR, 54, 4, 0 }, /* mtmsr */ + + /* 64-bit special registers */ + { AMOVD, C_REG, C_NONE, C_NONE, C_SPR, 66, 4, 0 }, + { AMOVD, C_REG, C_NONE, C_NONE, C_LR, 66, 4, 0 }, + { AMOVD, C_REG, C_NONE, C_NONE, C_CTR, 66, 4, 0 }, + { AMOVD, C_REG, C_NONE, C_NONE, C_XER, 66, 4, 0 }, + { AMOVD, C_SPR, C_NONE, C_NONE, C_REG, 66, 4, 0 }, + { AMOVD, C_LR, C_NONE, C_NONE, C_REG, 66, 4, 0 }, + { AMOVD, C_CTR, C_NONE, C_NONE, C_REG, 66, 4, 0 }, + { AMOVD, C_XER, C_NONE, C_NONE, C_REG, 66, 4, 0 }, + + /* 32-bit special registers (gloss over sign-extension or not?) */ + { AMOVW, C_REG, C_NONE, C_NONE, C_SPR, 66, 4, 0 }, + { AMOVW, C_REG, C_NONE, C_NONE, C_CTR, 66, 4, 0 }, + { AMOVW, C_REG, C_NONE, C_NONE, C_XER, 66, 4, 0 }, + { AMOVW, C_SPR, C_NONE, C_NONE, C_REG, 66, 4, 0 }, + { AMOVW, C_XER, C_NONE, C_NONE, C_REG, 66, 4, 0 }, + + { AMOVWZ, C_REG, C_NONE, C_NONE, C_SPR, 66, 4, 0 }, + { AMOVWZ, C_REG, C_NONE, C_NONE, C_CTR, 66, 4, 0 }, + { AMOVWZ, C_REG, C_NONE, C_NONE, C_XER, 66, 4, 0 }, + { AMOVWZ, C_SPR, C_NONE, C_NONE, C_REG, 66, 4, 0 }, + { AMOVWZ, C_XER, C_NONE, C_NONE, C_REG, 66, 4, 0 }, + + { AMOVFL, C_FPSCR, C_NONE, C_NONE, C_CREG, 73, 4, 0 }, + { AMOVFL, C_CREG, C_NONE, C_NONE, C_CREG, 67, 4, 0 }, + { AMOVW, C_CREG, C_NONE, C_NONE, C_REG, 68, 4, 0 }, + { AMOVWZ, C_CREG, C_NONE, C_NONE, C_REG, 68, 4, 0 }, + { AMOVFL, C_REG, C_NONE, C_LCON, C_CREG, 69, 4, 0 }, + { AMOVFL, C_REG, C_NONE, C_NONE, C_CREG, 69, 4, 0 }, + { AMOVW, C_REG, C_NONE, C_NONE, C_CREG, 69, 4, 0 }, + { AMOVWZ, C_REG, C_NONE, C_NONE, C_CREG, 69, 4, 0 }, + + { ACMP, C_REG, C_NONE, C_NONE, C_REG, 70, 4, 0 }, + { ACMP, C_REG, C_REG, C_NONE, C_REG, 70, 4, 0 }, + { ACMP, C_REG, C_NONE, C_NONE, C_ADDCON, 71, 4, 0 }, + { ACMP, C_REG, C_REG, C_NONE, C_ADDCON, 71, 4, 0 }, + + { ACMPU, C_REG, C_NONE, C_NONE, C_REG, 70, 4, 0 }, + { ACMPU, C_REG, C_REG, C_NONE, C_REG, 70, 4, 0 }, + { ACMPU, C_REG, C_NONE, C_NONE, C_ANDCON, 71, 4, 0 }, + { ACMPU, C_REG, C_REG, C_NONE, C_ANDCON, 71, 4, 0 }, + + { AFCMPO, C_FREG, C_NONE, C_NONE, C_FREG, 70, 4, 0 }, + { AFCMPO, C_FREG, C_REG, C_NONE, C_FREG, 70, 4, 0 }, + + { ATW, C_LCON, C_REG, C_NONE, C_REG, 60, 4, 0 }, + { ATW, C_LCON, C_REG, C_NONE, C_ADDCON, 61, 4, 0 }, + + { ADCBF, C_ZOREG, C_NONE, C_NONE, C_NONE, 43, 4, 0 }, + { ADCBF, C_ZOREG, C_REG, C_NONE, C_NONE, 43, 4, 0 }, + + { AECOWX, C_REG, C_REG, C_NONE, C_ZOREG, 44, 4, 0 }, + { AECIWX, C_ZOREG, C_REG, C_NONE, C_REG, 45, 4, 0 }, + { AECOWX, C_REG, C_NONE, C_NONE, C_ZOREG, 44, 4, 0 }, + { AECIWX, C_ZOREG, C_NONE, C_NONE, C_REG, 45, 4, 0 }, + + { AEIEIO, C_NONE, C_NONE, C_NONE, C_NONE, 46, 4, 0 }, + { ATLBIE, C_REG, C_NONE, C_NONE, C_NONE, 49, 4, 0 }, + { ATLBIE, C_SCON, C_NONE, C_NONE, C_REG, 49, 4, 0 }, + { ASLBMFEE, C_REG, C_NONE, C_NONE, C_REG, 55, 4, 0 }, + { ASLBMTE, C_REG, C_NONE, C_NONE, C_REG, 55, 4, 0 }, + + { ASTSW, C_REG, C_NONE, C_NONE, C_ZOREG, 44, 4, 0 }, + { ASTSW, C_REG, C_NONE, C_LCON, C_ZOREG, 41, 4, 0 }, + { ALSW, C_ZOREG, C_NONE, C_NONE, C_REG, 45, 4, 0 }, + { ALSW, C_ZOREG, C_NONE, C_LCON, C_REG, 42, 4, 0 }, + + { AXXX, C_NONE, C_NONE, C_NONE, C_NONE, 0, 4, 0 }, +}; + +#include "l.h" + +#define OPVCC(o,xo,oe,rc) (((o)<<26)|((xo)<<1)|((oe)<<10)|((rc)&1)) +#define OPCC(o,xo,rc) OPVCC((o),(xo),0,(rc)) +#define OP(o,xo) OPVCC((o),(xo),0,0) + +/* the order is dest, a/s, b/imm for both arithmetic and logical operations */ +#define AOP_RRR(op,d,a,b) ((op)|(((d)&31L)<<21)|(((a)&31L)<<16)|(((b)&31L)<<11)) +#define AOP_IRR(op,d,a,simm) ((op)|(((d)&31L)<<21)|(((a)&31L)<<16)|((simm)&0xFFFF)) +#define LOP_RRR(op,a,s,b) ((op)|(((s)&31L)<<21)|(((a)&31L)<<16)|(((b)&31L)<<11)) +#define LOP_IRR(op,a,s,uimm) ((op)|(((s)&31L)<<21)|(((a)&31L)<<16)|((uimm)&0xFFFF)) +#define OP_BR(op,li,aa) ((op)|((li)&0x03FFFFFC)|((aa)<<1)) +#define OP_BC(op,bo,bi,bd,aa) ((op)|(((bo)&0x1F)<<21)|(((bi)&0x1F)<<16)|((bd)&0xFFFC)|((aa)<<1)) +#define OP_BCR(op,bo,bi) ((op)|(((bo)&0x1F)<<21)|(((bi)&0x1F)<<16)) +#define OP_RLW(op,a,s,sh,mb,me) ((op)|(((s)&31L)<<21)|(((a)&31L)<<16)|(((sh)&31L)<<11)|\ + (((mb)&31L)<<6)|(((me)&31L)<<1)) + +#define OP_ADD OPVCC(31,266,0,0) +#define OP_ADDI OPVCC(14,0,0,0) +#define OP_ADDIS OPVCC(15,0,0,0) +#define OP_ANDI OPVCC(28,0,0,0) +#define OP_EXTSB OPVCC(31,954,0,0) +#define OP_EXTSH OPVCC(31,922,0,0) +#define OP_EXTSW OPVCC(31,986,0,0) +#define OP_MCRF OPVCC(19,0,0,0) +#define OP_MCRFS OPVCC(63,64,0,0) +#define OP_MCRXR OPVCC(31,512,0,0) +#define OP_MFCR OPVCC(31,19,0,0) +#define OP_MFFS OPVCC(63,583,0,0) +#define OP_MFMSR OPVCC(31,83,0,0) +#define OP_MFSPR OPVCC(31,339,0,0) +#define OP_MFSR OPVCC(31,595,0,0) +#define OP_MFSRIN OPVCC(31,659,0,0) +#define OP_MTCRF OPVCC(31,144,0,0) +#define OP_MTFSF OPVCC(63,711,0,0) +#define OP_MTFSFI OPVCC(63,134,0,0) +#define OP_MTMSR OPVCC(31,146,0,0) +#define OP_MTMSRD OPVCC(31,178,0,0) +#define OP_MTSPR OPVCC(31,467,0,0) +#define OP_MTSR OPVCC(31,210,0,0) +#define OP_MTSRIN OPVCC(31,242,0,0) +#define OP_MULLW OPVCC(31,235,0,0) +#define OP_MULLD OPVCC(31,233,0,0) +#define OP_OR OPVCC(31,444,0,0) +#define OP_ORI OPVCC(24,0,0,0) +#define OP_ORIS OPVCC(25,0,0,0) +#define OP_RLWINM OPVCC(21,0,0,0) +#define OP_SUBF OPVCC(31,40,0,0) +#define OP_RLDIC OPVCC(30,4,0,0) +#define OP_RLDICR OPVCC(30,2,0,0) +#define OP_RLDICL OPVCC(30,0,0,0) + +#define oclass(v) ((v).class-1) + +long oprrr(int), opirr(int), opload(int), opstore(int), oploadx(int), opstorex(int); + +/* + * 32-bit masks + */ +int +getmask(uchar *m, ulong v) +{ + int i; + + m[0] = m[1] = 0; + if(v != ~0L && v & (1<<31) && v & 1){ /* MB > ME */ + if(getmask(m, ~v)){ + i = m[0]; m[0] = m[1]+1; m[1] = i-1; + return 1; + } + return 0; + } + for(i=0; i<32; i++) + if(v & (1<<(31-i))){ + m[0] = i; + do { + m[1] = i; + } while(++i<32 && (v & (1<<(31-i))) != 0); + for(; i<32; i++) + if(v & (1<<(31-i))) + return 0; + return 1; + } + return 0; +} + +void +maskgen(Prog *p, uchar *m, ulong v) +{ + if(!getmask(m, v)) + diag("cannot generate mask #%lux\n%P", v, p); +} + +/* + * 64-bit masks (rldic etc) + */ +int +getmask64(uchar *m, uvlong v) +{ + int i; + + m[0] = m[1] = 0; + for(i=0; i<64; i++) + if(v & ((uvlong)1<<(63-i))){ + m[0] = i; + do { + m[1] = i; + } while(++i<64 && (v & ((uvlong)1<<(63-i))) != 0); + for(; i<64; i++) + if(v & ((uvlong)1<<(63-i))) + return 0; + return 1; + } + return 0; +} + +void +maskgen64(Prog *p, uchar *m, uvlong v) +{ + if(!getmask64(m, v)) + diag("cannot generate mask #%llux\n%P", v, p); +} + +static void +reloc(Adr *a, long pc, int sext) +{ + if(a->name == D_EXTERN || a->name == D_STATIC) + dynreloc(a->sym, pc, 1, 1, sext); +} + +static ulong +loadu32(int r, vlong d) +{ + long v; + + v = d>>16; + if(isuint32(d)) + return LOP_IRR(OP_ORIS, r, REGZERO, v); + return AOP_IRR(OP_ADDIS, r, REGZERO, v); +} + +int +asmout(Prog *p, Optab *o, int aflag) +{ + long o1, o2, o3, o4, o5, v, t; + vlong d; + Prog *ct; + int r, a; + uchar mask[2]; + + o1 = 0; + o2 = 0; + o3 = 0; + o4 = 0; + o5 = 0; + switch(o->type) { + default: + if(aflag) + return 0; + diag("unknown type %d", o->type); + if(!debug['a']) + prasm(p); + break; + + case 0: /* pseudo ops */ + if(aflag) { + if(p->link) { + if(p->as == ATEXT) { + ct = curtext; + o2 = autosize; + curtext = p; + autosize = p->to.offset + 8; + o1 = asmout(p->link, oplook(p->link), aflag); + curtext = ct; + autosize = o2; + } else + o1 = asmout(p->link, oplook(p->link), aflag); + } + return o1; + } + break; + + case 1: /* mov r1,r2 ==> OR Rs,Rs,Ra */ + if(p->to.reg == REGZERO && p->from.type == D_CONST) { + v = regoff(&p->from); + if(r0iszero && v != 0) { + nerrors--; + diag("literal operation on R0\n%P", p); + } + o1 = LOP_IRR(OP_ADDI, REGZERO, REGZERO, v); + break; + } + o1 = LOP_RRR(OP_OR, p->to.reg, p->from.reg, p->from.reg); + break; + + case 2: /* int/cr/fp op Rb,[Ra],Rd */ + r = p->reg; + if(r == NREG) + r = p->to.reg; + o1 = AOP_RRR(oprrr(p->as), p->to.reg, r, p->from.reg); + break; + + case 3: /* mov $soreg/addcon/ucon, r ==> addis/addi $i,reg',r */ + d = vregoff(&p->from); + v = d; + r = p->from.reg; + if(r == NREG) + r = o->param; + if(r0iszero && p->to.reg == 0 && (r != 0 || v != 0)) + diag("literal operation on R0\n%P", p); + a = OP_ADDI; + if(o->a1 == C_UCON) { + v >>= 16; + if(r == REGZERO && isuint32(d)){ + o1 = LOP_IRR(OP_ORIS, p->to.reg, REGZERO, v); + break; + } + a = OP_ADDIS; + } + o1 = AOP_IRR(a, p->to.reg, r, v); + break; + + case 4: /* add/mul $scon,[r1],r2 */ + v = regoff(&p->from); + r = p->reg; + if(r == NREG) + r = p->to.reg; + if(r0iszero && p->to.reg == 0) + diag("literal operation on R0\n%P", p); + o1 = AOP_IRR(opirr(p->as), p->to.reg, r, v); + break; + + case 5: /* syscall */ + if(aflag) + return 0; + o1 = oprrr(p->as); + break; + + case 6: /* logical op Rb,[Rs,]Ra; no literal */ + r = p->reg; + if(r == NREG) + r = p->to.reg; + o1 = LOP_RRR(oprrr(p->as), p->to.reg, r, p->from.reg); + break; + + case 7: /* mov r, soreg ==> stw o(r) */ + r = p->to.reg; + if(r == NREG) + r = o->param; + v = regoff(&p->to); + if(p->to.type == D_OREG && p->reg != NREG) { + if(v) + diag("illegal indexed instruction\n%P", p); + o1 = AOP_RRR(opstorex(p->as), p->from.reg, p->reg, r); + } else + o1 = AOP_IRR(opstore(p->as), p->from.reg, r, v); + break; + + case 8: /* mov soreg, r ==> lbz/lhz/lwz o(r) */ + r = p->from.reg; + if(r == NREG) + r = o->param; + v = regoff(&p->from); + if(p->from.type == D_OREG && p->reg != NREG) { + if(v) + diag("illegal indexed instruction\n%P", p); + o1 = AOP_RRR(oploadx(p->as), p->to.reg, p->reg, r); + } else + o1 = AOP_IRR(opload(p->as), p->to.reg, r, v); + break; + + case 9: /* movb soreg, r ==> lbz o(r),r2; extsb r2,r2 */ + r = p->from.reg; + if(r == NREG) + r = o->param; + v = regoff(&p->from); + if(p->from.type == D_OREG && p->reg != NREG) { + if(v) + diag("illegal indexed instruction\n%P", p); + o1 = AOP_RRR(oploadx(p->as), p->to.reg, p->reg, r); + } else + o1 = AOP_IRR(opload(p->as), p->to.reg, r, v); + o2 = LOP_RRR(OP_EXTSB, p->to.reg, p->to.reg, 0); + break; + + case 10: /* sub Ra,[Rb],Rd => subf Rd,Ra,Rb */ + r = p->reg; + if(r == NREG) + r = p->to.reg; + o1 = AOP_RRR(oprrr(p->as), p->to.reg, p->from.reg, r); + break; + + case 11: /* br/bl lbra */ + if(aflag) + return 0; + v = 0; + if(p->cond == UP){ + if(p->to.sym->type != SUNDEF) + diag("bad branch sym type"); + v = (ulong)p->to.sym->value >> (Roffset-2); + dynreloc(p->to.sym, p->pc, 0, 0, 0); + } + else if(p->cond) + v = p->cond->pc - p->pc; + if(v & 03) { + diag("odd branch target address\n%P", p); + v &= ~03; + } + if(v < -(1L<<25) || v >= (1L<<24)) + diag("branch too far\n%P", p); + o1 = OP_BR(opirr(p->as), v, 0); + break; + + case 12: /* movb r,r (extsb); movw r,r (extsw) */ + if(p->to.reg == REGZERO && p->from.type == D_CONST) { + v = regoff(&p->from); + if(r0iszero && v != 0) { + nerrors--; + diag("literal operation on R0\n%P", p); + } + o1 = LOP_IRR(OP_ADDI, REGZERO, REGZERO, v); + break; + } + if(p->as == AMOVW) + o1 = LOP_RRR(OP_EXTSW, p->to.reg, p->from.reg, 0); + else + o1 = LOP_RRR(OP_EXTSB, p->to.reg, p->from.reg, 0); + break; + + case 13: /* mov[bhw]z r,r; uses rlwinm not andi. to avoid changing CC */ + if(p->as == AMOVBZ) + o1 = OP_RLW(OP_RLWINM, p->to.reg, p->from.reg, 0, 24, 31); + else if(p->as == AMOVH) + o1 = LOP_RRR(OP_EXTSH, p->to.reg, p->from.reg, 0); + else if(p->as == AMOVHZ) + o1 = OP_RLW(OP_RLWINM, p->to.reg, p->from.reg, 0, 16, 31); + else if(p->as == AMOVWZ) + o1 = OP_RLW(OP_RLDIC, p->to.reg, p->from.reg, 0, 0, 0) | (1<<5); /* MB=32 */ + else + diag("internal: bad mov[bhw]z\n%P", p); + break; + + case 14: /* rldc[lr] Rb,Rs,$mask,Ra -- left, right give different masks */ + r = p->reg; + if(r == NREG) + r = p->to.reg; + d = vregoff(&p->from3); + maskgen64(p, mask, d); + switch(p->as){ + case ARLDCL: case ARLDCLCC: + a = mask[0]; /* MB */ + if(mask[1] != 63) + diag("invalid mask for rotate: %llux (end != bit 63)\n%P", d, p); + break; + case ARLDCR: case ARLDCRCC: + a = mask[1]; /* ME */ + if(mask[0] != 0) + diag("invalid mask for rotate: %llux (start != 0)\n%P", d, p); + break; + default: + diag("unexpected op in rldc case\n%P", p); + a = 0; + } + o1 = LOP_RRR(oprrr(p->as), p->to.reg, r, p->from.reg); + o1 |= (a&31L)<<6; + if(a & 0x20) + o1 |= 1<<5; /* mb[5] is top bit */ + break; + + case 17: /* bc bo,bi,lbra (same for now) */ + case 16: /* bc bo,bi,sbra */ + if(aflag) + return 0; + a = 0; + if(p->from.type == D_CONST) + a = regoff(&p->from); + r = p->reg; + if(r == NREG) + r = 0; + v = 0; + if(p->cond) + v = p->cond->pc - p->pc; + if(v & 03) { + diag("odd branch target address\n%P", p); + v &= ~03; + } + if(v < -(1L<<16) || v >= (1L<<15)) + diag("branch too far\n%P", p); + o1 = OP_BC(opirr(p->as), a, r, v, 0); + break; + + case 15: /* br/bl (r) => mov r,lr; br/bl (lr) */ + if(aflag) + return 0; + if(p->as == ABC || p->as == ABCL) + v = regoff(&p->to)&31L; + else + v = 20; /* unconditional */ + r = p->reg; + if(r == NREG) + r = 0; + o1 = AOP_RRR(OP_MTSPR, p->to.reg, 0, 0) | ((D_LR&0x1f)<<16) | (((D_LR>>5)&0x1f)<<11); + o2 = OPVCC(19, 16, 0, 0); + if(p->as == ABL || p->as == ABCL) + o2 |= 1; + o2 = OP_BCR(o2, v, r); + break; + + case 18: /* br/bl (lr/ctr); bc/bcl bo,bi,(lr/ctr) */ + if(aflag) + return 0; + if(p->as == ABC || p->as == ABCL) + v = regoff(&p->from)&31L; + else + v = 20; /* unconditional */ + r = p->reg; + if(r == NREG) + r = 0; + switch(oclass(p->to)) { + case C_CTR: + o1 = OPVCC(19, 528, 0, 0); + break; + case C_LR: + o1 = OPVCC(19, 16, 0, 0); + break; + default: + diag("bad optab entry (18): %d\n%P", p->to.class, p); + v = 0; + } + if(p->as == ABL || p->as == ABCL) + o1 |= 1; + o1 = OP_BCR(o1, v, r); + break; + + case 19: /* mov $lcon,r ==> cau+or */ + d = vregoff(&p->from); + o1 = loadu32(p->to.reg, d); + o2 = LOP_IRR(OP_ORI, p->to.reg, p->to.reg, (long)d); + if(dlm) + reloc(&p->from, p->pc, 0); + break; + + case 20: /* add $ucon,,r */ + v = regoff(&p->from); + r = p->reg; + if(r == NREG) + r = p->to.reg; + if(p->as == AADD && (!r0iszero && p->reg == 0 || r0iszero && p->to.reg == 0)) + diag("literal operation on R0\n%P", p); + o1 = AOP_IRR(opirr(p->as+AEND), p->to.reg, r, v>>16); + break; + + case 22: /* add $lcon,r1,r2 ==> cau+or+add */ /* could do add/sub more efficiently */ + if(p->to.reg == REGTMP || p->reg == REGTMP) + diag("cant synthesize large constant\n%P", p); + d = vregoff(&p->from); + o1 = loadu32(REGTMP, d); + o2 = LOP_IRR(OP_ORI, REGTMP, REGTMP, (long)d); + r = p->reg; + if(r == NREG) + r = p->to.reg; + o3 = AOP_RRR(oprrr(p->as), p->to.reg, REGTMP, r); + if(dlm) + reloc(&p->from, p->pc, 0); + break; + + case 23: /* and $lcon,r1,r2 ==> cau+or+and */ /* masks could be done using rlnm etc. */ + if(p->to.reg == REGTMP || p->reg == REGTMP) + diag("cant synthesize large constant\n%P", p); + d = vregoff(&p->from); + o1 = loadu32(REGTMP, d); + o2 = LOP_IRR(OP_ORI, REGTMP, REGTMP, (long)d); + r = p->reg; + if(r == NREG) + r = p->to.reg; + o3 = LOP_RRR(oprrr(p->as), p->to.reg, REGTMP, r); + if(dlm) + reloc(&p->from, p->pc, 0); + break; +/*24*/ + + case 25: /* sld[.] $sh,rS,rA -> rldicr[.] $sh,rS,mask(0,63-sh),rA; srd[.] -> rldicl */ + v = regoff(&p->from); + if(v < 0) + v = 0; + else if(v > 63) + v = 63; + r = p->reg; + if(r == NREG) + r = p->to.reg; + switch(p->as){ + case ASLD: case ASLDCC: + a = 63-v; + o1 = OP_RLDICR; + break; + case ASRD: case ASRDCC: + a = v; + v = 64-v; + o1 = OP_RLDICL; + break; + default: + diag("unexpected op in sldi case\n%P", p); + a = 0; + o1 = 0; + } + o1 = AOP_RRR(o1, r, p->to.reg, (v&0x1F)); + o1 |= (a&31L)<<6; + if(v & 0x20) + o1 |= 1<<1; + if(a & 0x20) + o1 |= 1<<5; /* mb[5] is top bit */ + if(p->as == ASLDCC || p->as == ASRDCC) + o1 |= 1; /* Rc */ + break; + + case 26: /* mov $lsext/auto/oreg,,r2 ==> addis+addi */ + if(p->to.reg == REGTMP) + diag("can't synthesize large constant\n%P", p); + v = regoff(&p->from); + if(v & 0x8000L) + v += 0x10000L; + r = p->from.reg; + if(r == NREG) + r = o->param; + o1 = AOP_IRR(OP_ADDIS, REGTMP, r, v>>16); + o2 = AOP_IRR(OP_ADDI, p->to.reg, REGTMP, v); + break; + + case 27: /* subc ra,$simm,rd => subfic rd,ra,$simm */ + v = regoff(&p->from3); + r = p->from.reg; + o1 = AOP_IRR(opirr(p->as), p->to.reg, r, v); + break; + + case 28: /* subc r1,$lcon,r2 ==> cau+or+subfc */ + if(p->to.reg == REGTMP || p->from.reg == REGTMP) + diag("can't synthesize large constant\n%P", p); + v = regoff(&p->from3); + o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, v>>16); + o2 = LOP_IRR(OP_ORI, REGTMP, REGTMP, v); + o3 = AOP_RRR(oprrr(p->as), p->to.reg, p->from.reg, REGTMP); + if(dlm) + reloc(&p->from3, p->pc, 0); + break; + + case 29: /* rldic[lr]? $sh,s,$mask,a -- left, right, plain give different masks */ + v = regoff(&p->from); + d = vregoff(&p->from3); + maskgen64(p, mask, d); + switch(p->as){ + case ARLDC: case ARLDCCC: + a = mask[0]; /* MB */ + if(mask[1] != (63-v)) + diag("invalid mask for shift: %llux (shift %ld)\n%P", d, v, p); + break; + case ARLDCL: case ARLDCLCC: + a = mask[0]; /* MB */ + if(mask[1] != 63) + diag("invalid mask for shift: %llux (shift %ld)\n%P", d, v, p); + break; + case ARLDCR: case ARLDCRCC: + a = mask[1]; /* ME */ + if(mask[0] != 0) + diag("invalid mask for shift: %llux (shift %ld)\n%P", d, v, p); + break; + default: + diag("unexpected op in rldic case\n%P", p); + a = 0; + } + o1 = AOP_RRR(opirr(p->as), p->reg, p->to.reg, (v&0x1F)); + o1 |= (a&31L)<<6; + if(v & 0x20) + o1 |= 1<<1; + if(a & 0x20) + o1 |= 1<<5; /* mb[5] is top bit */ + break; + + case 30: /* rldimi $sh,s,$mask,a */ + v = regoff(&p->from); + d = vregoff(&p->from3); + maskgen64(p, mask, d); + if(mask[1] != (63-v)) + diag("invalid mask for shift: %llux (shift %ld)\n%P", d, v, p); + o1 = AOP_RRR(opirr(p->as), p->reg, p->to.reg, (v&0x1F)); + o1 |= (mask[0]&31L)<<6; + if(v & 0x20) + o1 |= 1<<1; + if(mask[0] & 0x20) + o1 |= 1<<5; /* mb[5] is top bit */ + break; + + case 31: /* dword */ + if(aflag) + return 0; + d = vregoff(&p->from); + o1 = d>>32; + o2 = d; + break; + + case 32: /* fmul frc,fra,frd */ + r = p->reg; + if(r == NREG) + r = p->to.reg; + o1 = AOP_RRR(oprrr(p->as), p->to.reg, r, 0)|((p->from.reg&31L)<<6); + break; + + case 33: /* fabs [frb,]frd; fmr. frb,frd */ + r = p->from.reg; + if(oclass(p->from) == C_NONE) + r = p->to.reg; + o1 = AOP_RRR(oprrr(p->as), p->to.reg, 0, r); + break; + + case 34: /* FMADDx fra,frb,frc,frd (d=a*b+c); FSELx a<0? (d=b): (d=c) */ + o1 = AOP_RRR(oprrr(p->as), p->to.reg, p->from.reg, p->reg)|((p->from3.reg&31L)<<6); + break; + + case 35: /* mov r,lext/lauto/loreg ==> cau $(v>>16),sb,r'; store o(r') */ + v = regoff(&p->to); + if(v & 0x8000L) + v += 0x10000L; + r = p->to.reg; + if(r == NREG) + r = o->param; + o1 = AOP_IRR(OP_ADDIS, REGTMP, r, v>>16); + o2 = AOP_IRR(opstore(p->as), p->from.reg, REGTMP, v); + break; + + case 36: /* mov bz/h/hz lext/lauto/lreg,r ==> lbz/lha/lhz etc */ + v = regoff(&p->from); + if(v & 0x8000L) + v += 0x10000L; + r = p->from.reg; + if(r == NREG) + r = o->param; + o1 = AOP_IRR(OP_ADDIS, REGTMP, r, v>>16); + o2 = AOP_IRR(opload(p->as), p->to.reg, REGTMP, v); + break; + + case 37: /* movb lext/lauto/lreg,r ==> lbz o(reg),r; extsb r */ + v = regoff(&p->from); + if(v & 0x8000L) + v += 0x10000L; + r = p->from.reg; + if(r == NREG) + r = o->param; + o1 = AOP_IRR(OP_ADDIS, REGTMP, r, v>>16); + o2 = AOP_IRR(opload(p->as), p->to.reg, REGTMP, v); + o3 = LOP_RRR(OP_EXTSB, p->to.reg, p->to.reg, 0); + break; + + case 40: /* word */ + if(aflag) + return 0; + o1 = regoff(&p->from); + break; + + case 41: /* stswi */ + o1 = AOP_RRR(opirr(p->as), p->from.reg, p->to.reg, 0) | ((regoff(&p->from3)&0x7F)<<11); + break; + + case 42: /* lswi */ + o1 = AOP_RRR(opirr(p->as), p->to.reg, p->from.reg, 0) | ((regoff(&p->from3)&0x7F)<<11); + break; + + case 43: /* unary indexed source: dcbf (b); dcbf (a+b) */ + r = p->reg; + if(r == NREG) + r = 0; + o1 = AOP_RRR(oprrr(p->as), 0, r, p->from.reg); + break; + + case 44: /* indexed store */ + r = p->reg; + if(r == NREG) + r = 0; + o1 = AOP_RRR(opstorex(p->as), p->from.reg, r, p->to.reg); + break; + case 45: /* indexed load */ + r = p->reg; + if(r == NREG) + r = 0; + o1 = AOP_RRR(oploadx(p->as), p->to.reg, r, p->from.reg); + break; + + case 46: /* plain op */ + o1 = oprrr(p->as); + break; + + case 47: /* op Ra, Rd; also op [Ra,] Rd */ + r = p->from.reg; + if(r == NREG) + r = p->to.reg; + o1 = AOP_RRR(oprrr(p->as), p->to.reg, r, 0); + break; + + case 48: /* op Rs, Ra */ + r = p->from.reg; + if(r == NREG) + r = p->to.reg; + o1 = LOP_RRR(oprrr(p->as), p->to.reg, r, 0); + break; + + case 49: /* op Rb; op $n, Rb */ + if(p->from.type != D_REG){ /* tlbie $L, rB */ + v = regoff(&p->from) & 1; + o1 = AOP_RRR(oprrr(p->as), 0, 0, p->to.reg) | (v<<21); + }else + o1 = AOP_RRR(oprrr(p->as), 0, 0, p->from.reg); + break; + + case 50: /* rem[u] r1[,r2],r3 */ + r = p->reg; + if(r == NREG) + r = p->to.reg; + v = oprrr(p->as); + t = v & ((1<<10)|1); /* OE|Rc */ + o1 = AOP_RRR(v&~t, REGTMP, r, p->from.reg); + o2 = AOP_RRR(OP_MULLW, REGTMP, REGTMP, p->from.reg); + o3 = AOP_RRR(OP_SUBF|t, p->to.reg, REGTMP, r); + break; + + case 51: /* remd[u] r1[,r2],r3 */ + r = p->reg; + if(r == NREG) + r = p->to.reg; + v = oprrr(p->as); + t = v & ((1<<10)|1); /* OE|Rc */ + o1 = AOP_RRR(v&~t, REGTMP, r, p->from.reg); + o2 = AOP_RRR(OP_MULLD, REGTMP, REGTMP, p->from.reg); + o3 = AOP_RRR(OP_SUBF|t, p->to.reg, REGTMP, r); + break; + + case 52: /* mtfsbNx cr(n) */ + v = regoff(&p->from)&31L; + o1 = AOP_RRR(oprrr(p->as), v, 0, 0); + break; + + case 53: /* mffsX ,fr1 */ + o1 = AOP_RRR(OP_MFFS, p->to.reg, 0, 0); + break; + + case 54: /* mov msr,r1; mov r1, msr*/ + if(oclass(p->from) == C_REG){ + if(p->as == AMOVD) + o1 = AOP_RRR(OP_MTMSRD, p->from.reg, 0, 0); + else + o1 = AOP_RRR(OP_MTMSR, p->from.reg, 0, 0); + }else + o1 = AOP_RRR(OP_MFMSR, p->to.reg, 0, 0); + break; + + case 55: /* op Rb, Rd */ + o1 = AOP_RRR(oprrr(p->as), p->to.reg, 0, p->from.reg); + break; + + case 56: /* sra $sh,[s,]a; srd $sh,[s,]a */ + v = regoff(&p->from); + r = p->reg; + if(r == NREG) + r = p->to.reg; + o1 = AOP_RRR(opirr(p->as), r, p->to.reg, v&31L); + if(p->as == ASRAD && (v&0x20)) + o1 |= 1<<1; /* mb[5] */ + break; + + case 57: /* slw $sh,[s,]a -> rlwinm ... */ + v = regoff(&p->from); + r = p->reg; + if(r == NREG) + r = p->to.reg; + /* + * Let user (gs) shoot himself in the foot. + * qc has already complained. + * + if(v < 0 || v > 31) + diag("illegal shift %ld\n%P", v, p); + */ + if(v < 0) + v = 0; + else if(v > 32) + v = 32; + if(p->as == ASRW || p->as == ASRWCC) { /* shift right */ + mask[0] = v; + mask[1] = 31; + v = 32-v; + } else { + mask[0] = 0; + mask[1] = 31-v; + } + o1 = OP_RLW(OP_RLWINM, p->to.reg, r, v, mask[0], mask[1]); + if(p->as == ASLWCC || p->as == ASRWCC) + o1 |= 1; /* Rc */ + break; + + case 58: /* logical $andcon,[s],a */ + v = regoff(&p->from); + r = p->reg; + if(r == NREG) + r = p->to.reg; + o1 = LOP_IRR(opirr(p->as), p->to.reg, r, v); + break; + + case 59: /* or/and $ucon,,r */ + v = regoff(&p->from); + r = p->reg; + if(r == NREG) + r = p->to.reg; + o1 = LOP_IRR(opirr(p->as+AEND), p->to.reg, r, v>>16); /* oris, xoris, andis */ + break; + + case 60: /* tw to,a,b */ + r = regoff(&p->from)&31L; + o1 = AOP_RRR(oprrr(p->as), r, p->reg, p->to.reg); + break; + + case 61: /* tw to,a,$simm */ + r = regoff(&p->from)&31L; + v = regoff(&p->to); + o1 = AOP_IRR(opirr(p->as), r, p->reg, v); + break; + + case 62: /* rlwmi $sh,s,$mask,a */ + v = regoff(&p->from); + maskgen(p, mask, regoff(&p->from3)); + o1 = AOP_RRR(opirr(p->as), p->reg, p->to.reg, v); + o1 |= ((mask[0]&31L)<<6)|((mask[1]&31L)<<1); + break; + + case 63: /* rlwmi b,s,$mask,a */ + maskgen(p, mask, regoff(&p->from3)); + o1 = AOP_RRR(opirr(p->as), p->reg, p->to.reg, p->from.reg); + o1 |= ((mask[0]&31L)<<6)|((mask[1]&31L)<<1); + break; + + case 64: /* mtfsf fr[, $m] {,fpcsr} */ + if(p->from3.type != D_NONE) + v = regoff(&p->from3)&255L; + else + v = 255; + o1 = OP_MTFSF | (v<<17) | (p->from.reg<<11); + break; + + case 65: /* MOVFL $imm,FPSCR(n) => mtfsfi crfd,imm */ + if(p->to.reg == NREG) + diag("must specify FPSCR(n)\n%P", p); + o1 = OP_MTFSFI | ((p->to.reg&15L)<<23) | ((regoff(&p->from)&31L)<<12); + break; + + case 66: /* mov spr,r1; mov r1,spr, also dcr */ + if(p->from.type == D_REG) { + r = p->from.reg; + v = p->to.offset; + if(p->to.type == D_DCR) + o1 = OPVCC(31,451,0,0); /* mtdcr */ + else + o1 = OPVCC(31,467,0,0); /* mtspr */ + } else { + r = p->to.reg; + v = p->from.offset; + if(p->from.type == D_DCR) + o1 = OPVCC(31,323,0,0); /* mfdcr */ + else + o1 = OPVCC(31,339,0,0); /* mfspr */ + } + o1 = AOP_RRR(o1, r, 0, 0) | ((v&0x1f)<<16) | (((v>>5)&0x1f)<<11); + break; + + case 67: /* mcrf crfD,crfS */ + if(p->from.type != D_CREG || p->from.reg == NREG || + p->to.type != D_CREG || p->to.reg == NREG) + diag("illegal CR field number\n%P", p); + o1 = AOP_RRR(OP_MCRF, ((p->to.reg&7L)<<2), ((p->from.reg&7)<<2), 0); + break; + + case 68: /* mfcr rD; mfocrf CRM,rD */ + if(p->from.type == D_CREG && p->from.reg != NREG){ + v = 1<<(7-(p->to.reg&7)); /* CR(n) */ + o1 = AOP_RRR(OP_MFCR, p->to.reg, 0, 0) | (1<<20) | (v<<12); /* new form, mfocrf */ + }else + o1 = AOP_RRR(OP_MFCR, p->to.reg, 0, 0); /* old form, whole register */ + break; + + case 69: /* mtcrf CRM,rS */ + if(p->from3.type != D_NONE) { + if(p->to.reg != NREG) + diag("can't use both mask and CR(n)\n%P", p); + v = regoff(&p->from3) & 0xff; + } else { + if(p->to.reg == NREG) + v = 0xff; /* CR */ + else + v = 1<<(7-(p->to.reg&7)); /* CR(n) */ + } + o1 = AOP_RRR(OP_MTCRF, p->from.reg, 0, 0) | (v<<12); + break; + + case 70: /* [f]cmp r,r,cr*/ + if(p->reg == NREG) + r = 0; + else + r = (p->reg&7)<<2; + o1 = AOP_RRR(oprrr(p->as), r, p->from.reg, p->to.reg); + break; + + case 71: /* cmp[l] r,i,cr*/ + if(p->reg == NREG) + r = 0; + else + r = (p->reg&7)<<2; + o1 = AOP_RRR(opirr(p->as), r, p->from.reg, 0) | (regoff(&p->to)&0xffff); + break; + + case 72: /* slbmte (Rb+Rs -> slb[Rb]) -> Rs, Rb */ + o1 = AOP_RRR(oprrr(p->as), p->from.reg, 0, p->to.reg); + break; + + case 73: /* mcrfs crfD,crfS */ + if(p->from.type != D_FPSCR || p->from.reg == NREG || + p->to.type != D_CREG || p->to.reg == NREG) + diag("illegal FPSCR/CR field number\n%P", p); + o1 = AOP_RRR(OP_MCRFS, ((p->to.reg&7L)<<2), ((p->from.reg&7)<<2), 0); + break; + + /* relocation operations */ + + case 74: + v = regoff(&p->to); + o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, v>>16); + o2 = AOP_IRR(opstore(p->as), p->from.reg, REGTMP, v); + if(dlm) + reloc(&p->to, p->pc, 1); + break; + + case 75: + v = regoff(&p->from); + o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, v>>16); + o2 = AOP_IRR(opload(p->as), p->to.reg, REGTMP, v); + if(dlm) + reloc(&p->from, p->pc, 1); + break; + + case 76: + v = regoff(&p->from); + o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, v>>16); + o2 = AOP_IRR(opload(p->as), p->to.reg, REGTMP, v); + o3 = LOP_RRR(OP_EXTSB, p->to.reg, p->to.reg, 0); + if(dlm) + reloc(&p->from, p->pc, 1); + break; + + } + if(aflag) + return o1; + v = p->pc; + switch(o->size) { + default: + if(debug['a']) + Bprint(&bso, " %.8lux:\t\t%P\n", v, p); + break; + case 4: + if(debug['a']) + Bprint(&bso, " %.8lux: %.8lux\t%P\n", v, o1, p); + lput(o1); + break; + case 8: + if(debug['a']) + Bprint(&bso, " %.8lux: %.8lux %.8lux%P\n", v, o1, o2, p); + lput(o1); + lput(o2); + break; + case 12: + if(debug['a']) + Bprint(&bso, " %.8lux: %.8lux %.8lux %.8lux%P\n", v, o1, o2, o3, p); + lput(o1); + lput(o2); + lput(o3); + break; + case 16: + if(debug['a']) + Bprint(&bso, " %.8lux: %.8lux %.8lux %.8lux %.8lux%P\n", + v, o1, o2, o3, o4, p); + lput(o1); + lput(o2); + lput(o3); + lput(o4); + break; + case 20: + if(debug['a']) + Bprint(&bso, " %.8lux: %.8lux %.8lux %.8lux %.8lux %.8lux%P\n", + v, o1, o2, o3, o4, o5, p); + lput(o1); + lput(o2); + lput(o3); + lput(o4); + lput(o5); + break; + } + return 0; +} + +long +oprrr(int a) +{ + switch(a) { + case AADD: return OPVCC(31,266,0,0); + case AADDCC: return OPVCC(31,266,0,1); + case AADDV: return OPVCC(31,266,1,0); + case AADDVCC: return OPVCC(31,266,1,1); + case AADDC: return OPVCC(31,10,0,0); + case AADDCCC: return OPVCC(31,10,0,1); + case AADDCV: return OPVCC(31,10,1,0); + case AADDCVCC: return OPVCC(31,10,1,1); + case AADDE: return OPVCC(31,138,0,0); + case AADDECC: return OPVCC(31,138,0,1); + case AADDEV: return OPVCC(31,138,1,0); + case AADDEVCC: return OPVCC(31,138,1,1); + case AADDME: return OPVCC(31,234,0,0); + case AADDMECC: return OPVCC(31,234,0,1); + case AADDMEV: return OPVCC(31,234,1,0); + case AADDMEVCC: return OPVCC(31,234,1,1); + case AADDZE: return OPVCC(31,202,0,0); + case AADDZECC: return OPVCC(31,202,0,1); + case AADDZEV: return OPVCC(31,202,1,0); + case AADDZEVCC: return OPVCC(31,202,1,1); + + case AAND: return OPVCC(31,28,0,0); + case AANDCC: return OPVCC(31,28,0,1); + case AANDN: return OPVCC(31,60,0,0); + case AANDNCC: return OPVCC(31,60,0,1); + + case ACMP: return OPVCC(31,0,0,0)|(1<<21); /* L=1 */ + case ACMPU: return OPVCC(31,32,0,0)|(1<<21); + case ACMPW: return OPVCC(31,0,0,0); /* L=0 */ + case ACMPWU: return OPVCC(31,32,0,0); + + case ACNTLZW: return OPVCC(31,26,0,0); + case ACNTLZWCC: return OPVCC(31,26,0,1); + case ACNTLZD: return OPVCC(31,58,0,0); + case ACNTLZDCC: return OPVCC(31,58,0,1); + + case ACRAND: return OPVCC(19,257,0,0); + case ACRANDN: return OPVCC(19,129,0,0); + case ACREQV: return OPVCC(19,289,0,0); + case ACRNAND: return OPVCC(19,225,0,0); + case ACRNOR: return OPVCC(19,33,0,0); + case ACROR: return OPVCC(19,449,0,0); + case ACRORN: return OPVCC(19,417,0,0); + case ACRXOR: return OPVCC(19,193,0,0); + + case ADCBF: return OPVCC(31,86,0,0); + case ADCBI: return OPVCC(31,470,0,0); + case ADCBST: return OPVCC(31,54,0,0); + case ADCBT: return OPVCC(31,278,0,0); + case ADCBTST: return OPVCC(31,246,0,0); + case ADCBZ: return OPVCC(31,1014,0,0); + + case AREM: + case ADIVW: return OPVCC(31,491,0,0); + case AREMCC: + case ADIVWCC: return OPVCC(31,491,0,1); + case AREMV: + case ADIVWV: return OPVCC(31,491,1,0); + case AREMVCC: + case ADIVWVCC: return OPVCC(31,491,1,1); + case AREMU: + case ADIVWU: return OPVCC(31,459,0,0); + case AREMUCC: + case ADIVWUCC: return OPVCC(31,459,0,1); + case AREMUV: + case ADIVWUV: return OPVCC(31,459,1,0); + case AREMUVCC: + case ADIVWUVCC: return OPVCC(31,459,1,1); + + case AREMD: + case ADIVD: return OPVCC(31,489,0,0); + case AREMDCC: + case ADIVDCC: return OPVCC(31,489,0,1); + case AREMDV: + case ADIVDV: return OPVCC(31,489,1,0); + case AREMDVCC: + case ADIVDVCC: return OPVCC(31,489,1,1); + case AREMDU: + case ADIVDU: return OPVCC(31,457,0,0); + case AREMDUCC: + case ADIVDUCC: return OPVCC(31,457,0,1); + case AREMDUV: + case ADIVDUV: return OPVCC(31,457,1,0); + case AREMDUVCC: + case ADIVDUVCC: return OPVCC(31,457,1,1); + + case AEIEIO: return OPVCC(31,854,0,0); + + case AEQV: return OPVCC(31,284,0,0); + case AEQVCC: return OPVCC(31,284,0,1); + + case AEXTSB: return OPVCC(31,954,0,0); + case AEXTSBCC: return OPVCC(31,954,0,1); + case AEXTSH: return OPVCC(31,922,0,0); + case AEXTSHCC: return OPVCC(31,922,0,1); + case AEXTSW: return OPVCC(31,986,0,0); + case AEXTSWCC: return OPVCC(31,986,0,1); + + case AFABS: return OPVCC(63,264,0,0); + case AFABSCC: return OPVCC(63,264,0,1); + case AFADD: return OPVCC(63,21,0,0); + case AFADDCC: return OPVCC(63,21,0,1); + case AFADDS: return OPVCC(59,21,0,0); + case AFADDSCC: return OPVCC(59,21,0,1); + case AFCMPO: return OPVCC(63,32,0,0); + case AFCMPU: return OPVCC(63,0,0,0); + case AFCFID: return OPVCC(63,846,0,0); + case AFCFIDCC: return OPVCC(63,846,0,1); + case AFCTIW: return OPVCC(63,14,0,0); + case AFCTIWCC: return OPVCC(63,14,0,1); + case AFCTIWZ: return OPVCC(63,15,0,0); + case AFCTIWZCC: return OPVCC(63,15,0,1); + case AFCTID: return OPVCC(63,814,0,0); + case AFCTIDCC: return OPVCC(63,814,0,1); + case AFCTIDZ: return OPVCC(63,815,0,0); + case AFCTIDZCC: return OPVCC(63,815,0,1); + case AFDIV: return OPVCC(63,18,0,0); + case AFDIVCC: return OPVCC(63,18,0,1); + case AFDIVS: return OPVCC(59,18,0,0); + case AFDIVSCC: return OPVCC(59,18,0,1); + case AFMADD: return OPVCC(63,29,0,0); + case AFMADDCC: return OPVCC(63,29,0,1); + case AFMADDS: return OPVCC(59,29,0,0); + case AFMADDSCC: return OPVCC(59,29,0,1); + case AFMOVS: + case AFMOVD: return OPVCC(63,72,0,0); /* load */ + case AFMOVDCC: return OPVCC(63,72,0,1); + case AFMSUB: return OPVCC(63,28,0,0); + case AFMSUBCC: return OPVCC(63,28,0,1); + case AFMSUBS: return OPVCC(59,28,0,0); + case AFMSUBSCC: return OPVCC(59,28,0,1); + case AFMUL: return OPVCC(63,25,0,0); + case AFMULCC: return OPVCC(63,25,0,1); + case AFMULS: return OPVCC(59,25,0,0); + case AFMULSCC: return OPVCC(59,25,0,1); + case AFNABS: return OPVCC(63,136,0,0); + case AFNABSCC: return OPVCC(63,136,0,1); + case AFNEG: return OPVCC(63,40,0,0); + case AFNEGCC: return OPVCC(63,40,0,1); + case AFNMADD: return OPVCC(63,31,0,0); + case AFNMADDCC: return OPVCC(63,31,0,1); + case AFNMADDS: return OPVCC(59,31,0,0); + case AFNMADDSCC: return OPVCC(59,31,0,1); + case AFNMSUB: return OPVCC(63,30,0,0); + case AFNMSUBCC: return OPVCC(63,30,0,1); + case AFNMSUBS: return OPVCC(59,30,0,0); + case AFNMSUBSCC: return OPVCC(59,30,0,1); + case AFRES: return OPVCC(59,24,0,0); + case AFRESCC: return OPVCC(59,24,0,1); + case AFRSP: return OPVCC(63,12,0,0); + case AFRSPCC: return OPVCC(63,12,0,1); + case AFRSQRTE: return OPVCC(63,26,0,0); + case AFRSQRTECC: return OPVCC(63,26,0,1); + case AFSEL: return OPVCC(63,23,0,0); + case AFSELCC: return OPVCC(63,23,0,1); + case AFSQRT: return OPVCC(63,22,0,0); + case AFSQRTCC: return OPVCC(63,22,0,1); + case AFSQRTS: return OPVCC(59,22,0,0); + case AFSQRTSCC: return OPVCC(59,22,0,1); + case AFSUB: return OPVCC(63,20,0,0); + case AFSUBCC: return OPVCC(63,20,0,1); + case AFSUBS: return OPVCC(59,20,0,0); + case AFSUBSCC: return OPVCC(59,20,0,1); + + case AICBI: return OPVCC(31,982,0,0); + case AISYNC: return OPVCC(19,150,0,0); + + case AMTFSB0: return OPVCC(63,70,0,0); + case AMTFSB0CC: return OPVCC(63,70,0,1); + case AMTFSB1: return OPVCC(63,38,0,0); + case AMTFSB1CC: return OPVCC(63,38,0,1); + + case AMULHW: return OPVCC(31,75,0,0); + case AMULHWCC: return OPVCC(31,75,0,1); + case AMULHWU: return OPVCC(31,11,0,0); + case AMULHWUCC: return OPVCC(31,11,0,1); + case AMULLW: return OPVCC(31,235,0,0); + case AMULLWCC: return OPVCC(31,235,0,1); + case AMULLWV: return OPVCC(31,235,1,0); + case AMULLWVCC: return OPVCC(31,235,1,1); + + case AMULHD: return OPVCC(31,73,0,0); + case AMULHDCC: return OPVCC(31,73,0,1); + case AMULHDU: return OPVCC(31,9,0,0); + case AMULHDUCC: return OPVCC(31,9,0,1); + case AMULLD: return OPVCC(31,233,0,0); + case AMULLDCC: return OPVCC(31,233,0,1); + case AMULLDV: return OPVCC(31,233,1,0); + case AMULLDVCC: return OPVCC(31,233,1,1); + + case ANAND: return OPVCC(31,476,0,0); + case ANANDCC: return OPVCC(31,476,0,1); + case ANEG: return OPVCC(31,104,0,0); + case ANEGCC: return OPVCC(31,104,0,1); + case ANEGV: return OPVCC(31,104,1,0); + case ANEGVCC: return OPVCC(31,104,1,1); + case ANOR: return OPVCC(31,124,0,0); + case ANORCC: return OPVCC(31,124,0,1); + case AOR: return OPVCC(31,444,0,0); + case AORCC: return OPVCC(31,444,0,1); + case AORN: return OPVCC(31,412,0,0); + case AORNCC: return OPVCC(31,412,0,1); + + case ARFI: return OPVCC(19,50,0,0); + case ARFCI: return OPVCC(19,51,0,0); + case ARFID: return OPVCC(19,18,0,0); + case AHRFID: return OPVCC(19,274,0,0); + + case ARLWMI: return OPVCC(20,0,0,0); + case ARLWMICC: return OPVCC(20,0,0,1); + case ARLWNM: return OPVCC(23,0,0,0); + case ARLWNMCC: return OPVCC(23,0,0,1); + + case ARLDCL: return OPVCC(30,8,0,0); + case ARLDCR: return OPVCC(30,9,0,0); + + case ASYSCALL: return OPVCC(17,1,0,0); + + case ASLW: return OPVCC(31,24,0,0); + case ASLWCC: return OPVCC(31,24,0,1); + case ASLD: return OPVCC(31,27,0,0); + case ASLDCC: return OPVCC(31,27,0,1); + + case ASRAW: return OPVCC(31,792,0,0); + case ASRAWCC: return OPVCC(31,792,0,1); + case ASRAD: return OPVCC(31,794,0,0); + case ASRADCC: return OPVCC(31,794,0,1); + + case ASRW: return OPVCC(31,536,0,0); + case ASRWCC: return OPVCC(31,536,0,1); + case ASRD: return OPVCC(31,539,0,0); + case ASRDCC: return OPVCC(31,539,0,1); + + case ASUB: return OPVCC(31,40,0,0); + case ASUBCC: return OPVCC(31,40,0,1); + case ASUBV: return OPVCC(31,40,1,0); + case ASUBVCC: return OPVCC(31,40,1,1); + case ASUBC: return OPVCC(31,8,0,0); + case ASUBCCC: return OPVCC(31,8,0,1); + case ASUBCV: return OPVCC(31,8,1,0); + case ASUBCVCC: return OPVCC(31,8,1,1); + case ASUBE: return OPVCC(31,136,0,0); + case ASUBECC: return OPVCC(31,136,0,1); + case ASUBEV: return OPVCC(31,136,1,0); + case ASUBEVCC: return OPVCC(31,136,1,1); + case ASUBME: return OPVCC(31,232,0,0); + case ASUBMECC: return OPVCC(31,232,0,1); + case ASUBMEV: return OPVCC(31,232,1,0); + case ASUBMEVCC: return OPVCC(31,232,1,1); + case ASUBZE: return OPVCC(31,200,0,0); + case ASUBZECC: return OPVCC(31,200,0,1); + case ASUBZEV: return OPVCC(31,200,1,0); + case ASUBZEVCC: return OPVCC(31,200,1,1); + + case ASYNC: return OPVCC(31,598,0,0); + case APTESYNC: return OPVCC(31,598,0,0) | (2<<21); + + case ATLBIE: return OPVCC(31,306,0,0); + case ATLBIEL: return OPVCC(31,274,0,0); + case ATLBSYNC: return OPVCC(31,566,0,0); + case ASLBIA: return OPVCC(31,498,0,0); + case ASLBIE: return OPVCC(31,434,0,0); + case ASLBMFEE: return OPVCC(31,915,0,0); + case ASLBMFEV: return OPVCC(31,851,0,0); + case ASLBMTE: return OPVCC(31,402,0,0); + + case ATW: return OPVCC(31,4,0,0); + case ATD: return OPVCC(31,68,0,0); + + case AXOR: return OPVCC(31,316,0,0); + case AXORCC: return OPVCC(31,316,0,1); + } + diag("bad r/r opcode %A", a); + return 0; +} + +long +opirr(int a) +{ + switch(a) { + case AADD: return OPVCC(14,0,0,0); + case AADDC: return OPVCC(12,0,0,0); + case AADDCCC: return OPVCC(13,0,0,0); + case AADD+AEND: return OPVCC(15,0,0,0); /* ADDIS/CAU */ + + case AANDCC: return OPVCC(28,0,0,0); + case AANDCC+AEND: return OPVCC(29,0,0,0); /* ANDIS./ANDIU. */ + + case ABR: return OPVCC(18,0,0,0); + case ABL: return OPVCC(18,0,0,0) | 1; + case ABC: return OPVCC(16,0,0,0); + case ABCL: return OPVCC(16,0,0,0) | 1; + + case ABEQ: return AOP_RRR(16<<26,12,2,0); + case ABGE: return AOP_RRR(16<<26,4,0,0); + case ABGT: return AOP_RRR(16<<26,12,1,0); + case ABLE: return AOP_RRR(16<<26,4,1,0); + case ABLT: return AOP_RRR(16<<26,12,0,0); + case ABNE: return AOP_RRR(16<<26,4,2,0); + case ABVC: return AOP_RRR(16<<26,4,3,0); + case ABVS: return AOP_RRR(16<<26,12,3,0); + + case ACMP: return OPVCC(11,0,0,0)|(1<<21); /* L=1 */ + case ACMPU: return OPVCC(10,0,0,0)|(1<<21); + case ACMPW: return OPVCC(11,0,0,0); /* L=0 */ + case ACMPWU: return OPVCC(10,0,0,0); + case ALSW: return OPVCC(31,597,0,0); + + case AMULLW: return OPVCC(7,0,0,0); + + case AOR: return OPVCC(24,0,0,0); + case AOR+AEND: return OPVCC(25,0,0,0); /* ORIS/ORIU */ + + case ARLWMI: return OPVCC(20,0,0,0); /* rlwimi */ + case ARLWMICC: return OPVCC(20,0,0,1); + case ARLDMI: return OPVCC(30,0,0,0) | (3<<2); /* rldimi */ + case ARLDMICC: return OPVCC(30,0,0,1) | (3<<2); + + case ARLWNM: return OPVCC(21,0,0,0); /* rlwinm */ + case ARLWNMCC: return OPVCC(21,0,0,1); + + case ARLDCL: return OPVCC(30,0,0,0); /* rldicl */ + case ARLDCLCC: return OPVCC(30,0,0,1); + case ARLDCR: return OPVCC(30,1,0,0); /* rldicr */ + case ARLDCRCC: return OPVCC(30,1,0,1); + case ARLDC: return OPVCC(30,0,0,0) | (2<<2); + case ARLDCCC: return OPVCC(30,0,0,1) | (2<<2); + + case ASRAW: return OPVCC(31,824,0,0); + case ASRAWCC: return OPVCC(31,824,0,1); + case ASRAD: return OPVCC(31,(413<<1),0,0); + case ASRADCC: return OPVCC(31,(413<<1),0,1); + + case ASTSW: return OPVCC(31,725,0,0); + + case ASUBC: return OPVCC(8,0,0,0); + + case ATW: return OPVCC(3,0,0,0); + case ATD: return OPVCC(2,0,0,0); + + case AXOR: return OPVCC(26,0,0,0); /* XORIL */ + case AXOR+AEND: return OPVCC(27,0,0,0); /* XORIU */ + } + diag("bad opcode i/r %A", a); + return 0; +} + +/* + * load o(a),d + */ +long +opload(int a) +{ + switch(a) { + case AMOVD: return OPVCC(58,0,0,0); /* ld */ + case AMOVDU: return OPVCC(58,0,0,1); /* ldu */ + case AMOVWZ: return OPVCC(32,0,0,0); /* lwz */ + case AMOVWZU: return OPVCC(33,0,0,0); /* lwzu */ + case AMOVW: return OPVCC(58,0,0,0)|(1<<1); /* lwa */ + /* no AMOVWU */ + case AMOVB: + case AMOVBZ: return OPVCC(34,0,0,0); /* load */ + case AMOVBU: + case AMOVBZU: return OPVCC(35,0,0,0); + case AFMOVD: return OPVCC(50,0,0,0); + case AFMOVDU: return OPVCC(51,0,0,0); + case AFMOVS: return OPVCC(48,0,0,0); + case AFMOVSU: return OPVCC(49,0,0,0); + case AMOVH: return OPVCC(42,0,0,0); + case AMOVHU: return OPVCC(43,0,0,0); + case AMOVHZ: return OPVCC(40,0,0,0); + case AMOVHZU: return OPVCC(41,0,0,0); + case AMOVMW: return OPVCC(46,0,0,0); /* lmw */ + } + diag("bad load opcode %A", a); + return 0; +} + +/* + * indexed load a(b),d + */ +long +oploadx(int a) +{ + switch(a) { + case AMOVWZ: return OPVCC(31,23,0,0); /* lwzx */ + case AMOVWZU: return OPVCC(31,55,0,0); /* lwzux */ + case AMOVW: return OPVCC(31,341,0,0); /* lwax */ + case AMOVWU: return OPVCC(31,373,0,0); /* lwaux */ + case AMOVB: + case AMOVBZ: return OPVCC(31,87,0,0); /* lbzx */ + case AMOVBU: + case AMOVBZU: return OPVCC(31,119,0,0); /* lbzux */ + case AFMOVD: return OPVCC(31,599,0,0); /* lfdx */ + case AFMOVDU: return OPVCC(31,631,0,0); /* lfdux */ + case AFMOVS: return OPVCC(31,535,0,0); /* lfsx */ + case AFMOVSU: return OPVCC(31,567,0,0); /* lfsux */ + case AMOVH: return OPVCC(31,343,0,0); /* lhax */ + case AMOVHU: return OPVCC(31,375,0,0); /* lhaux */ + case AMOVHBR: return OPVCC(31,790,0,0); /* lhbrx */ + case AMOVWBR: return OPVCC(31,534,0,0); /* lwbrx */ + case AMOVHZ: return OPVCC(31,279,0,0); /* lhzx */ + case AMOVHZU: return OPVCC(31,311,0,0); /* lhzux */ + case AECIWX: return OPVCC(31,310,0,0); /* eciwx */ + case ALWAR: return OPVCC(31,20,0,0); /* lwarx */ + case ALSW: return OPVCC(31,533,0,0); /* lswx */ + case AMOVD: return OPVCC(31,21,0,0); /* ldx */ + case AMOVDU: return OPVCC(31,53,0,0); /* ldux */ + } + diag("bad loadx opcode %A", a); + return 0; +} + +/* + * store s,o(d) + */ +long +opstore(int a) +{ + switch(a) { + case AMOVB: + case AMOVBZ: return OPVCC(38,0,0,0); /* stb */ + case AMOVBU: + case AMOVBZU: return OPVCC(39,0,0,0); /* stbu */ + case AFMOVD: return OPVCC(54,0,0,0); /* stfd */ + case AFMOVDU: return OPVCC(55,0,0,0); /* stfdu */ + case AFMOVS: return OPVCC(52,0,0,0); /* stfs */ + case AFMOVSU: return OPVCC(53,0,0,0); /* stfsu */ + case AMOVHZ: + case AMOVH: return OPVCC(44,0,0,0); /* sth */ + case AMOVHZU: + case AMOVHU: return OPVCC(45,0,0,0); /* sthu */ + case AMOVMW: return OPVCC(47,0,0,0); /* stmw */ + case ASTSW: return OPVCC(31,725,0,0); /* stswi */ + case AMOVWZ: + case AMOVW: return OPVCC(36,0,0,0); /* stw */ + case AMOVWZU: + case AMOVWU: return OPVCC(37,0,0,0); /* stwu */ + case AMOVD: return OPVCC(62,0,0,0); /* std */ + case AMOVDU: return OPVCC(62,0,0,1); /* stdu */ + } + diag("unknown store opcode %A", a); + return 0; +} + +/* + * indexed store s,a(b) + */ +long +opstorex(int a) +{ + switch(a) { + case AMOVB: + case AMOVBZ: return OPVCC(31,215,0,0); /* stbx */ + case AMOVBU: + case AMOVBZU: return OPVCC(31,247,0,0); /* stbux */ + case AFMOVD: return OPVCC(31,727,0,0); /* stfdx */ + case AFMOVDU: return OPVCC(31,759,0,0); /* stfdux */ + case AFMOVS: return OPVCC(31,663,0,0); /* stfsx */ + case AFMOVSU: return OPVCC(31,695,0,0); /* stfsux */ + case AMOVHZ: + case AMOVH: return OPVCC(31,407,0,0); /* sthx */ + case AMOVHBR: return OPVCC(31,918,0,0); /* sthbrx */ + case AMOVHZU: + case AMOVHU: return OPVCC(31,439,0,0); /* sthux */ + case AMOVWZ: + case AMOVW: return OPVCC(31,151,0,0); /* stwx */ + case AMOVWZU: + case AMOVWU: return OPVCC(31,183,0,0); /* stwux */ + case ASTSW: return OPVCC(31,661,0,0); /* stswx */ + case AMOVWBR: return OPVCC(31,662,0,0); /* stwbrx */ + case ASTWCCC: return OPVCC(31,150,0,1); /* stwcx. */ + case ASTDCCC: return OPVCC(31,214,0,1); /* stwdx. */ + case AECOWX: return OPVCC(31,438,0,0); /* ecowx */ + case AMOVD: return OPVCC(31,149,0,0); /* stdx */ + case AMOVDU: return OPVCC(31,181,0,0); /* stdux */ + } + diag("unknown storex opcode %A", a); + return 0; +} diff --git a/src/liblink/list9.c b/src/liblink/list9.c new file mode 100644 index 000000000..f9de2bf11 --- /dev/null +++ b/src/liblink/list9.c @@ -0,0 +1,342 @@ +// cmd/9l/list.c from Vita Nuova. +// +// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. +// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) +// Portions Copyright © 1997-1999 Vita Nuova Limited +// Portions Copyright © 2000-2008 Vita Nuova Holdings Limited (www.vitanuova.com) +// Portions Copyright © 2004,2006 Bruce Ellis +// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) +// Revisions Copyright © 2000-2008 Lucent Technologies Inc. and others +// Portions Copyright © 2009 The Go Authors. All rights reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a copy +// of this software and associated documentation files (the "Software"), to deal +// in the Software without restriction, including without limitation the rights +// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +// copies of the Software, and to permit persons to whom the Software is +// furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +// THE SOFTWARE. + +// +build ignore + +#include "l.h" + +void +listinit(void) +{ + + fmtinstall('A', Aconv); + fmtinstall('D', Dconv); + fmtinstall('P', Pconv); + fmtinstall('S', Sconv); + fmtinstall('N', Nconv); + fmtinstall('R', Rconv); +} + +void +prasm(Prog *p) +{ + print("%P\n", p); +} + +int +Pconv(Fmt *fp) +{ + char str[STRINGSZ], *s; + Prog *p; + int a; + + p = va_arg(fp->args, Prog*); + curp = p; + a = p->as; + if(a == ADATA || a == AINIT || a == ADYNT) + sprint(str, "(%d) %A %D/%d,%D", p->line, a, &p->from, p->reg, &p->to); + else { + s = str; + if(p->mark & NOSCHED) + s += sprint(s, "*"); + if(p->reg == NREG && p->from3.type == D_NONE) + sprint(s, "(%d) %A %D,%D", p->line, a, &p->from, &p->to); + else + if(a != ATEXT && p->from.type == D_OREG) { + sprint(s, "(%d) %A %lld(R%d+R%d),%D", p->line, a, + p->from.offset, p->from.reg, p->reg, &p->to); + } else + if(p->to.type == D_OREG) { + sprint(s, "(%d) %A %D,%lld(R%d+R%d)", p->line, a, + &p->from, p->to.offset, p->to.reg, p->reg); + } else { + s += sprint(s, "(%d) %A %D", p->line, a, &p->from); + if(p->reg != NREG) + s += sprint(s, ",%c%d", p->from.type==D_FREG?'F':'R', p->reg); + if(p->from3.type != D_NONE) + s += sprint(s, ",%D", &p->from3); + sprint(s, ",%D", &p->to); + } + } + return fmtstrcpy(fp, str); +} + +int +Aconv(Fmt *fp) +{ + char *s; + int a; + + a = va_arg(fp->args, int); + s = "???"; + if(a >= AXXX && a < ALAST) + s = anames[a]; + return fmtstrcpy(fp, s); +} + +int +Dconv(Fmt *fp) +{ + char str[STRINGSZ]; + Adr *a; + long v; + + a = va_arg(fp->args, Adr*); + switch(a->type) { + + default: + sprint(str, "GOK-type(%d)", a->type); + break; + + case D_NONE: + str[0] = 0; + if(a->name != D_NONE || a->reg != NREG || a->sym != S) + sprint(str, "%N(R%d)(NONE)", a, a->reg); + break; + + case D_CONST: + case D_DCONST: + if(a->reg != NREG) + sprint(str, "$%N(R%d)", a, a->reg); + else + sprint(str, "$%N", a); + break; + + case D_OREG: + if(a->reg != NREG) + sprint(str, "%N(R%d)", a, a->reg); + else + sprint(str, "%N", a); + break; + + case D_REG: + sprint(str, "R%d", a->reg); + if(a->name != D_NONE || a->sym != S) + sprint(str, "%N(R%d)(REG)", a, a->reg); + break; + + case D_FREG: + sprint(str, "F%d", a->reg); + if(a->name != D_NONE || a->sym != S) + sprint(str, "%N(F%d)(REG)", a, a->reg); + break; + + case D_CREG: + if(a->reg == NREG) + strcpy(str, "CR"); + else + sprint(str, "CR%d", a->reg); + if(a->name != D_NONE || a->sym != S) + sprint(str, "%N(C%d)(REG)", a, a->reg); + break; + + case D_SPR: + if(a->name == D_NONE && a->sym == S) { + switch((ulong)a->offset) { + case D_XER: sprint(str, "XER"); break; + case D_LR: sprint(str, "LR"); break; + case D_CTR: sprint(str, "CTR"); break; + default: sprint(str, "SPR(%lld)", a->offset); break; + } + break; + } + sprint(str, "SPR-GOK(%d)", a->reg); + if(a->name != D_NONE || a->sym != S) + sprint(str, "%N(SPR-GOK%d)(REG)", a, a->reg); + break; + + case D_DCR: + if(a->name == D_NONE && a->sym == S) { + sprint(str, "DCR(%lld)", a->offset); + break; + } + sprint(str, "DCR-GOK(%d)", a->reg); + if(a->name != D_NONE || a->sym != S) + sprint(str, "%N(DCR-GOK%d)(REG)", a, a->reg); + break; + + case D_OPT: + sprint(str, "OPT(%d)", a->reg); + break; + + case D_FPSCR: + if(a->reg == NREG) + strcpy(str, "FPSCR"); + else + sprint(str, "FPSCR(%d)", a->reg); + break; + + case D_MSR: + sprint(str, "MSR"); + break; + + case D_BRANCH: + if(curp->cond != P) { + v = curp->cond->pc; + if(v >= INITTEXT) + v -= INITTEXT-HEADR; + if(a->sym != S) + sprint(str, "%s+%.5lux(BRANCH)", a->sym->name, v); + else + sprint(str, "%.5lux(BRANCH)", v); + } else + if(a->sym != S) + sprint(str, "%s+%lld(APC)", a->sym->name, a->offset); + else + sprint(str, "%lld(APC)", a->offset); + break; + + case D_FCONST: + sprint(str, "$%lux-%lux", a->ieee.h, a->ieee.l); + break; + + case D_SCONST: + sprint(str, "$\"%S\"", a->sval); + break; + } + return fmtstrcpy(fp, str); +} + +int +Nconv(Fmt *fp) +{ + char str[STRINGSZ]; + Adr *a; + Sym *s; + long l; + + a = va_arg(fp->args, Adr*); + s = a->sym; + if(s == S) { + l = a->offset; + if((vlong)l != a->offset) + sprint(str, "0x%llux", a->offset); + else + sprint(str, "%lld", a->offset); + goto out; + } + switch(a->name) { + default: + sprint(str, "GOK-name(%d)", a->name); + break; + + case D_EXTERN: + sprint(str, "%s+%lld(SB)", s->name, a->offset); + break; + + case D_STATIC: + sprint(str, "%s<>+%lld(SB)", s->name, a->offset); + break; + + case D_AUTO: + sprint(str, "%s-%lld(SP)", s->name, -a->offset); + break; + + case D_PARAM: + sprint(str, "%s+%lld(FP)", s->name, a->offset); + break; + } +out: + return fmtstrcpy(fp, str); +} + +int +Rconv(Fmt *fp) +{ + char *s; + int a; + + a = va_arg(fp->args, int); + s = "C_??"; + if(a >= C_NONE && a <= C_NCLASS) + s = cnames[a]; + return fmtstrcpy(fp, s); +} + +int +Sconv(Fmt *fp) +{ + int i, c; + char str[STRINGSZ], *p, *a; + + a = va_arg(fp->args, char*); + p = str; + for(i=0; i= 'a' && c <= 'z' || + c >= 'A' && c <= 'Z' || + c >= '0' && c <= '9' || + c == ' ' || c == '%') { + *p++ = c; + continue; + } + *p++ = '\\'; + switch(c) { + case 0: + *p++ = 'z'; + continue; + case '\\': + case '"': + *p++ = c; + continue; + case '\n': + *p++ = 'n'; + continue; + case '\t': + *p++ = 't'; + continue; + } + *p++ = (c>>6) + '0'; + *p++ = ((c>>3) & 7) + '0'; + *p++ = (c & 7) + '0'; + } + *p = 0; + return fmtstrcpy(fp, str); +} + +void +diag(char *fmt, ...) +{ + char buf[STRINGSZ], *tn; + va_list arg; + + tn = "??none??"; + if(curtext != P && curtext->from.sym != S) + tn = curtext->from.sym->name; + va_start(arg, fmt); + vseprint(buf, buf+sizeof(buf), fmt, arg); + va_end(arg); + print("%s: %s\n", tn, buf); + + nerrors++; + if(nerrors > 10) { + print("too many errors\n"); + errorexit(); + } +} diff --git a/src/liblink/obj9.c b/src/liblink/obj9.c new file mode 100644 index 000000000..cf073ec36 --- /dev/null +++ b/src/liblink/obj9.c @@ -0,0 +1,2233 @@ +// cmd/9l/noop.c, cmd/9l/pass.c, cmd/9l/span.c from Vita Nuova. +// +// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. +// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) +// Portions Copyright © 1997-1999 Vita Nuova Limited +// Portions Copyright © 2000-2008 Vita Nuova Holdings Limited (www.vitanuova.com) +// Portions Copyright © 2004,2006 Bruce Ellis +// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) +// Revisions Copyright © 2000-2008 Lucent Technologies Inc. and others +// Portions Copyright © 2009 The Go Authors. All rights reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a copy +// of this software and associated documentation files (the "Software"), to deal +// in the Software without restriction, including without limitation the rights +// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +// copies of the Software, and to permit persons to whom the Software is +// furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +// THE SOFTWARE. + +// +build ignore + +#include "l.h" + +void +noops(void) +{ + Prog *p, *p1, *q, *q1; + int o, mov, aoffset, curframe, curbecome, maxbecome; + + /* + * find leaf subroutines + * become sizes + * frame sizes + * strip NOPs + * expand RET + * expand BECOME pseudo + */ + + if(debug['v']) + Bprint(&bso, "%5.2f noops\n", cputime()); + Bflush(&bso); + + curframe = 0; + curbecome = 0; + maxbecome = 0; + curtext = 0; + q = P; + for(p = firstp; p != P; p = p->link) { + + /* find out how much arg space is used in this TEXT */ + if(p->to.type == D_OREG && p->to.reg == REGSP) + if(p->to.offset > curframe) + curframe = p->to.offset; + + switch(p->as) { + /* too hard, just leave alone */ + case ATEXT: + if(curtext && curtext->from.sym) { + curtext->from.sym->frame = curframe; + curtext->from.sym->become = curbecome; + if(curbecome > maxbecome) + maxbecome = curbecome; + } + curframe = 0; + curbecome = 0; + + q = p; + p->mark |= LABEL|LEAF|SYNC; + if(p->link) + p->link->mark |= LABEL; + curtext = p; + break; + + case ANOR: + q = p; + if(p->to.type == D_REG) + if(p->to.reg == REGZERO) + p->mark |= LABEL|SYNC; + break; + + case ALWAR: + case ASTWCCC: + case AECIWX: + case AECOWX: + case AEIEIO: + case AICBI: + case AISYNC: + case ATLBIE: + case ATLBIEL: + case ASLBIA: + case ASLBIE: + case ASLBMFEE: + case ASLBMFEV: + case ASLBMTE: + case ADCBF: + case ADCBI: + case ADCBST: + case ADCBT: + case ADCBTST: + case ADCBZ: + case ASYNC: + case ATLBSYNC: + case APTESYNC: + case ATW: + case AWORD: + case ARFI: + case ARFCI: + case ARFID: + case AHRFID: + q = p; + p->mark |= LABEL|SYNC; + continue; + + case AMOVW: + case AMOVWZ: + case AMOVD: + q = p; + switch(p->from.type) { + case D_MSR: + case D_SPR: + case D_FPSCR: + case D_CREG: + case D_DCR: + p->mark |= LABEL|SYNC; + } + switch(p->to.type) { + case D_MSR: + case D_SPR: + case D_FPSCR: + case D_CREG: + case D_DCR: + p->mark |= LABEL|SYNC; + } + continue; + + case AFABS: + case AFABSCC: + case AFADD: + case AFADDCC: + case AFCTIW: + case AFCTIWCC: + case AFCTIWZ: + case AFCTIWZCC: + case AFDIV: + case AFDIVCC: + case AFMADD: + case AFMADDCC: + case AFMOVD: + case AFMOVDU: + /* case AFMOVDS: */ + case AFMOVS: + case AFMOVSU: + /* case AFMOVSD: */ + case AFMSUB: + case AFMSUBCC: + case AFMUL: + case AFMULCC: + case AFNABS: + case AFNABSCC: + case AFNEG: + case AFNEGCC: + case AFNMADD: + case AFNMADDCC: + case AFNMSUB: + case AFNMSUBCC: + case AFRSP: + case AFRSPCC: + case AFSUB: + case AFSUBCC: + q = p; + p->mark |= FLOAT; + continue; + + case ABL: + case ABCL: + if(curtext != P) + curtext->mark &= ~LEAF; + + case ABC: + case ABEQ: + case ABGE: + case ABGT: + case ABLE: + case ABLT: + case ABNE: + case ABR: + case ABVC: + case ABVS: + + p->mark |= BRANCH; + q = p; + q1 = p->cond; + if(q1 != P) { + while(q1->as == ANOP) { + q1 = q1->link; + p->cond = q1; + } + if(!(q1->mark & LEAF)) + q1->mark |= LABEL; + } else + p->mark |= LABEL; + q1 = p->link; + if(q1 != P) + q1->mark |= LABEL; + continue; + + case AFCMPO: + case AFCMPU: + q = p; + p->mark |= FCMP|FLOAT; + continue; + + case ARETURN: + /* special form of RETURN is BECOME */ + if(p->from.type == D_CONST) + if(p->from.offset > curbecome) + curbecome = p->from.offset; + + q = p; + if(p->link != P) + p->link->mark |= LABEL; + continue; + + case ANOP: + q1 = p->link; + q->link = q1; /* q is non-nop */ + q1->mark |= p->mark; + continue; + + default: + q = p; + continue; + } + } + if(curtext && curtext->from.sym) { + curtext->from.sym->frame = curframe; + curtext->from.sym->become = curbecome; + if(curbecome > maxbecome) + maxbecome = curbecome; + } + + if(debug['b']) + print("max become = %d\n", maxbecome); + xdefine("ALEFbecome", STEXT, maxbecome); + + curtext = 0; + for(p = firstp; p != P; p = p->link) { + switch(p->as) { + case ATEXT: + curtext = p; + break; + + case ABL: /* ABCL? */ + if(curtext != P && curtext->from.sym != S && curtext->to.offset >= 0) { + o = maxbecome - curtext->from.sym->frame; + if(o <= 0) + break; + /* calling a become or calling a variable */ + if(p->to.sym == S || p->to.sym->become) { + curtext->to.offset += o; + if(debug['b']) { + curp = p; + print("%D calling %D increase %d\n", + &curtext->from, &p->to, o); + } + } + } + break; + } + } + + curtext = P; + for(p = firstp; p != P; p = p->link) { + o = p->as; + switch(o) { + case ATEXT: + mov = AMOVD; + aoffset = 0; + curtext = p; + autosize = p->to.offset + 8; + if((p->mark & LEAF) && autosize <= 8) + autosize = 0; + else + if(autosize & 4) + autosize += 4; + p->to.offset = autosize - 8; + + q = p; + if(autosize) { + /* use MOVDU to adjust R1 when saving R31, if autosize is small */ + if(!(curtext->mark & LEAF) && autosize >= -BIG && autosize <= BIG) { + mov = AMOVDU; + aoffset = -autosize; + } else { + q = prg(); + q->as = AADD; + q->line = p->line; + q->from.type = D_CONST; + q->from.offset = -autosize; + q->to.type = D_REG; + q->to.reg = REGSP; + + q->link = p->link; + p->link = q; + } + } else + if(!(curtext->mark & LEAF)) { + if(debug['v']) + Bprint(&bso, "save suppressed in: %s\n", + curtext->from.sym->name); + curtext->mark |= LEAF; + } + + if(curtext->mark & LEAF) { + if(curtext->from.sym) + curtext->from.sym->type = SLEAF; + break; + } + + q1 = prg(); + q1->as = mov; + q1->line = p->line; + q1->from.type = D_REG; + q1->from.reg = REGTMP; + q1->to.type = D_OREG; + q1->to.offset = aoffset; + q1->to.reg = REGSP; + + q1->link = q->link; + q->link = q1; + + q1 = prg(); + q1->as = AMOVD; + q1->line = p->line; + q1->from.type = D_SPR; + q1->from.offset = D_LR; + q1->to.type = D_REG; + q1->to.reg = REGTMP; + + q1->link = q->link; + q->link = q1; + break; + + case ARETURN: + if(p->from.type == D_CONST) + goto become; + if(curtext->mark & LEAF) { + if(!autosize) { + p->as = ABR; + p->from = zprg.from; + p->to.type = D_SPR; + p->to.offset = D_LR; + p->mark |= BRANCH; + break; + } + + p->as = AADD; + p->from.type = D_CONST; + p->from.offset = autosize; + p->to.type = D_REG; + p->to.reg = REGSP; + + q = prg(); + q->as = ABR; + q->line = p->line; + q->to.type = D_SPR; + q->to.offset = D_LR; + q->mark |= BRANCH; + + q->link = p->link; + p->link = q; + break; + } + + p->as = AMOVD; + p->from.type = D_OREG; + p->from.offset = 0; + p->from.reg = REGSP; + p->to.type = D_REG; + p->to.reg = REGTMP; + + q = prg(); + q->as = AMOVD; + q->line = p->line; + q->from.type = D_REG; + q->from.reg = REGTMP; + q->to.type = D_SPR; + q->to.offset = D_LR; + + q->link = p->link; + p->link = q; + p = q; + + if(autosize) { + q = prg(); + q->as = AADD; + q->line = p->line; + q->from.type = D_CONST; + q->from.offset = autosize; + q->to.type = D_REG; + q->to.reg = REGSP; + + q->link = p->link; + p->link = q; + } + + q1 = prg(); + q1->as = ABR; + q1->line = p->line; + q1->to.type = D_SPR; + q1->to.offset = D_LR; + q1->mark |= BRANCH; + + q1->link = q->link; + q->link = q1; + break; + + become: + if(curtext->mark & LEAF) { + + q = prg(); + q->line = p->line; + q->as = ABR; + q->from = zprg.from; + q->to = p->to; + q->cond = p->cond; + q->link = p->link; + q->mark |= BRANCH; + p->link = q; + + p->as = AADD; + p->from = zprg.from; + p->from.type = D_CONST; + p->from.offset = autosize; + p->to = zprg.to; + p->to.type = D_REG; + p->to.reg = REGSP; + + break; + } + q = prg(); + q->line = p->line; + q->as = ABR; + q->from = zprg.from; + q->to = p->to; + q->cond = p->cond; + q->mark |= BRANCH; + q->link = p->link; + p->link = q; + + q = prg(); + q->line = p->line; + q->as = AADD; + q->from.type = D_CONST; + q->from.offset = autosize; + q->to.type = D_REG; + q->to.reg = REGSP; + q->link = p->link; + p->link = q; + + q = prg(); + q->line = p->line; + q->as = AMOVD; + q->line = p->line; + q->from.type = D_REG; + q->from.reg = REGTMP; + q->to.type = D_SPR; + q->to.offset = D_LR; + q->link = p->link; + p->link = q; + + p->as = AMOVD; + p->from = zprg.from; + p->from.type = D_OREG; + p->from.offset = 0; + p->from.reg = REGSP; + p->to = zprg.to; + p->to.type = D_REG; + p->to.reg = REGTMP; + + break; + } + } + + if(debug['Q'] == 0) + return; + + curtext = P; + q = P; /* p - 1 */ + q1 = firstp; /* top of block */ + o = 0; /* count of instructions */ + for(p = firstp; p != P; p = p1) { + p1 = p->link; + o++; + if(p->mark & NOSCHED){ + if(q1 != p){ + sched(q1, q); + } + for(; p != P; p = p->link){ + if(!(p->mark & NOSCHED)) + break; + q = p; + } + p1 = p; + q1 = p; + o = 0; + continue; + } + if(p->mark & (LABEL|SYNC)) { + if(q1 != p) + sched(q1, q); + q1 = p; + o = 1; + } + if(p->mark & (BRANCH|SYNC)) { + sched(q1, p); + q1 = p1; + o = 0; + } + if(o >= NSCHED) { + sched(q1, p); + q1 = p1; + o = 0; + } + q = p; + } +} + +void +addnop(Prog *p) +{ + Prog *q; + + q = prg(); + q->as = AOR; + q->line = p->line; + q->from.type = D_REG; + q->from.reg = REGZERO; + q->to.type = D_REG; + q->to.reg = REGZERO; + + q->link = p->link; + p->link = q; +} + +#include "l.h" + +void +dodata(void) +{ + int i, t; + Sym *s; + Prog *p, *p1; + vlong orig, orig1, v; + + if(debug['v']) + Bprint(&bso, "%5.2f dodata\n", cputime()); + Bflush(&bso); + for(p = datap; p != P; p = p->link) { + s = p->from.sym; + if(p->as == ADYNT || p->as == AINIT) + s->value = dtype; + if(s->type == SBSS) + s->type = SDATA; + if(s->type != SDATA) + diag("initialize non-data (%d): %s\n%P", + s->type, s->name, p); + v = p->from.offset + p->reg; + if(v > s->value) + diag("initialize bounds (%lld): %s\n%P", + s->value, s->name, p); + } + + /* + * pass 1 + * assign 'small' variables to data segment + * (rational is that data segment is more easily + * addressed through offset on REGSB) + */ + orig = 0; + for(i=0; ilink) { + t = s->type; + if(t != SDATA && t != SBSS) + continue; + v = s->value; + if(v == 0) { + diag("%s: no size", s->name); + v = 1; + } + v = rnd(v, 4); + s->value = v; + if(v > MINSIZ) + continue; + if(v >= 8) + orig = rnd(orig, 8); + s->value = orig; + orig += v; + s->type = SDATA1; + } + orig1 = orig; + + /* + * pass 2 + * assign 'data' variables to data segment + */ + for(i=0; ilink) { + t = s->type; + if(t != SDATA) { + if(t == SDATA1) + s->type = SDATA; + continue; + } + v = s->value; + if(v >= 8) + orig = rnd(orig, 8); + s->value = orig; + orig += v; + s->type = SDATA1; + } + + if(orig) + orig = rnd(orig, 8); + datsize = orig; + + /* + * pass 3 + * everything else to bss segment + */ + for(i=0; ilink) { + if(s->type != SBSS) + continue; + v = s->value; + if(v >= 8) + orig = rnd(orig, 8); + s->value = orig; + orig += v; + } + if(orig) + orig = rnd(orig, 8); + bsssize = orig-datsize; + + /* + * pass 4 + * add literals to all large values. + * at this time: + * small data is allocated DATA + * large data is allocated DATA1 + * large bss is allocated BSS + * the new literals are loaded between + * small data and large data. + */ + orig = 0; + for(p = firstp; p != P; p = p->link) { + if(p->as != AMOVW) + continue; + if(p->from.type != D_CONST) + continue; + if(s = p->from.sym) { + t = s->type; + if(t != SDATA && t != SDATA1 && t != SBSS) + continue; + t = p->from.name; + if(t != D_EXTERN && t != D_STATIC) + continue; + v = s->value + p->from.offset; + if(v >= 0 && v <= 0xffff) + continue; + if(!strcmp(s->name, "setSB")) + continue; + /* size should be 19 max */ + if(strlen(s->name) >= 10) /* has loader address */ + sprint(literal, "$%p.%llux", s, p->from.offset); + else + sprint(literal, "$%s.%d.%llux", s->name, s->version, p->from.offset); + } else { + if(p->from.name != D_NONE) + continue; + if(p->from.reg != NREG) + continue; + v = p->from.offset; + if(v >= -0x7fff-1 && v <= 0x7fff) + continue; + if(!(v & 0xffff)) + continue; + if(v) + continue; /* quicker to build it than load it */ + /* size should be 9 max */ + sprint(literal, "$%llux", v); + } + s = lookup(literal, 0); + if(s->type == 0) { + s->type = SDATA; + s->value = orig1+orig; + orig += 4; + p1 = prg(); + p1->as = ADATA; + p1->line = p->line; + p1->from.type = D_OREG; + p1->from.sym = s; + p1->from.name = D_EXTERN; + p1->reg = 4; + p1->to = p->from; + p1->link = datap; + datap = p1; + } + if(s->type != SDATA) + diag("literal not data: %s", s->name); + p->from.type = D_OREG; + p->from.sym = s; + p->from.name = D_EXTERN; + p->from.offset = 0; + continue; + } + while(orig & 7) + orig++; + /* + * pass 5 + * re-adjust offsets + */ + for(i=0; ilink) { + t = s->type; + if(t == SBSS) { + s->value += orig; + continue; + } + if(t == SDATA1) { + s->type = SDATA; + s->value += orig; + continue; + } + } + datsize += orig; + xdefine("setSB", SDATA, 0+BIG); + xdefine("bdata", SDATA, 0); + xdefine("edata", SDATA, datsize); + xdefine("end", SBSS, datsize+bsssize); + xdefine("etext", STEXT, 0); +} + +void +undef(void) +{ + int i; + Sym *s; + + for(i=0; ilink) + if(s->type == SXREF) + diag("%s: not defined", s->name); +} + +int +relinv(int a) +{ + + switch(a) { + case ABEQ: return ABNE; + case ABNE: return ABEQ; + + case ABGE: return ABLT; + case ABLT: return ABGE; + + case ABGT: return ABLE; + case ABLE: return ABGT; + + case ABVC: return ABVS; + case ABVS: return ABVC; + } + return 0; +} + +void +follow(void) +{ + + if(debug['v']) + Bprint(&bso, "%5.2f follow\n", cputime()); + Bflush(&bso); + + firstp = prg(); + lastp = firstp; + + xfol(textp); + + firstp = firstp->link; + lastp->link = P; +} + +void +xfol(Prog *p) +{ + Prog *q, *r; + int a, b, i; + +loop: + if(p == P) + return; + a = p->as; + if(a == ATEXT) + curtext = p; + if(a == ABR) { + q = p->cond; + if((p->mark&NOSCHED) || q && (q->mark&NOSCHED)){ + p->mark |= FOLL; + lastp->link = p; + lastp = p; + p = p->link; + xfol(p); + p = q; + if(p && !(p->mark & FOLL)) + goto loop; + return; + } + if(q != P) { + p->mark |= FOLL; + p = q; + if(!(p->mark & FOLL)) + goto loop; + } + } + if(p->mark & FOLL) { + for(i=0,q=p; i<4; i++,q=q->link) { + if(q == lastp || (q->mark&NOSCHED)) + break; + b = 0; /* set */ + a = q->as; + if(a == ANOP) { + i--; + continue; + } + if(a == ABR || a == ARETURN || a == ARFI || a == ARFCI || a == ARFID || a == AHRFID) + goto copy; + if(!q->cond || (q->cond->mark&FOLL)) + continue; + b = relinv(a); + if(!b) + continue; + copy: + for(;;) { + r = prg(); + *r = *p; + if(!(r->mark&FOLL)) + print("cant happen 1\n"); + r->mark |= FOLL; + if(p != q) { + p = p->link; + lastp->link = r; + lastp = r; + continue; + } + lastp->link = r; + lastp = r; + if(a == ABR || a == ARETURN || a == ARFI || a == ARFCI || a == ARFID || a == AHRFID) + return; + r->as = b; + r->cond = p->link; + r->link = p->cond; + if(!(r->link->mark&FOLL)) + xfol(r->link); + if(!(r->cond->mark&FOLL)) + print("cant happen 2\n"); + return; + } + } + + a = ABR; + q = prg(); + q->as = a; + q->line = p->line; + q->to.type = D_BRANCH; + q->to.offset = p->pc; + q->cond = p; + p = q; + } + p->mark |= FOLL; + lastp->link = p; + lastp = p; + if(a == ABR || a == ARETURN || a == ARFI || a == ARFCI || a == ARFID || a == AHRFID){ + if(p->mark & NOSCHED){ + p = p->link; + goto loop; + } + return; + } + if(p->cond != P) + if(a != ABL && p->link != P) { + xfol(p->link); + p = p->cond; + if(p == P || (p->mark&FOLL)) + return; + goto loop; + } + p = p->link; + goto loop; +} + +void +patch(void) +{ + long c; + Prog *p, *q; + Sym *s; + int a; + vlong vexit; + + if(debug['v']) + Bprint(&bso, "%5.2f patch\n", cputime()); + Bflush(&bso); + mkfwd(); + s = lookup("exit", 0); + vexit = s->value; + for(p = firstp; p != P; p = p->link) { + a = p->as; + if(a == ATEXT) + curtext = p; + if((a == ABL || a == ARETURN) && p->to.sym != S) { + s = p->to.sym; + if(s->type != STEXT && s->type != SUNDEF) { + diag("undefined: %s\n%P", s->name, p); + s->type = STEXT; + s->value = vexit; + } + if(s->type == SUNDEF){ + p->to.offset = 0; + p->cond = UP; + } + else + p->to.offset = s->value; + p->to.type = D_BRANCH; + } + if(p->to.type != D_BRANCH || p->cond == UP) + continue; + c = p->to.offset; + for(q = firstp; q != P;) { + if(q->forwd != P) + if(c >= q->forwd->pc) { + q = q->forwd; + continue; + } + if(c == q->pc) + break; + q = q->link; + } + if(q == P) { + diag("branch out of range %ld\n%P", c, p); + p->to.type = D_NONE; + } + p->cond = q; + } + + for(p = firstp; p != P; p = p->link) { + if(p->as == ATEXT) + curtext = p; + p->mark = 0; /* initialization for follow */ + if(p->cond != P && p->cond != UP) { + p->cond = brloop(p->cond); + if(p->cond != P) + if(p->to.type == D_BRANCH) + p->to.offset = p->cond->pc; + } + } +} + +#define LOG 5 +void +mkfwd(void) +{ + Prog *p; + long dwn[LOG], cnt[LOG], i; + Prog *lst[LOG]; + + for(i=0; ilink) { + if(p->as == ATEXT) + curtext = p; + i--; + if(i < 0) + i = LOG-1; + p->forwd = P; + dwn[i]--; + if(dwn[i] <= 0) { + dwn[i] = cnt[i]; + if(lst[i] != P) + lst[i]->forwd = p; + lst[i] = p; + } + } +} + +Prog* +brloop(Prog *p) +{ + Prog *q; + int c; + + for(c=0; p!=P;) { + if(p->as != ABR || (p->mark&NOSCHED)) + return p; + q = p->cond; + if(q <= p) { + c++; + if(q == p || c > 5000) + break; + } + p = q; + } + return P; +} + +vlong +atolwhex(char *s) +{ + vlong n; + int f; + + n = 0; + f = 0; + while(*s == ' ' || *s == '\t') + s++; + if(*s == '-' || *s == '+') { + if(*s++ == '-') + f = 1; + while(*s == ' ' || *s == '\t') + s++; + } + if(s[0]=='0' && s[1]){ + if(s[1]=='x' || s[1]=='X'){ + s += 2; + for(;;){ + if(*s >= '0' && *s <= '9') + n = n*16 + *s++ - '0'; + else if(*s >= 'a' && *s <= 'f') + n = n*16 + *s++ - 'a' + 10; + else if(*s >= 'A' && *s <= 'F') + n = n*16 + *s++ - 'A' + 10; + else + break; + } + } else + while(*s >= '0' && *s <= '7') + n = n*8 + *s++ - '0'; + } else + while(*s >= '0' && *s <= '9') + n = n*10 + *s++ - '0'; + if(f) + n = -n; + return n; +} + +vlong +rnd(vlong v, long r) +{ + vlong c; + + if(r <= 0) + return v; + v += r - 1; + c = v % r; + if(c < 0) + c += r; + v -= c; + return v; +} + +void +import(void) +{ + int i; + Sym *s; + + for(i = 0; i < NHASH; i++) + for(s = hash[i]; s != S; s = s->link) + if(s->sig != 0 && s->type == SXREF && (nimports == 0 || s->subtype == SIMPORT)){ + undefsym(s); + Bprint(&bso, "IMPORT: %s sig=%lux v=%lld\n", s->name, s->sig, s->value); + if(debug['S']) + s->sig = 0; + } +} + +void +ckoff(Sym *s, vlong v) +{ + if(v < 0 || v >= 1<name); +} + +static Prog* +newdata(Sym *s, int o, int w, int t) +{ + Prog *p; + + p = prg(); + p->link = datap; + datap = p; + p->as = ADATA; + p->reg = w; + p->from.type = D_OREG; + p->from.name = t; + p->from.sym = s; + p->from.offset = o; + p->to.type = D_CONST; + p->to.name = D_NONE; + return p; +} + +void +export(void) +{ + int i, j, n, off, nb, sv, ne; + Sym *s, *et, *str, **esyms; + Prog *p; + char buf[NSNAME], *t; + + n = 0; + for(i = 0; i < NHASH; i++) + for(s = hash[i]; s != S; s = s->link) + if(s->type != SXREF && s->type != SUNDEF && (nexports == 0 && s->sig != 0 || s->subtype == SEXPORT || allexport)) + n++; + esyms = malloc(n*sizeof(Sym*)); + ne = n; + n = 0; + for(i = 0; i < NHASH; i++) + for(s = hash[i]; s != S; s = s->link) + if(s->type != SXREF && s->type != SUNDEF && (nexports == 0 && s->sig != 0 || s->subtype == SEXPORT || allexport)) + esyms[n++] = s; + for(i = 0; i < ne-1; i++) + for(j = i+1; j < ne; j++) + if(strcmp(esyms[i]->name, esyms[j]->name) > 0){ + s = esyms[i]; + esyms[i] = esyms[j]; + esyms[j] = s; + } + + nb = 0; + off = 0; + et = lookup(EXPTAB, 0); + if(et->type != 0 && et->type != SXREF) + diag("%s already defined", EXPTAB); + et->type = SDATA; + str = lookup(".string", 0); + if(str->type == 0) + str->type = SDATA; + sv = str->value; + for(i = 0; i < ne; i++){ + s = esyms[i]; + Bprint(&bso, "EXPORT: %s sig=%lux t=%d\n", s->name, s->sig, s->type); + + /* signature */ + p = newdata(et, off, sizeof(long), D_EXTERN); + off += sizeof(long); + p->to.offset = s->sig; + + /* address */ + p = newdata(et, off, sizeof(long), D_EXTERN); + off += sizeof(long); /* TO DO: bug */ + p->to.name = D_EXTERN; + p->to.sym = s; + + /* string */ + t = s->name; + n = strlen(t)+1; + for(;;){ + buf[nb++] = *t; + sv++; + if(nb >= NSNAME){ + p = newdata(str, sv-NSNAME, NSNAME, D_STATIC); + p->to.type = D_SCONST; + memmove(p->to.sval, buf, NSNAME); + nb = 0; + } + if(*t++ == 0) + break; + } + + /* name */ + p = newdata(et, off, sizeof(long), D_EXTERN); + off += sizeof(long); + p->to.name = D_STATIC; + p->to.sym = str; + p->to.offset = sv-n; + } + + if(nb > 0){ + p = newdata(str, sv-nb, nb, D_STATIC); + p->to.type = D_SCONST; + memmove(p->to.sval, buf, nb); + } + + for(i = 0; i < 3; i++){ + newdata(et, off, sizeof(long), D_EXTERN); + off += sizeof(long); + } + et->value = off; + if(sv == 0) + sv = 1; + str->value = sv; + exports = ne; + free(esyms); +} + +#include "l.h" + +void +span(void) +{ + Prog *p, *q; + Sym *setext; + Optab *o; + int m, bflag; + vlong c, otxt; + + if(debug['v']) + Bprint(&bso, "%5.2f span\n", cputime()); + Bflush(&bso); + + bflag = 0; + c = INITTEXT; + otxt = c; + for(p = firstp; p != P; p = p->link) { + p->pc = c; + o = oplook(p); + m = o->size; + if(m == 0) { + if(p->as == ATEXT) { + curtext = p; + autosize = p->to.offset + 8; + if(p->from3.type == D_CONST) { + if(p->from3.offset & 3) + diag("illegal origin\n%P", p); + if(c > p->from3.offset) + diag("passed origin (#%llux)\n%P", c, p); + else + c = p->from3.offset; + p->pc = c; + } + if(p->from.sym != S) + p->from.sym->value = c; + /* need passes to resolve branches? */ + if(c-otxt >= (1L<<15)) + bflag = c; + otxt = c; + continue; + } + if(p->as != ANOP) + diag("zero-width instruction\n%P", p); + continue; + } + c += m; + } + + /* + * if any procedure is large enough to + * generate a large SBRA branch, then + * generate extra passes putting branches + * around jmps to fix. this is rare. + */ + while(bflag) { + if(debug['v']) + Bprint(&bso, "%5.2f span1\n", cputime()); + bflag = 0; + c = INITTEXT; + for(p = firstp; p != P; p = p->link) { + p->pc = c; + o = oplook(p); + if((o->type == 16 || o->type == 17) && p->cond) { + otxt = p->cond->pc - c; + if(otxt < -(1L<<16)+10 || otxt >= (1L<<15)-10) { + q = prg(); + q->link = p->link; + p->link = q; + q->as = ABR; + q->to.type = D_BRANCH; + q->cond = p->cond; + p->cond = q; + q = prg(); + q->link = p->link; + p->link = q; + q->as = ABR; + q->to.type = D_BRANCH; + q->cond = q->link->link; + addnop(p->link); + addnop(p); + bflag = 1; + } + } + m = o->size; + if(m == 0) { + if(p->as == ATEXT) { + curtext = p; + autosize = p->to.offset + 8; + if(p->from.sym != S) + p->from.sym->value = c; + continue; + } + if(p->as != ANOP) + diag("zero-width instruction\n%P", p); + continue; + } + c += m; + } + } + + c = rnd(c, 8); + + setext = lookup("etext", 0); + if(setext != S) { + setext->value = c; + textsize = c - INITTEXT; + } + if(INITRND) + INITDAT = rnd(c, INITRND); + if(debug['v']) + Bprint(&bso, "tsize = %llux\n", textsize); + Bflush(&bso); +} + +void +xdefine(char *p, int t, vlong v) +{ + Sym *s; + + s = lookup(p, 0); + if(s->type == 0 || s->type == SXREF) { + s->type = t; + s->value = v; + } +} + +vlong +vregoff(Adr *a) +{ + + instoffset = 0; + aclass(a); + return instoffset; +} + +long +regoff(Adr *a) +{ + return vregoff(a); +} + +int +isint32(vlong v) +{ + long l; + + l = v; + return (vlong)l == v; +} + +int +isuint32(uvlong v) +{ + ulong l; + + l = v; + return (uvlong)l == v; +} + +int +aclass(Adr *a) +{ + Sym *s; + int t; + + switch(a->type) { + case D_NONE: + return C_NONE; + + case D_REG: + return C_REG; + + case D_FREG: + return C_FREG; + + case D_CREG: + return C_CREG; + + case D_SPR: + if(a->offset == D_LR) + return C_LR; + if(a->offset == D_XER) + return C_XER; + if(a->offset == D_CTR) + return C_CTR; + return C_SPR; + + case D_DCR: + return C_SPR; + + case D_FPSCR: + return C_FPSCR; + + case D_MSR: + return C_MSR; + + case D_OREG: + switch(a->name) { + case D_EXTERN: + case D_STATIC: + if(a->sym == S) + break; + t = a->sym->type; + if(t == 0 || t == SXREF) { + diag("undefined external: %s in %s", + a->sym->name, TNAME); + a->sym->type = SDATA; + } + if(dlm){ + instoffset = a->sym->value + a->offset; + switch(a->sym->type){ + case STEXT: + case SLEAF: + case SCONST: + case SUNDEF: + break; + default: + instoffset += INITDAT; + } + return C_ADDR; + } + instoffset = a->sym->value + a->offset - BIG; + if(instoffset >= -BIG && instoffset < BIG) + return C_SEXT; + return C_LEXT; + case D_AUTO: + instoffset = autosize + a->offset; + if(instoffset >= -BIG && instoffset < BIG) + return C_SAUTO; + return C_LAUTO; + case D_PARAM: + instoffset = autosize + a->offset + 8L; + if(instoffset >= -BIG && instoffset < BIG) + return C_SAUTO; + return C_LAUTO; + case D_NONE: + instoffset = a->offset; + if(instoffset == 0) + return C_ZOREG; + if(instoffset >= -BIG && instoffset < BIG) + return C_SOREG; + return C_LOREG; + } + return C_GOK; + + case D_OPT: + instoffset = a->offset & 31L; + if(a->name == D_NONE) + return C_SCON; + return C_GOK; + + case D_CONST: + switch(a->name) { + + case D_NONE: + instoffset = a->offset; + consize: + if(instoffset >= 0) { + if(instoffset == 0) + return C_ZCON; + if(instoffset <= 0x7fff) + return C_SCON; + if(instoffset <= 0xffff) + return C_ANDCON; + if((instoffset & 0xffff) == 0 && isuint32(instoffset)) /* && (instoffset & (1<<31)) == 0) */ + return C_UCON; + if(isint32(instoffset) || isuint32(instoffset)) + return C_LCON; + return C_DCON; + } + if(instoffset >= -0x8000) + return C_ADDCON; + if((instoffset & 0xffff) == 0 && isint32(instoffset)) + return C_UCON; + if(isint32(instoffset)) + return C_LCON; + return C_DCON; + + case D_EXTERN: + case D_STATIC: + s = a->sym; + if(s == S) + break; + t = s->type; + if(t == 0 || t == SXREF) { + diag("undefined external: %s in %s", + s->name, TNAME); + s->type = SDATA; + } + if(s->type == STEXT || s->type == SLEAF || s->type == SUNDEF) { + instoffset = s->value + a->offset; + return C_LCON; + } + if(s->type == SCONST) { + instoffset = s->value + a->offset; + if(dlm) + return C_LCON; + goto consize; + } + if(!dlm){ + instoffset = s->value + a->offset - BIG; + if(instoffset >= -BIG && instoffset < BIG && instoffset != 0) + return C_SECON; + } + instoffset = s->value + a->offset + INITDAT; + if(dlm) + return C_LCON; + /* not sure why this barfs */ + return C_LCON; + /* + if(instoffset == 0) + return C_ZCON; + if(instoffset >= -0x8000 && instoffset <= 0xffff) + return C_SCON; + if((instoffset & 0xffff) == 0) + return C_UCON; + return C_LCON; + */ + + case D_AUTO: + instoffset = autosize + a->offset; + if(instoffset >= -BIG && instoffset < BIG) + return C_SACON; + return C_LACON; + + case D_PARAM: + instoffset = autosize + a->offset + 8L; + if(instoffset >= -BIG && instoffset < BIG) + return C_SACON; + return C_LACON; + } + return C_GOK; + + case D_BRANCH: + return C_SBRA; + } + return C_GOK; +} + +Optab* +oplook(Prog *p) +{ + int a1, a2, a3, a4, r; + char *c1, *c3, *c4; + Optab *o, *e; + + a1 = p->optab; + if(a1) + return optab+(a1-1); + a1 = p->from.class; + if(a1 == 0) { + a1 = aclass(&p->from) + 1; + p->from.class = a1; + } + a1--; + a3 = p->from3.class; + if(a3 == 0) { + a3 = aclass(&p->from3) + 1; + p->from3.class = a3; + } + a3--; + a4 = p->to.class; + if(a4 == 0) { + a4 = aclass(&p->to) + 1; + p->to.class = a4; + } + a4--; + a2 = C_NONE; + if(p->reg != NREG) + a2 = C_REG; + r = p->as; + o = oprange[r].start; + if(o == 0) + o = oprange[r].stop; /* just generate an error */ + e = oprange[r].stop; + c1 = xcmp[a1]; + c3 = xcmp[a3]; + c4 = xcmp[a4]; + for(; oa2 == a2) + if(c1[o->a1]) + if(c3[o->a3]) + if(c4[o->a4]) { + p->optab = (o-optab)+1; + return o; + } + diag("illegal combination %A %R %R %R %R", + p->as, a1, a2, a3, a4); + if(1||!debug['a']) + prasm(p); + if(o == 0) + errorexit(); + return o; +} + +int +cmp(int a, int b) +{ + + if(a == b) + return 1; + switch(a) { + case C_LCON: + if(b == C_ZCON || b == C_SCON || b == C_UCON || b == C_ADDCON || b == C_ANDCON) + return 1; + break; + case C_ADDCON: + if(b == C_ZCON || b == C_SCON) + return 1; + break; + case C_ANDCON: + if(b == C_ZCON || b == C_SCON) + return 1; + break; + case C_SPR: + if(b == C_LR || b == C_XER || b == C_CTR) + return 1; + break; + case C_UCON: + if(b == C_ZCON) + return 1; + break; + case C_SCON: + if(b == C_ZCON) + return 1; + break; + case C_LACON: + if(b == C_SACON) + return 1; + break; + case C_LBRA: + if(b == C_SBRA) + return 1; + break; + case C_LEXT: + if(b == C_SEXT) + return 1; + break; + case C_LAUTO: + if(b == C_SAUTO) + return 1; + break; + case C_REG: + if(b == C_ZCON) + return r0iszero; + break; + case C_LOREG: + if(b == C_ZOREG || b == C_SOREG) + return 1; + break; + case C_SOREG: + if(b == C_ZOREG) + return 1; + break; + + case C_ANY: + return 1; + } + return 0; +} + +int +ocmp(void *a1, void *a2) +{ + Optab *p1, *p2; + int n; + + p1 = a1; + p2 = a2; + n = p1->as - p2->as; + if(n) + return n; + n = p1->a1 - p2->a1; + if(n) + return n; + n = p1->a2 - p2->a2; + if(n) + return n; + n = p1->a3 - p2->a3; + if(n) + return n; + n = p1->a4 - p2->a4; + if(n) + return n; + return 0; +} + +void +buildop(void) +{ + int i, n, r; + + for(i=0; i subf Rd,ra,rb */ + oprange[ASUB] = oprange[r]; + oprange[ASUBCC] = oprange[r]; + oprange[ASUBV] = oprange[r]; + oprange[ASUBVCC] = oprange[r]; + oprange[ASUBCCC] = oprange[r]; + oprange[ASUBCV] = oprange[r]; + oprange[ASUBCVCC] = oprange[r]; + oprange[ASUBE] = oprange[r]; + oprange[ASUBECC] = oprange[r]; + oprange[ASUBEV] = oprange[r]; + oprange[ASUBEVCC] = oprange[r]; + break; + case ASYNC: + oprange[AISYNC] = oprange[r]; + oprange[APTESYNC] = oprange[r]; + oprange[ATLBSYNC] = oprange[r]; + break; + case ARLWMI: + oprange[ARLWMICC] = oprange[r]; + oprange[ARLWNM] = oprange[r]; + oprange[ARLWNMCC] = oprange[r]; + break; + case ARLDMI: + oprange[ARLDMICC] = oprange[r]; + break; + case ARLDC: + oprange[ARLDCCC] = oprange[r]; + break; + case ARLDCL: + oprange[ARLDCR] = oprange[r]; + oprange[ARLDCLCC] = oprange[r]; + oprange[ARLDCRCC] = oprange[r]; + break; + case AFMOVD: + oprange[AFMOVDCC] = oprange[r]; + oprange[AFMOVDU] = oprange[r]; + oprange[AFMOVS] = oprange[r]; + oprange[AFMOVSU] = oprange[r]; + break; + case AECIWX: + oprange[ALWAR] = oprange[r]; + break; + case ASYSCALL: /* just the op; flow of control */ + oprange[ARFI] = oprange[r]; + oprange[ARFCI] = oprange[r]; + oprange[ARFID] = oprange[r]; + oprange[AHRFID] = oprange[r]; + break; + case AMOVHBR: + oprange[AMOVWBR] = oprange[r]; + break; + case ASLBMFEE: + oprange[ASLBMFEV] = oprange[r]; + break; + case ATW: + oprange[ATD] = oprange[r]; + break; + case ATLBIE: + oprange[ASLBIE] = oprange[r]; + oprange[ATLBIEL] = oprange[r]; + break; + case AEIEIO: + oprange[ASLBIA] = oprange[r]; + break; + case ACMP: + oprange[ACMPW] = oprange[r]; + break; + case ACMPU: + oprange[ACMPWU] = oprange[r]; + break; + case AADD: + case AANDCC: /* and. Rb,Rs,Ra; andi. $uimm,Rs,Ra; andis. $uimm,Rs,Ra */ + case ALSW: + case AMOVW: /* load/store/move word with sign extension; special 32-bit move; move 32-bit literals */ + case AMOVWZ: /* load/store/move word with zero extension; move 32-bit literals */ + case AMOVD: /* load/store/move 64-bit values, including 32-bit literals with/without sign-extension */ + case AMOVB: /* macro: move byte with sign extension */ + case AMOVBU: /* macro: move byte with sign extension & update */ + case AMOVFL: + case AMULLW: /* op $s[,r2],r3; op r1[,r2],r3; no cc/v */ + case ASUBC: /* op r1,$s,r3; op r1[,r2],r3 */ + case ASTSW: + case ASLBMTE: + case AWORD: + case ADWORD: + case ANOP: + case ATEXT: + break; + } + } +} + +enum{ + ABSD = 0, + ABSU = 1, + RELD = 2, + RELU = 3, +}; + +int modemap[8] = { 0, 1, -1, 2, 3, 4, 5, 6}; + +typedef struct Reloc Reloc; + +struct Reloc +{ + int n; + int t; + uchar *m; + ulong *a; +}; + +Reloc rels; + +static void +grow(Reloc *r) +{ + int t; + uchar *m, *nm; + ulong *a, *na; + + t = r->t; + r->t += 64; + m = r->m; + a = r->a; + r->m = nm = malloc(r->t*sizeof(uchar)); + r->a = na = malloc(r->t*sizeof(ulong)); + memmove(nm, m, t*sizeof(uchar)); + memmove(na, a, t*sizeof(ulong)); + free(m); + free(a); +} + +void +dynreloc(Sym *s, long v, int abs, int split, int sext) +{ + int i, k, n; + uchar *m; + ulong *a; + Reloc *r; + + if(v&3) + diag("bad relocation address"); + v >>= 2; + if(s->type == SUNDEF) + k = abs ? ABSU : RELU; + else + k = abs ? ABSD : RELD; + if(split) + k += 4; + if(sext) + k += 2; + /* Bprint(&bso, "R %s a=%ld(%lx) %d\n", s->name, a, a, k); */ + k = modemap[k]; + r = &rels; + n = r->n; + if(n >= r->t) + grow(r); + m = r->m; + a = r->a; + for(i = n; i > 0; i--){ + if(v < a[i-1]){ /* happens occasionally for data */ + m[i] = m[i-1]; + a[i] = a[i-1]; + } + else + break; + } + m[i] = k; + a[i] = v; + r->n++; +} + +static int +sput(char *s) +{ + char *p; + + p = s; + while(*s) + cput(*s++); + cput(0); + return s-p+1; +} + +void +asmdyn() +{ + int i, n, t, c; + Sym *s; + ulong la, ra, *a; + vlong off; + uchar *m; + Reloc *r; + + cflush(); + off = seek(cout, 0, 1); + lput(0); + t = 0; + lput(imports); + t += 4; + for(i = 0; i < NHASH; i++) + for(s = hash[i]; s != S; s = s->link) + if(s->type == SUNDEF){ + lput(s->sig); + t += 4; + t += sput(s->name); + } + + la = 0; + r = &rels; + n = r->n; + m = r->m; + a = r->a; + lput(n); + t += 4; + for(i = 0; i < n; i++){ + ra = *a-la; + if(*a < la) + diag("bad relocation order"); + if(ra < 256) + c = 0; + else if(ra < 65536) + c = 1; + else + c = 2; + cput((c<<6)|*m++); + t++; + if(c == 0){ + cput(ra); + t++; + } + else if(c == 1){ + wput(ra); + t += 2; + } + else{ + lput(ra); + t += 4; + } + la = *a++; + } + + cflush(); + seek(cout, off, 0); + lput(t); + + if(debug['v']){ + Bprint(&bso, "import table entries = %d\n", imports); + Bprint(&bso, "export table entries = %d\n", exports); + } +} diff --git a/src/liblink/sched9.c b/src/liblink/sched9.c new file mode 100644 index 000000000..a9083df9b --- /dev/null +++ b/src/liblink/sched9.c @@ -0,0 +1,835 @@ +// cmd/9l/sched.c from Vita Nuova. +// +// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. +// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) +// Portions Copyright © 1997-1999 Vita Nuova Limited +// Portions Copyright © 2000-2008 Vita Nuova Holdings Limited (www.vitanuova.com) +// Portions Copyright © 2004,2006 Bruce Ellis +// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) +// Revisions Copyright © 2000-2008 Lucent Technologies Inc. and others +// Portions Copyright © 2009 The Go Authors. All rights reserved. +// +// Permission is hereby granted, free of charge, to any person obtaining a copy +// of this software and associated documentation files (the "Software"), to deal +// in the Software without restriction, including without limitation the rights +// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +// copies of the Software, and to permit persons to whom the Software is +// furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +// THE SOFTWARE. + +// +build ignore + +#include "l.h" + +enum +{ + E_ICC = 1<<0, + E_FCC = 1<<1, + E_MEM = 1<<2, + E_MEMSP = 1<<3, /* uses offset and size */ + E_MEMSB = 1<<4, /* uses offset and size */ + E_LR = 1<<5, + E_CR = 1<<6, + E_CTR = 1<<7, + E_XER = 1<<8, + + E_CR0 = 0xF<<0, + E_CR1 = 0xF<<4, + + ANYMEM = E_MEM|E_MEMSP|E_MEMSB, + ALL = ~0, +}; + +typedef struct Sch Sch; +typedef struct Dep Dep; + +struct Dep +{ + ulong ireg; + ulong freg; + ulong cc; + ulong cr; +}; +struct Sch +{ + Prog p; + Dep set; + Dep used; + long soffset; + char size; + char comp; +}; + +void regused(Sch*, Prog*); +int depend(Sch*, Sch*); +int conflict(Sch*, Sch*); +int offoverlap(Sch*, Sch*); +void dumpbits(Sch*, Dep*); + +void +sched(Prog *p0, Prog *pe) +{ + Prog *p, *q; + Sch sch[NSCHED], *s, *t, *u, *se, stmp; + + if(!debug['Q']) + return; + /* + * build side structure + */ + s = sch; + for(p=p0;; p=p->link) { + memset(s, 0, sizeof(*s)); + s->p = *p; + regused(s, p); + if(debug['X']) { + Bprint(&bso, "%P\tset", &s->p); + dumpbits(s, &s->set); + Bprint(&bso, "; used"); + dumpbits(s, &s->used); + if(s->comp) + Bprint(&bso, "; compound"); + if(s->p.mark & LOAD) + Bprint(&bso, "; load"); + if(s->p.mark & BRANCH) + Bprint(&bso, "; branch"); + if(s->p.mark & FCMP) + Bprint(&bso, "; fcmp"); + Bprint(&bso, "\n"); + } + s++; + if(p == pe) + break; + } + se = s; + + for(s=se-1; s>=sch; s--) { + + /* + * load delay. interlocked. + */ + if(s->p.mark & LOAD) { + if(s >= se-1) + continue; + if(!conflict(s, (s+1))) + continue; + /* + * s is load, s+1 is immediate use of result + * t is the trial instruction to insert between s and s+1 + */ + for(t=s-1; t>=sch; t--) { + if(t->p.mark & BRANCH) + goto no2; + if(t->p.mark & FCMP) + if((s+1)->p.mark & BRANCH) + goto no2; + if(t->p.mark & LOAD) + if(conflict(t, (s+1))) + goto no2; + for(u=t+1; u<=s; u++) + if(depend(u, t)) + goto no2; + goto out2; + no2:; + } + if(debug['X']) + Bprint(&bso, "?l%P\n", &s->p); + continue; + out2: + if(debug['X']) { + Bprint(&bso, "!l%P\n", &t->p); + Bprint(&bso, "%P\n", &s->p); + } + stmp = *t; + memmove(t, t+1, (uchar*)s - (uchar*)t); + *s = stmp; + s--; + continue; + } + + /* + * fop2 delay. + */ + if(s->p.mark & FCMP) { + if(s >= se-1) + continue; + if(!((s+1)->p.mark & BRANCH)) + continue; + /* t is the trial instruction to use */ + for(t=s-1; t>=sch; t--) { + for(u=t+1; u<=s; u++) + if(depend(u, t)) + goto no3; + goto out3; + no3:; + } + if(debug['X']) + Bprint(&bso, "?f%P\n", &s->p); + continue; + out3: + if(debug['X']) { + Bprint(&bso, "!f%P\n", &t->p); + Bprint(&bso, "%P\n", &s->p); + } + stmp = *t; + memmove(t, t+1, (uchar*)s - (uchar*)t); + *s = stmp; + s--; + continue; + } + } + + /* + * put it all back + */ + for(s=sch, p=p0; slink; + if(q != s->p.link) { + *p = s->p; + p->link = q; + } + } + if(debug['X']) + Bprint(&bso, "\n"); +} + +void +regused(Sch *s, Prog *realp) +{ + int c, ar, ad, ld, sz, nr, upd; + ulong m; + Prog *p; + + p = &s->p; + s->comp = compound(p); + if(s->comp) { + s->set.ireg |= 1<used.ireg |= 1<as) { + case ATEXT: + curtext = realp; + autosize = p->to.offset + 8; + ad = 1; + break; + case ABL: + s->set.cc |= E_LR; + ar = 1; + ad = 1; + break; + case ABR: + ar = 1; + ad = 1; + break; + case ACMP: + case ACMPU: + case ACMPW: + case ACMPWU: + s->set.cc |= E_ICC; + if(p->reg == 0) + s->set.cr |= E_CR0; + else + s->set.cr |= (0xF<<((p->reg&7)*4)); + ar = 1; + break; + case AFCMPO: + case AFCMPU: + s->set.cc |= E_FCC; + if(p->reg == 0) + s->set.cr |= E_CR0; + else + s->set.cr |= (0xF<<((p->reg&7)*4)); + ar = 1; + break; + case ACRAND: + case ACRANDN: + case ACREQV: + case ACRNAND: + case ACRNOR: + case ACROR: + case ACRORN: + case ACRXOR: + s->used.cr |= 1<from.reg; + s->set.cr |= 1<to.reg; + nr = 1; + break; + case ABCL: /* tricky */ + s->used.cc |= E_FCC|E_ICC; + s->used.cr = ALL; + s->set.cc |= E_LR; + ar = 1; + break; + case ABC: /* tricky */ + s->used.cc |= E_FCC|E_ICC; + s->used.cr = ALL; + ar = 1; + break; + case ABEQ: + case ABGE: + case ABGT: + case ABLE: + case ABLT: + case ABNE: + case ABVC: + case ABVS: + s->used.cc |= E_ICC; + s->used.cr |= E_CR0; + ar = 1; + break; + case ALSW: + case AMOVMW: + /* could do better */ + sz = 32*4; + ld = 1; + break; + case AMOVBU: + case AMOVBZU: + upd = 1; + sz = 1; + ld = 1; + break; + case AMOVB: + case AMOVBZ: + sz = 1; + ld = 1; + break; + case AMOVHU: + case AMOVHZU: + upd = 1; + sz = 2; + ld = 1; + break; + case AMOVH: + case AMOVHBR: + case AMOVHZ: + sz = 2; + ld = 1; + break; + case AFMOVSU: + case AMOVWU: + case AMOVWZU: + upd = 1; + sz = 4; + ld = 1; + break; + case AFMOVS: + case AMOVW: + case AMOVWZ: + case AMOVWBR: + case ALWAR: + sz = 4; + ld = 1; + break; + case AFMOVDU: + upd = 1; + sz = 8; + ld = 1; + break; + case AFMOVD: + sz = 8; + ld = 1; + break; + case AFMOVDCC: + sz = 8; + ld = 1; + s->set.cc |= E_FCC; + s->set.cr |= E_CR1; + break; + case AMOVFL: + case AMOVCRFS: + case AMTFSB0: + case AMTFSB0CC: + case AMTFSB1: + case AMTFSB1CC: + s->set.ireg = ALL; + s->set.freg = ALL; + s->set.cc = ALL; + s->set.cr = ALL; + break; + case AADDCC: + case AADDVCC: + case AADDCCC: + case AADDCVCC: + case AADDMECC: + case AADDMEVCC: + case AADDECC: + case AADDEVCC: + case AADDZECC: + case AADDZEVCC: + case AANDCC: + case AANDNCC: + case ACNTLZWCC: + case ADIVWCC: + case ADIVWVCC: + case ADIVWUCC: + case ADIVWUVCC: + case AEQVCC: + case AEXTSBCC: + case AEXTSHCC: + case AMULHWCC: + case AMULHWUCC: + case AMULLWCC: + case AMULLWVCC: + case ANANDCC: + case ANEGCC: + case ANEGVCC: + case ANORCC: + case AORCC: + case AORNCC: + case AREMCC: + case AREMVCC: + case AREMUCC: + case AREMUVCC: + case ARLWMICC: + case ARLWNMCC: + case ASLWCC: + case ASRAWCC: + case ASRWCC: + case ASTWCCC: + case ASUBCC: + case ASUBVCC: + case ASUBCCC: + case ASUBCVCC: + case ASUBMECC: + case ASUBMEVCC: + case ASUBECC: + case ASUBEVCC: + case ASUBZECC: + case ASUBZEVCC: + case AXORCC: + s->set.cc |= E_ICC; + s->set.cr |= E_CR0; + break; + case AFABSCC: + case AFADDCC: + case AFADDSCC: + case AFCTIWCC: + case AFCTIWZCC: + case AFDIVCC: + case AFDIVSCC: + case AFMADDCC: + case AFMADDSCC: + case AFMSUBCC: + case AFMSUBSCC: + case AFMULCC: + case AFMULSCC: + case AFNABSCC: + case AFNEGCC: + case AFNMADDCC: + case AFNMADDSCC: + case AFNMSUBCC: + case AFNMSUBSCC: + case AFRSPCC: + case AFSUBCC: + case AFSUBSCC: + s->set.cc |= E_FCC; + s->set.cr |= E_CR1; + break; + } + +/* + * flags based on 'to' field + */ + c = p->to.class; + if(c == 0) { + c = aclass(&p->to) + 1; + p->to.class = c; + } + c--; + switch(c) { + default: + print("unknown class %d %D\n", c, &p->to); + + case C_NONE: + case C_ZCON: + case C_SCON: + case C_UCON: + case C_LCON: + case C_ADDCON: + case C_ANDCON: + case C_SBRA: + case C_LBRA: + break; + case C_CREG: + c = p->to.reg; + if(c == NREG) + s->set.cr = ALL; + else + s->set.cr |= (0xF << ((p->from.reg&7)*4)); + s->set.cc = ALL; + break; + case C_SPR: + case C_FPSCR: + case C_MSR: + case C_XER: + s->set.ireg = ALL; + s->set.freg = ALL; + s->set.cc = ALL; + s->set.cr = ALL; + break; + case C_LR: + s->set.cc |= E_LR; + break; + case C_CTR: + s->set.cc |= E_CTR; + break; + case C_ZOREG: + case C_SOREG: + case C_LOREG: + c = p->to.reg; + s->used.ireg |= 1<set.ireg |= 1<size = sz; + s->soffset = regoff(&p->to); + + m = ANYMEM; + if(c == REGSB) + m = E_MEMSB; + if(c == REGSP) + m = E_MEMSP; + + if(ar) + s->used.cc |= m; + else + s->set.cc |= m; + break; + case C_SACON: + case C_LACON: + s->used.ireg |= 1<set.ireg |= 1<used.ireg |= 1<set.ireg |= 1<used.ireg |= 1<to.reg; + else + s->set.ireg |= 1<to.reg; + break; + case C_FREG: + if(ar) + s->used.freg |= 1<to.reg; + else + s->set.freg |= 1<to.reg; + break; + case C_SAUTO: + case C_LAUTO: + s->used.ireg |= 1<set.ireg |= 1<size = sz; + s->soffset = regoff(&p->to); + + if(ar) + s->used.cc |= E_MEMSP; + else + s->set.cc |= E_MEMSP; + break; + case C_SEXT: + case C_LEXT: + s->used.ireg |= 1<set.ireg |= 1<size = sz; + s->soffset = regoff(&p->to); + + if(ar) + s->used.cc |= E_MEMSB; + else + s->set.cc |= E_MEMSB; + break; + } + +/* + * flags based on 'from' field + */ + c = p->from.class; + if(c == 0) { + c = aclass(&p->from) + 1; + p->from.class = c; + } + c--; + switch(c) { + default: + print("unknown class %d %D\n", c, &p->from); + + case C_NONE: + case C_ZCON: + case C_SCON: + case C_UCON: + case C_LCON: + case C_ADDCON: + case C_ANDCON: + case C_SBRA: + case C_LBRA: + c = p->from.reg; + if(c != NREG) + s->used.ireg |= 1<from.reg; + if(c == NREG) + s->used.cr = ALL; + else + s->used.cr |= (0xF << ((p->from.reg&7)*4)); + s->used.cc = ALL; + break; + case C_SPR: + case C_FPSCR: + case C_MSR: + case C_XER: + s->set.ireg = ALL; + s->set.freg = ALL; + s->set.cc = ALL; + s->set.cr = ALL; + break; + case C_LR: + s->used.cc |= E_LR; + break; + case C_CTR: + s->used.cc |= E_CTR; + break; + case C_ZOREG: + case C_SOREG: + case C_LOREG: + c = p->from.reg; + s->used.ireg |= 1<mark |= LOAD; + if(ad) + break; + s->size = sz; + s->soffset = regoff(&p->from); + + m = ANYMEM; + if(c == REGSB) + m = E_MEMSB; + if(c == REGSP) + m = E_MEMSP; + + s->used.cc |= m; + break; + case C_SACON: + case C_LACON: + s->used.ireg |= 1<used.ireg |= 1<used.ireg |= 1<from.reg; + break; + case C_FREG: + s->used.freg |= 1<from.reg; + break; + case C_SAUTO: + case C_LAUTO: + s->used.ireg |= 1<mark |= LOAD; + if(ad) + break; + s->size = sz; + s->soffset = regoff(&p->from); + + s->used.cc |= E_MEMSP; + break; + case C_SEXT: + case C_LEXT: + s->used.ireg |= 1<mark |= LOAD; + if(ad) + break; + s->size = sz; + s->soffset = regoff(&p->from); + + s->used.cc |= E_MEMSB; + break; + } + + c = p->reg; + if(c != NREG) { + if(p->from.type == D_FREG || p->to.type == D_FREG) + s->used.freg |= 1<used.ireg |= 1<set.ireg & (sb->set.ireg|sb->used.ireg)) + return 1; + if(sb->set.ireg & sa->used.ireg) + return 1; + + if(sa->set.freg & (sb->set.freg|sb->used.freg)) + return 1; + if(sb->set.freg & sa->used.freg) + return 1; + + if(sa->set.cr & (sb->set.cr|sb->used.cr)) + return 1; + if(sb->set.cr & sa->used.cr) + return 1; + + + x = (sa->set.cc & (sb->set.cc|sb->used.cc)) | + (sb->set.cc & sa->used.cc); + if(x) { + /* + * allow SB and SP to pass each other. + * allow SB to pass SB iff doffsets are ok + * anything else conflicts + */ + if(x != E_MEMSP && x != E_MEMSB) + return 1; + x = sa->set.cc | sb->set.cc | + sa->used.cc | sb->used.cc; + if(x & E_MEM) + return 1; + if(offoverlap(sa, sb)) + return 1; + } + + return 0; +} + +int +offoverlap(Sch *sa, Sch *sb) +{ + + if(sa->soffset < sb->soffset) { + if(sa->soffset+sa->size > sb->soffset) + return 1; + return 0; + } + if(sb->soffset+sb->size > sa->soffset) + return 1; + return 0; +} + +/* + * test 2 adjacent instructions + * and find out if inserted instructions + * are desired to prevent stalls. + * first instruction is a load instruction. + */ +int +conflict(Sch *sa, Sch *sb) +{ + + if(sa->set.ireg & sb->used.ireg) + return 1; + if(sa->set.freg & sb->used.freg) + return 1; + if(sa->set.cr & sb->used.cr) + return 1; + return 0; +} + +int +compound(Prog *p) +{ + Optab *o; + + o = oplook(p); + if(o->size != 4) + return 1; + if(p->to.type == D_REG && p->to.reg == REGSB) + return 1; + return 0; +} + +void +dumpbits(Sch *s, Dep *d) +{ + int i; + + for(i=0; i<32; i++) + if(d->ireg & (1<freg & (1<cr & (1<cc & (1<size); + break; + case E_MEMSB: + Bprint(&bso, " SB%d", s->size); + break; + case E_MEMSP: + Bprint(&bso, " SP%d", s->size); + break; + } +} -- cgit v1.2.1 From d93b2880078f7dabb843dfc992ff5fb0131cfbfe Mon Sep 17 00:00:00 2001 From: Shenghou Ma Date: Thu, 7 Aug 2014 12:02:36 -0400 Subject: [dev.power64] liblink: move span and asmout related function from obj9.c to asm9.c To reduce delta for the upcoming liblink CL. Just code movement, no semantic changes. LGTM=rsc R=rsc, iant CC=golang-codereviews https://codereview.appspot.com/124830043 --- src/liblink/asm9.c | 852 +++++++++++++++++++++++++++++++++++++++++++++++++++++ src/liblink/obj9.c | 852 ----------------------------------------------------- 2 files changed, 852 insertions(+), 852 deletions(-) (limited to 'src/liblink') diff --git a/src/liblink/asm9.c b/src/liblink/asm9.c index ea510df79..27ccb0a23 100644 --- a/src/liblink/asm9.c +++ b/src/liblink/asm9.c @@ -402,6 +402,843 @@ Optab optab[] = { AXXX, C_NONE, C_NONE, C_NONE, C_NONE, 0, 4, 0 }, }; +#include "l.h" + +void +span(void) +{ + Prog *p, *q; + Sym *setext; + Optab *o; + int m, bflag; + vlong c, otxt; + + if(debug['v']) + Bprint(&bso, "%5.2f span\n", cputime()); + Bflush(&bso); + + bflag = 0; + c = INITTEXT; + otxt = c; + for(p = firstp; p != P; p = p->link) { + p->pc = c; + o = oplook(p); + m = o->size; + if(m == 0) { + if(p->as == ATEXT) { + curtext = p; + autosize = p->to.offset + 8; + if(p->from3.type == D_CONST) { + if(p->from3.offset & 3) + diag("illegal origin\n%P", p); + if(c > p->from3.offset) + diag("passed origin (#%llux)\n%P", c, p); + else + c = p->from3.offset; + p->pc = c; + } + if(p->from.sym != S) + p->from.sym->value = c; + /* need passes to resolve branches? */ + if(c-otxt >= (1L<<15)) + bflag = c; + otxt = c; + continue; + } + if(p->as != ANOP) + diag("zero-width instruction\n%P", p); + continue; + } + c += m; + } + + /* + * if any procedure is large enough to + * generate a large SBRA branch, then + * generate extra passes putting branches + * around jmps to fix. this is rare. + */ + while(bflag) { + if(debug['v']) + Bprint(&bso, "%5.2f span1\n", cputime()); + bflag = 0; + c = INITTEXT; + for(p = firstp; p != P; p = p->link) { + p->pc = c; + o = oplook(p); + if((o->type == 16 || o->type == 17) && p->cond) { + otxt = p->cond->pc - c; + if(otxt < -(1L<<16)+10 || otxt >= (1L<<15)-10) { + q = prg(); + q->link = p->link; + p->link = q; + q->as = ABR; + q->to.type = D_BRANCH; + q->cond = p->cond; + p->cond = q; + q = prg(); + q->link = p->link; + p->link = q; + q->as = ABR; + q->to.type = D_BRANCH; + q->cond = q->link->link; + addnop(p->link); + addnop(p); + bflag = 1; + } + } + m = o->size; + if(m == 0) { + if(p->as == ATEXT) { + curtext = p; + autosize = p->to.offset + 8; + if(p->from.sym != S) + p->from.sym->value = c; + continue; + } + if(p->as != ANOP) + diag("zero-width instruction\n%P", p); + continue; + } + c += m; + } + } + + c = rnd(c, 8); + + setext = lookup("etext", 0); + if(setext != S) { + setext->value = c; + textsize = c - INITTEXT; + } + if(INITRND) + INITDAT = rnd(c, INITRND); + if(debug['v']) + Bprint(&bso, "tsize = %llux\n", textsize); + Bflush(&bso); +} + +void +xdefine(char *p, int t, vlong v) +{ + Sym *s; + + s = lookup(p, 0); + if(s->type == 0 || s->type == SXREF) { + s->type = t; + s->value = v; + } +} + +int +isint32(vlong v) +{ + long l; + + l = v; + return (vlong)l == v; +} + +int +isuint32(uvlong v) +{ + ulong l; + + l = v; + return (uvlong)l == v; +} + +int +aclass(Adr *a) +{ + Sym *s; + int t; + + switch(a->type) { + case D_NONE: + return C_NONE; + + case D_REG: + return C_REG; + + case D_FREG: + return C_FREG; + + case D_CREG: + return C_CREG; + + case D_SPR: + if(a->offset == D_LR) + return C_LR; + if(a->offset == D_XER) + return C_XER; + if(a->offset == D_CTR) + return C_CTR; + return C_SPR; + + case D_DCR: + return C_SPR; + + case D_FPSCR: + return C_FPSCR; + + case D_MSR: + return C_MSR; + + case D_OREG: + switch(a->name) { + case D_EXTERN: + case D_STATIC: + if(a->sym == S) + break; + t = a->sym->type; + if(t == 0 || t == SXREF) { + diag("undefined external: %s in %s", + a->sym->name, TNAME); + a->sym->type = SDATA; + } + if(dlm){ + instoffset = a->sym->value + a->offset; + switch(a->sym->type){ + case STEXT: + case SLEAF: + case SCONST: + case SUNDEF: + break; + default: + instoffset += INITDAT; + } + return C_ADDR; + } + instoffset = a->sym->value + a->offset - BIG; + if(instoffset >= -BIG && instoffset < BIG) + return C_SEXT; + return C_LEXT; + case D_AUTO: + instoffset = autosize + a->offset; + if(instoffset >= -BIG && instoffset < BIG) + return C_SAUTO; + return C_LAUTO; + case D_PARAM: + instoffset = autosize + a->offset + 8L; + if(instoffset >= -BIG && instoffset < BIG) + return C_SAUTO; + return C_LAUTO; + case D_NONE: + instoffset = a->offset; + if(instoffset == 0) + return C_ZOREG; + if(instoffset >= -BIG && instoffset < BIG) + return C_SOREG; + return C_LOREG; + } + return C_GOK; + + case D_OPT: + instoffset = a->offset & 31L; + if(a->name == D_NONE) + return C_SCON; + return C_GOK; + + case D_CONST: + switch(a->name) { + + case D_NONE: + instoffset = a->offset; + consize: + if(instoffset >= 0) { + if(instoffset == 0) + return C_ZCON; + if(instoffset <= 0x7fff) + return C_SCON; + if(instoffset <= 0xffff) + return C_ANDCON; + if((instoffset & 0xffff) == 0 && isuint32(instoffset)) /* && (instoffset & (1<<31)) == 0) */ + return C_UCON; + if(isint32(instoffset) || isuint32(instoffset)) + return C_LCON; + return C_DCON; + } + if(instoffset >= -0x8000) + return C_ADDCON; + if((instoffset & 0xffff) == 0 && isint32(instoffset)) + return C_UCON; + if(isint32(instoffset)) + return C_LCON; + return C_DCON; + + case D_EXTERN: + case D_STATIC: + s = a->sym; + if(s == S) + break; + t = s->type; + if(t == 0 || t == SXREF) { + diag("undefined external: %s in %s", + s->name, TNAME); + s->type = SDATA; + } + if(s->type == STEXT || s->type == SLEAF || s->type == SUNDEF) { + instoffset = s->value + a->offset; + return C_LCON; + } + if(s->type == SCONST) { + instoffset = s->value + a->offset; + if(dlm) + return C_LCON; + goto consize; + } + if(!dlm){ + instoffset = s->value + a->offset - BIG; + if(instoffset >= -BIG && instoffset < BIG && instoffset != 0) + return C_SECON; + } + instoffset = s->value + a->offset + INITDAT; + if(dlm) + return C_LCON; + /* not sure why this barfs */ + return C_LCON; + /* + if(instoffset == 0) + return C_ZCON; + if(instoffset >= -0x8000 && instoffset <= 0xffff) + return C_SCON; + if((instoffset & 0xffff) == 0) + return C_UCON; + return C_LCON; + */ + + case D_AUTO: + instoffset = autosize + a->offset; + if(instoffset >= -BIG && instoffset < BIG) + return C_SACON; + return C_LACON; + + case D_PARAM: + instoffset = autosize + a->offset + 8L; + if(instoffset >= -BIG && instoffset < BIG) + return C_SACON; + return C_LACON; + } + return C_GOK; + + case D_BRANCH: + return C_SBRA; + } + return C_GOK; +} + +Optab* +oplook(Prog *p) +{ + int a1, a2, a3, a4, r; + char *c1, *c3, *c4; + Optab *o, *e; + + a1 = p->optab; + if(a1) + return optab+(a1-1); + a1 = p->from.class; + if(a1 == 0) { + a1 = aclass(&p->from) + 1; + p->from.class = a1; + } + a1--; + a3 = p->from3.class; + if(a3 == 0) { + a3 = aclass(&p->from3) + 1; + p->from3.class = a3; + } + a3--; + a4 = p->to.class; + if(a4 == 0) { + a4 = aclass(&p->to) + 1; + p->to.class = a4; + } + a4--; + a2 = C_NONE; + if(p->reg != NREG) + a2 = C_REG; + r = p->as; + o = oprange[r].start; + if(o == 0) + o = oprange[r].stop; /* just generate an error */ + e = oprange[r].stop; + c1 = xcmp[a1]; + c3 = xcmp[a3]; + c4 = xcmp[a4]; + for(; oa2 == a2) + if(c1[o->a1]) + if(c3[o->a3]) + if(c4[o->a4]) { + p->optab = (o-optab)+1; + return o; + } + diag("illegal combination %A %R %R %R %R", + p->as, a1, a2, a3, a4); + if(1||!debug['a']) + prasm(p); + if(o == 0) + errorexit(); + return o; +} + +int +cmp(int a, int b) +{ + + if(a == b) + return 1; + switch(a) { + case C_LCON: + if(b == C_ZCON || b == C_SCON || b == C_UCON || b == C_ADDCON || b == C_ANDCON) + return 1; + break; + case C_ADDCON: + if(b == C_ZCON || b == C_SCON) + return 1; + break; + case C_ANDCON: + if(b == C_ZCON || b == C_SCON) + return 1; + break; + case C_SPR: + if(b == C_LR || b == C_XER || b == C_CTR) + return 1; + break; + case C_UCON: + if(b == C_ZCON) + return 1; + break; + case C_SCON: + if(b == C_ZCON) + return 1; + break; + case C_LACON: + if(b == C_SACON) + return 1; + break; + case C_LBRA: + if(b == C_SBRA) + return 1; + break; + case C_LEXT: + if(b == C_SEXT) + return 1; + break; + case C_LAUTO: + if(b == C_SAUTO) + return 1; + break; + case C_REG: + if(b == C_ZCON) + return r0iszero; + break; + case C_LOREG: + if(b == C_ZOREG || b == C_SOREG) + return 1; + break; + case C_SOREG: + if(b == C_ZOREG) + return 1; + break; + + case C_ANY: + return 1; + } + return 0; +} + +int +ocmp(void *a1, void *a2) +{ + Optab *p1, *p2; + int n; + + p1 = a1; + p2 = a2; + n = p1->as - p2->as; + if(n) + return n; + n = p1->a1 - p2->a1; + if(n) + return n; + n = p1->a2 - p2->a2; + if(n) + return n; + n = p1->a3 - p2->a3; + if(n) + return n; + n = p1->a4 - p2->a4; + if(n) + return n; + return 0; +} + +void +buildop(void) +{ + int i, n, r; + + for(i=0; i subf Rd,ra,rb */ + oprange[ASUB] = oprange[r]; + oprange[ASUBCC] = oprange[r]; + oprange[ASUBV] = oprange[r]; + oprange[ASUBVCC] = oprange[r]; + oprange[ASUBCCC] = oprange[r]; + oprange[ASUBCV] = oprange[r]; + oprange[ASUBCVCC] = oprange[r]; + oprange[ASUBE] = oprange[r]; + oprange[ASUBECC] = oprange[r]; + oprange[ASUBEV] = oprange[r]; + oprange[ASUBEVCC] = oprange[r]; + break; + case ASYNC: + oprange[AISYNC] = oprange[r]; + oprange[APTESYNC] = oprange[r]; + oprange[ATLBSYNC] = oprange[r]; + break; + case ARLWMI: + oprange[ARLWMICC] = oprange[r]; + oprange[ARLWNM] = oprange[r]; + oprange[ARLWNMCC] = oprange[r]; + break; + case ARLDMI: + oprange[ARLDMICC] = oprange[r]; + break; + case ARLDC: + oprange[ARLDCCC] = oprange[r]; + break; + case ARLDCL: + oprange[ARLDCR] = oprange[r]; + oprange[ARLDCLCC] = oprange[r]; + oprange[ARLDCRCC] = oprange[r]; + break; + case AFMOVD: + oprange[AFMOVDCC] = oprange[r]; + oprange[AFMOVDU] = oprange[r]; + oprange[AFMOVS] = oprange[r]; + oprange[AFMOVSU] = oprange[r]; + break; + case AECIWX: + oprange[ALWAR] = oprange[r]; + break; + case ASYSCALL: /* just the op; flow of control */ + oprange[ARFI] = oprange[r]; + oprange[ARFCI] = oprange[r]; + oprange[ARFID] = oprange[r]; + oprange[AHRFID] = oprange[r]; + break; + case AMOVHBR: + oprange[AMOVWBR] = oprange[r]; + break; + case ASLBMFEE: + oprange[ASLBMFEV] = oprange[r]; + break; + case ATW: + oprange[ATD] = oprange[r]; + break; + case ATLBIE: + oprange[ASLBIE] = oprange[r]; + oprange[ATLBIEL] = oprange[r]; + break; + case AEIEIO: + oprange[ASLBIA] = oprange[r]; + break; + case ACMP: + oprange[ACMPW] = oprange[r]; + break; + case ACMPU: + oprange[ACMPWU] = oprange[r]; + break; + case AADD: + case AANDCC: /* and. Rb,Rs,Ra; andi. $uimm,Rs,Ra; andis. $uimm,Rs,Ra */ + case ALSW: + case AMOVW: /* load/store/move word with sign extension; special 32-bit move; move 32-bit literals */ + case AMOVWZ: /* load/store/move word with zero extension; move 32-bit literals */ + case AMOVD: /* load/store/move 64-bit values, including 32-bit literals with/without sign-extension */ + case AMOVB: /* macro: move byte with sign extension */ + case AMOVBU: /* macro: move byte with sign extension & update */ + case AMOVFL: + case AMULLW: /* op $s[,r2],r3; op r1[,r2],r3; no cc/v */ + case ASUBC: /* op r1,$s,r3; op r1[,r2],r3 */ + case ASTSW: + case ASLBMTE: + case AWORD: + case ADWORD: + case ANOP: + case ATEXT: + break; + } + } +} + #include "l.h" #define OPVCC(o,xo,oe,rc) (((o)<<26)|((xo)<<1)|((oe)<<10)|((rc)&1)) @@ -1403,6 +2240,21 @@ asmout(Prog *p, Optab *o, int aflag) return 0; } +vlong +vregoff(Adr *a) +{ + + instoffset = 0; + aclass(a); + return instoffset; +} + +long +regoff(Adr *a) +{ + return vregoff(a); +} + long oprrr(int a) { diff --git a/src/liblink/obj9.c b/src/liblink/obj9.c index cf073ec36..0e869fb53 100644 --- a/src/liblink/obj9.c +++ b/src/liblink/obj9.c @@ -1220,858 +1220,6 @@ export(void) free(esyms); } -#include "l.h" - -void -span(void) -{ - Prog *p, *q; - Sym *setext; - Optab *o; - int m, bflag; - vlong c, otxt; - - if(debug['v']) - Bprint(&bso, "%5.2f span\n", cputime()); - Bflush(&bso); - - bflag = 0; - c = INITTEXT; - otxt = c; - for(p = firstp; p != P; p = p->link) { - p->pc = c; - o = oplook(p); - m = o->size; - if(m == 0) { - if(p->as == ATEXT) { - curtext = p; - autosize = p->to.offset + 8; - if(p->from3.type == D_CONST) { - if(p->from3.offset & 3) - diag("illegal origin\n%P", p); - if(c > p->from3.offset) - diag("passed origin (#%llux)\n%P", c, p); - else - c = p->from3.offset; - p->pc = c; - } - if(p->from.sym != S) - p->from.sym->value = c; - /* need passes to resolve branches? */ - if(c-otxt >= (1L<<15)) - bflag = c; - otxt = c; - continue; - } - if(p->as != ANOP) - diag("zero-width instruction\n%P", p); - continue; - } - c += m; - } - - /* - * if any procedure is large enough to - * generate a large SBRA branch, then - * generate extra passes putting branches - * around jmps to fix. this is rare. - */ - while(bflag) { - if(debug['v']) - Bprint(&bso, "%5.2f span1\n", cputime()); - bflag = 0; - c = INITTEXT; - for(p = firstp; p != P; p = p->link) { - p->pc = c; - o = oplook(p); - if((o->type == 16 || o->type == 17) && p->cond) { - otxt = p->cond->pc - c; - if(otxt < -(1L<<16)+10 || otxt >= (1L<<15)-10) { - q = prg(); - q->link = p->link; - p->link = q; - q->as = ABR; - q->to.type = D_BRANCH; - q->cond = p->cond; - p->cond = q; - q = prg(); - q->link = p->link; - p->link = q; - q->as = ABR; - q->to.type = D_BRANCH; - q->cond = q->link->link; - addnop(p->link); - addnop(p); - bflag = 1; - } - } - m = o->size; - if(m == 0) { - if(p->as == ATEXT) { - curtext = p; - autosize = p->to.offset + 8; - if(p->from.sym != S) - p->from.sym->value = c; - continue; - } - if(p->as != ANOP) - diag("zero-width instruction\n%P", p); - continue; - } - c += m; - } - } - - c = rnd(c, 8); - - setext = lookup("etext", 0); - if(setext != S) { - setext->value = c; - textsize = c - INITTEXT; - } - if(INITRND) - INITDAT = rnd(c, INITRND); - if(debug['v']) - Bprint(&bso, "tsize = %llux\n", textsize); - Bflush(&bso); -} - -void -xdefine(char *p, int t, vlong v) -{ - Sym *s; - - s = lookup(p, 0); - if(s->type == 0 || s->type == SXREF) { - s->type = t; - s->value = v; - } -} - -vlong -vregoff(Adr *a) -{ - - instoffset = 0; - aclass(a); - return instoffset; -} - -long -regoff(Adr *a) -{ - return vregoff(a); -} - -int -isint32(vlong v) -{ - long l; - - l = v; - return (vlong)l == v; -} - -int -isuint32(uvlong v) -{ - ulong l; - - l = v; - return (uvlong)l == v; -} - -int -aclass(Adr *a) -{ - Sym *s; - int t; - - switch(a->type) { - case D_NONE: - return C_NONE; - - case D_REG: - return C_REG; - - case D_FREG: - return C_FREG; - - case D_CREG: - return C_CREG; - - case D_SPR: - if(a->offset == D_LR) - return C_LR; - if(a->offset == D_XER) - return C_XER; - if(a->offset == D_CTR) - return C_CTR; - return C_SPR; - - case D_DCR: - return C_SPR; - - case D_FPSCR: - return C_FPSCR; - - case D_MSR: - return C_MSR; - - case D_OREG: - switch(a->name) { - case D_EXTERN: - case D_STATIC: - if(a->sym == S) - break; - t = a->sym->type; - if(t == 0 || t == SXREF) { - diag("undefined external: %s in %s", - a->sym->name, TNAME); - a->sym->type = SDATA; - } - if(dlm){ - instoffset = a->sym->value + a->offset; - switch(a->sym->type){ - case STEXT: - case SLEAF: - case SCONST: - case SUNDEF: - break; - default: - instoffset += INITDAT; - } - return C_ADDR; - } - instoffset = a->sym->value + a->offset - BIG; - if(instoffset >= -BIG && instoffset < BIG) - return C_SEXT; - return C_LEXT; - case D_AUTO: - instoffset = autosize + a->offset; - if(instoffset >= -BIG && instoffset < BIG) - return C_SAUTO; - return C_LAUTO; - case D_PARAM: - instoffset = autosize + a->offset + 8L; - if(instoffset >= -BIG && instoffset < BIG) - return C_SAUTO; - return C_LAUTO; - case D_NONE: - instoffset = a->offset; - if(instoffset == 0) - return C_ZOREG; - if(instoffset >= -BIG && instoffset < BIG) - return C_SOREG; - return C_LOREG; - } - return C_GOK; - - case D_OPT: - instoffset = a->offset & 31L; - if(a->name == D_NONE) - return C_SCON; - return C_GOK; - - case D_CONST: - switch(a->name) { - - case D_NONE: - instoffset = a->offset; - consize: - if(instoffset >= 0) { - if(instoffset == 0) - return C_ZCON; - if(instoffset <= 0x7fff) - return C_SCON; - if(instoffset <= 0xffff) - return C_ANDCON; - if((instoffset & 0xffff) == 0 && isuint32(instoffset)) /* && (instoffset & (1<<31)) == 0) */ - return C_UCON; - if(isint32(instoffset) || isuint32(instoffset)) - return C_LCON; - return C_DCON; - } - if(instoffset >= -0x8000) - return C_ADDCON; - if((instoffset & 0xffff) == 0 && isint32(instoffset)) - return C_UCON; - if(isint32(instoffset)) - return C_LCON; - return C_DCON; - - case D_EXTERN: - case D_STATIC: - s = a->sym; - if(s == S) - break; - t = s->type; - if(t == 0 || t == SXREF) { - diag("undefined external: %s in %s", - s->name, TNAME); - s->type = SDATA; - } - if(s->type == STEXT || s->type == SLEAF || s->type == SUNDEF) { - instoffset = s->value + a->offset; - return C_LCON; - } - if(s->type == SCONST) { - instoffset = s->value + a->offset; - if(dlm) - return C_LCON; - goto consize; - } - if(!dlm){ - instoffset = s->value + a->offset - BIG; - if(instoffset >= -BIG && instoffset < BIG && instoffset != 0) - return C_SECON; - } - instoffset = s->value + a->offset + INITDAT; - if(dlm) - return C_LCON; - /* not sure why this barfs */ - return C_LCON; - /* - if(instoffset == 0) - return C_ZCON; - if(instoffset >= -0x8000 && instoffset <= 0xffff) - return C_SCON; - if((instoffset & 0xffff) == 0) - return C_UCON; - return C_LCON; - */ - - case D_AUTO: - instoffset = autosize + a->offset; - if(instoffset >= -BIG && instoffset < BIG) - return C_SACON; - return C_LACON; - - case D_PARAM: - instoffset = autosize + a->offset + 8L; - if(instoffset >= -BIG && instoffset < BIG) - return C_SACON; - return C_LACON; - } - return C_GOK; - - case D_BRANCH: - return C_SBRA; - } - return C_GOK; -} - -Optab* -oplook(Prog *p) -{ - int a1, a2, a3, a4, r; - char *c1, *c3, *c4; - Optab *o, *e; - - a1 = p->optab; - if(a1) - return optab+(a1-1); - a1 = p->from.class; - if(a1 == 0) { - a1 = aclass(&p->from) + 1; - p->from.class = a1; - } - a1--; - a3 = p->from3.class; - if(a3 == 0) { - a3 = aclass(&p->from3) + 1; - p->from3.class = a3; - } - a3--; - a4 = p->to.class; - if(a4 == 0) { - a4 = aclass(&p->to) + 1; - p->to.class = a4; - } - a4--; - a2 = C_NONE; - if(p->reg != NREG) - a2 = C_REG; - r = p->as; - o = oprange[r].start; - if(o == 0) - o = oprange[r].stop; /* just generate an error */ - e = oprange[r].stop; - c1 = xcmp[a1]; - c3 = xcmp[a3]; - c4 = xcmp[a4]; - for(; oa2 == a2) - if(c1[o->a1]) - if(c3[o->a3]) - if(c4[o->a4]) { - p->optab = (o-optab)+1; - return o; - } - diag("illegal combination %A %R %R %R %R", - p->as, a1, a2, a3, a4); - if(1||!debug['a']) - prasm(p); - if(o == 0) - errorexit(); - return o; -} - -int -cmp(int a, int b) -{ - - if(a == b) - return 1; - switch(a) { - case C_LCON: - if(b == C_ZCON || b == C_SCON || b == C_UCON || b == C_ADDCON || b == C_ANDCON) - return 1; - break; - case C_ADDCON: - if(b == C_ZCON || b == C_SCON) - return 1; - break; - case C_ANDCON: - if(b == C_ZCON || b == C_SCON) - return 1; - break; - case C_SPR: - if(b == C_LR || b == C_XER || b == C_CTR) - return 1; - break; - case C_UCON: - if(b == C_ZCON) - return 1; - break; - case C_SCON: - if(b == C_ZCON) - return 1; - break; - case C_LACON: - if(b == C_SACON) - return 1; - break; - case C_LBRA: - if(b == C_SBRA) - return 1; - break; - case C_LEXT: - if(b == C_SEXT) - return 1; - break; - case C_LAUTO: - if(b == C_SAUTO) - return 1; - break; - case C_REG: - if(b == C_ZCON) - return r0iszero; - break; - case C_LOREG: - if(b == C_ZOREG || b == C_SOREG) - return 1; - break; - case C_SOREG: - if(b == C_ZOREG) - return 1; - break; - - case C_ANY: - return 1; - } - return 0; -} - -int -ocmp(void *a1, void *a2) -{ - Optab *p1, *p2; - int n; - - p1 = a1; - p2 = a2; - n = p1->as - p2->as; - if(n) - return n; - n = p1->a1 - p2->a1; - if(n) - return n; - n = p1->a2 - p2->a2; - if(n) - return n; - n = p1->a3 - p2->a3; - if(n) - return n; - n = p1->a4 - p2->a4; - if(n) - return n; - return 0; -} - -void -buildop(void) -{ - int i, n, r; - - for(i=0; i subf Rd,ra,rb */ - oprange[ASUB] = oprange[r]; - oprange[ASUBCC] = oprange[r]; - oprange[ASUBV] = oprange[r]; - oprange[ASUBVCC] = oprange[r]; - oprange[ASUBCCC] = oprange[r]; - oprange[ASUBCV] = oprange[r]; - oprange[ASUBCVCC] = oprange[r]; - oprange[ASUBE] = oprange[r]; - oprange[ASUBECC] = oprange[r]; - oprange[ASUBEV] = oprange[r]; - oprange[ASUBEVCC] = oprange[r]; - break; - case ASYNC: - oprange[AISYNC] = oprange[r]; - oprange[APTESYNC] = oprange[r]; - oprange[ATLBSYNC] = oprange[r]; - break; - case ARLWMI: - oprange[ARLWMICC] = oprange[r]; - oprange[ARLWNM] = oprange[r]; - oprange[ARLWNMCC] = oprange[r]; - break; - case ARLDMI: - oprange[ARLDMICC] = oprange[r]; - break; - case ARLDC: - oprange[ARLDCCC] = oprange[r]; - break; - case ARLDCL: - oprange[ARLDCR] = oprange[r]; - oprange[ARLDCLCC] = oprange[r]; - oprange[ARLDCRCC] = oprange[r]; - break; - case AFMOVD: - oprange[AFMOVDCC] = oprange[r]; - oprange[AFMOVDU] = oprange[r]; - oprange[AFMOVS] = oprange[r]; - oprange[AFMOVSU] = oprange[r]; - break; - case AECIWX: - oprange[ALWAR] = oprange[r]; - break; - case ASYSCALL: /* just the op; flow of control */ - oprange[ARFI] = oprange[r]; - oprange[ARFCI] = oprange[r]; - oprange[ARFID] = oprange[r]; - oprange[AHRFID] = oprange[r]; - break; - case AMOVHBR: - oprange[AMOVWBR] = oprange[r]; - break; - case ASLBMFEE: - oprange[ASLBMFEV] = oprange[r]; - break; - case ATW: - oprange[ATD] = oprange[r]; - break; - case ATLBIE: - oprange[ASLBIE] = oprange[r]; - oprange[ATLBIEL] = oprange[r]; - break; - case AEIEIO: - oprange[ASLBIA] = oprange[r]; - break; - case ACMP: - oprange[ACMPW] = oprange[r]; - break; - case ACMPU: - oprange[ACMPWU] = oprange[r]; - break; - case AADD: - case AANDCC: /* and. Rb,Rs,Ra; andi. $uimm,Rs,Ra; andis. $uimm,Rs,Ra */ - case ALSW: - case AMOVW: /* load/store/move word with sign extension; special 32-bit move; move 32-bit literals */ - case AMOVWZ: /* load/store/move word with zero extension; move 32-bit literals */ - case AMOVD: /* load/store/move 64-bit values, including 32-bit literals with/without sign-extension */ - case AMOVB: /* macro: move byte with sign extension */ - case AMOVBU: /* macro: move byte with sign extension & update */ - case AMOVFL: - case AMULLW: /* op $s[,r2],r3; op r1[,r2],r3; no cc/v */ - case ASUBC: /* op r1,$s,r3; op r1[,r2],r3 */ - case ASTSW: - case ASLBMTE: - case AWORD: - case ADWORD: - case ANOP: - case ATEXT: - break; - } - } -} - enum{ ABSD = 0, ABSU = 1, -- cgit v1.2.1 From 27d0dd420436a9a2dd9ed8170a5ac5bb4958bee9 Mon Sep 17 00:00:00 2001 From: Shenghou Ma Date: Thu, 7 Aug 2014 15:13:25 -0400 Subject: [dev.power64] include/link.h, liblink: convert 9l functions to liblink This replaces CL 122990043. LGTM=rsc R=rsc, iant CC=golang-codereviews https://codereview.appspot.com/123010043 --- src/liblink/asm9.c | 934 ++++++++++++++++++------------------ src/liblink/list9.c | 250 ++++++---- src/liblink/obj9.c | 1299 ++++++++++++++++----------------------------------- 3 files changed, 1034 insertions(+), 1449 deletions(-) (limited to 'src/liblink') diff --git a/src/liblink/asm9.c b/src/liblink/asm9.c index 27ccb0a23..647e6f178 100644 --- a/src/liblink/asm9.c +++ b/src/liblink/asm9.c @@ -27,12 +27,38 @@ // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN // THE SOFTWARE. -// +build ignore +// Instruction layout. -#include "l.h" +#include +#include +#include +#include +#include "../cmd/9l/9.out.h" +#include "../pkg/runtime/stack.h" -Optab optab[] = +enum { + FuncAlign = 8, +}; + +enum { + r0iszero = 1, +}; + +typedef struct Optab Optab; + +struct Optab { + short as; + uchar a1; + uchar a2; + uchar a3; + uchar a4; + char type; + char size; + char param; +}; + +static Optab optab[] = { { ATEXT, C_LEXT, C_NONE, C_NONE, C_LCON, 0, 0, 0 }, { ATEXT, C_LEXT, C_REG, C_NONE, C_LCON, 0, 0, 0 }, { ATEXT, C_LEXT, C_NONE, C_LCON, C_LCON, 0, 0, 0 }, @@ -268,6 +294,8 @@ Optab optab[] = { AMOVHBR, C_REG, C_NONE, C_NONE, C_ZOREG, 44, 4, 0 }, { ASYSCALL, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0 }, + { ASYSCALL, C_REG, C_NONE, C_NONE, C_NONE, 77, 12, 0 }, + { ASYSCALL, C_SCON, C_NONE, C_NONE, C_NONE, 77, 12, 0 }, { ABEQ, C_NONE, C_NONE, C_NONE, C_SBRA, 16, 4, 0 }, { ABEQ, C_CREG, C_NONE, C_NONE, C_SBRA, 16, 4, 0 }, @@ -308,6 +336,7 @@ Optab optab[] = { ASYNC, C_NONE, C_NONE, C_NONE, C_NONE, 46, 4, 0 }, { AWORD, C_LCON, C_NONE, C_NONE, C_NONE, 40, 4, 0 }, { ADWORD, C_LCON, C_NONE, C_NONE, C_NONE, 31, 8, 0 }, + { ADWORD, C_DCON, C_NONE, C_NONE, C_NONE, 31, 8, 0 }, { AADDME, C_REG, C_NONE, C_NONE, C_REG, 47, 4, 0 }, @@ -399,58 +428,86 @@ Optab optab[] = { ALSW, C_ZOREG, C_NONE, C_NONE, C_REG, 45, 4, 0 }, { ALSW, C_ZOREG, C_NONE, C_LCON, C_REG, 42, 4, 0 }, + { AUNDEF, C_NONE, C_NONE, C_NONE, C_NONE, 78, 4, 0 }, + { AUSEFIELD, C_ADDR, C_NONE, C_NONE, C_NONE, 0, 0, 0 }, + { APCDATA, C_LCON, C_NONE, C_NONE, C_LCON, 0, 0, 0 }, + { AFUNCDATA, C_SCON, C_NONE, C_NONE, C_ADDR, 0, 0, 0 }, + + { ADUFFZERO, C_NONE, C_NONE, C_NONE, C_LBRA, 11, 4, 0 }, // same as ABR/ABL + { ADUFFCOPY, C_NONE, C_NONE, C_NONE, C_LBRA, 11, 4, 0 }, // same as ABR/ABL + { AXXX, C_NONE, C_NONE, C_NONE, C_NONE, 0, 4, 0 }, }; -#include "l.h" +static int ocmp(const void *, const void *); +static int cmp(int, int); +static void buildop(Link*); +static void prasm(Prog *); +static int isint32(vlong); +static int isuint32(uvlong); +static int aclass(Link*, Addr*); +static Optab* oplook(Link*, Prog*); +static void asmout(Link*, Prog*, Optab*, int32*); +static vlong vregoff(Link*, Addr*); +static int32 regoff(Link*, Addr*); +static int32 oprrr(Link*, int); +static int32 opirr(Link*, int); +static int32 opload(Link*, int); +static int32 opstore(Link*, int); +static int32 oploadx(Link*, int); +static int32 opstorex(Link*, int); +static int getmask(uchar*, uint32); +static void maskgen(Link*, Prog*, uchar*, uint32); +static int getmask64(uchar*, uvlong); +static void maskgen64(Link*, Prog*, uchar*, uvlong); +static uint32 loadu32(int, vlong); +static void addaddrreloc(Link*, LSym*, int*, int*); + +static struct +{ + Optab* start; + Optab* stop; +} oprange[ALAST]; + +static char xcmp[C_NCLASS][C_NCLASS]; + void -span(void) +span9(Link *ctxt, LSym *cursym) { - Prog *p, *q; - Sym *setext; + Prog *p; Optab *o; int m, bflag; - vlong c, otxt; + vlong c; + int32 out[6], i, j; + uchar *bp, *cast; + + p = cursym->text; + if(p == nil || p->link == nil) // handle external functions and ELF section symbols + return; + + if(oprange[AANDN].start == nil) + buildop(ctxt); - if(debug['v']) - Bprint(&bso, "%5.2f span\n", cputime()); - Bflush(&bso); + ctxt->cursym = cursym; bflag = 0; - c = INITTEXT; - otxt = c; - for(p = firstp; p != P; p = p->link) { + c = 0; + p->pc = c; + + for(p = p->link; p != nil; p = p->link) { + ctxt->curp = p; p->pc = c; - o = oplook(p); + o = oplook(ctxt, p); m = o->size; if(m == 0) { - if(p->as == ATEXT) { - curtext = p; - autosize = p->to.offset + 8; - if(p->from3.type == D_CONST) { - if(p->from3.offset & 3) - diag("illegal origin\n%P", p); - if(c > p->from3.offset) - diag("passed origin (#%llux)\n%P", c, p); - else - c = p->from3.offset; - p->pc = c; - } - if(p->from.sym != S) - p->from.sym->value = c; - /* need passes to resolve branches? */ - if(c-otxt >= (1L<<15)) - bflag = c; - otxt = c; - continue; - } - if(p->as != ANOP) - diag("zero-width instruction\n%P", p); + if(p->as != ANOP && p->as != AFUNCDATA && p->as != APCDATA) + ctxt->diag("zero-width instruction\n%P", p); continue; } c += m; } + cursym->size = c; /* * if any procedure is large enough to @@ -459,100 +516,93 @@ span(void) * around jmps to fix. this is rare. */ while(bflag) { - if(debug['v']) - Bprint(&bso, "%5.2f span1\n", cputime()); + if(ctxt->debugvlog) + Bprint(ctxt->bso, "%5.2f span1\n", cputime()); bflag = 0; - c = INITTEXT; - for(p = firstp; p != P; p = p->link) { + c = 0; + for(p = cursym->text; p != nil; p = p->link) { p->pc = c; - o = oplook(p); - if((o->type == 16 || o->type == 17) && p->cond) { - otxt = p->cond->pc - c; + o = oplook(ctxt, p); + +/* very large branches + if((o->type == 16 || o->type == 17) && p->pcond) { + otxt = p->pcond->pc - c; if(otxt < -(1L<<16)+10 || otxt >= (1L<<15)-10) { q = prg(); q->link = p->link; p->link = q; q->as = ABR; q->to.type = D_BRANCH; - q->cond = p->cond; - p->cond = q; + q->pcond = p->pcond; + p->pcond = q; q = prg(); q->link = p->link; p->link = q; q->as = ABR; q->to.type = D_BRANCH; - q->cond = q->link->link; + q->pcond = q->link->link; addnop(p->link); addnop(p); bflag = 1; } } +*/ m = o->size; if(m == 0) { - if(p->as == ATEXT) { - curtext = p; - autosize = p->to.offset + 8; - if(p->from.sym != S) - p->from.sym->value = c; - continue; - } - if(p->as != ANOP) - diag("zero-width instruction\n%P", p); + if(p->as != ANOP && p->as != AFUNCDATA && p->as != APCDATA) + ctxt->diag("zero-width instruction\n%P", p); continue; } c += m; } + cursym->size = c; } - c = rnd(c, 8); - - setext = lookup("etext", 0); - if(setext != S) { - setext->value = c; - textsize = c - INITTEXT; - } - if(INITRND) - INITDAT = rnd(c, INITRND); - if(debug['v']) - Bprint(&bso, "tsize = %llux\n", textsize); - Bflush(&bso); -} - -void -xdefine(char *p, int t, vlong v) -{ - Sym *s; + c += -c&(FuncAlign-1); + cursym->size = c; - s = lookup(p, 0); - if(s->type == 0 || s->type == SXREF) { - s->type = t; - s->value = v; + /* + * lay out the code, emitting code and data relocations. + */ + if(ctxt->tlsg == nil) + ctxt->tlsg = linklookup(ctxt, "runtime.tlsg", 0); + + p = cursym->text; + ctxt->autosize = (int32)(p->to.offset & 0xffffffffll) + 8; + symgrow(ctxt, cursym, cursym->size); + + bp = cursym->p; + for(p = p->link; p != nil; p = p->link) { + ctxt->pc = p->pc; + ctxt->curp = p; + o = oplook(ctxt, p); + if(o->size > 4*nelem(out)) + sysfatal("out array in span9 is too small, need at least %d for %P", o->size/4, p); + asmout(ctxt, p, o, out); + for(i=0; isize/4; i++) { + cast = (uchar*)&out[i]; + for(j=0; j<4; j++) + *bp++ = cast[inuxi4[j]]; + } } } -int +static int isint32(vlong v) { - long l; - - l = v; - return (vlong)l == v; + return (int32)v == v; } -int +static int isuint32(uvlong v) { - ulong l; - - l = v; - return (uvlong)l == v; + return (uint32)v == v; } -int -aclass(Adr *a) +static int +aclass(Link *ctxt, Addr *a) { - Sym *s; - int t; + LSym *s; switch(a->type) { case D_NONE: @@ -589,134 +639,86 @@ aclass(Adr *a) switch(a->name) { case D_EXTERN: case D_STATIC: - if(a->sym == S) + if(a->sym == nil) break; - t = a->sym->type; - if(t == 0 || t == SXREF) { - diag("undefined external: %s in %s", - a->sym->name, TNAME); - a->sym->type = SDATA; - } - if(dlm){ - instoffset = a->sym->value + a->offset; - switch(a->sym->type){ - case STEXT: - case SLEAF: - case SCONST: - case SUNDEF: - break; - default: - instoffset += INITDAT; - } + ctxt->instoffset = a->offset; + if(a->sym != nil) // use relocation return C_ADDR; - } - instoffset = a->sym->value + a->offset - BIG; - if(instoffset >= -BIG && instoffset < BIG) - return C_SEXT; return C_LEXT; case D_AUTO: - instoffset = autosize + a->offset; - if(instoffset >= -BIG && instoffset < BIG) + ctxt->instoffset = ctxt->autosize + a->offset; + if(ctxt->instoffset >= -BIG && ctxt->instoffset < BIG) return C_SAUTO; return C_LAUTO; case D_PARAM: - instoffset = autosize + a->offset + 8L; - if(instoffset >= -BIG && instoffset < BIG) + ctxt->instoffset = ctxt->autosize + a->offset + 8L; + if(ctxt->instoffset >= -BIG && ctxt->instoffset < BIG) return C_SAUTO; return C_LAUTO; case D_NONE: - instoffset = a->offset; - if(instoffset == 0) + ctxt->instoffset = a->offset; + if(ctxt->instoffset == 0) return C_ZOREG; - if(instoffset >= -BIG && instoffset < BIG) + if(ctxt->instoffset >= -BIG && ctxt->instoffset < BIG) return C_SOREG; return C_LOREG; } return C_GOK; case D_OPT: - instoffset = a->offset & 31L; + ctxt->instoffset = a->offset & 31L; if(a->name == D_NONE) return C_SCON; return C_GOK; case D_CONST: switch(a->name) { - case D_NONE: - instoffset = a->offset; + ctxt->instoffset = a->offset; consize: - if(instoffset >= 0) { - if(instoffset == 0) + if(ctxt->instoffset >= 0) { + if(ctxt->instoffset == 0) return C_ZCON; - if(instoffset <= 0x7fff) + if(ctxt->instoffset <= 0x7fff) return C_SCON; - if(instoffset <= 0xffff) + if(ctxt->instoffset <= 0xffff) return C_ANDCON; - if((instoffset & 0xffff) == 0 && isuint32(instoffset)) /* && (instoffset & (1<<31)) == 0) */ + if((ctxt->instoffset & 0xffff) == 0 && isuint32(ctxt->instoffset)) /* && (instoffset & (1<<31)) == 0) */ return C_UCON; - if(isint32(instoffset) || isuint32(instoffset)) + if(isint32(ctxt->instoffset) || isuint32(ctxt->instoffset)) return C_LCON; return C_DCON; } - if(instoffset >= -0x8000) + if(ctxt->instoffset >= -0x8000) return C_ADDCON; - if((instoffset & 0xffff) == 0 && isint32(instoffset)) + if((ctxt->instoffset & 0xffff) == 0 && isint32(ctxt->instoffset)) return C_UCON; - if(isint32(instoffset)) + if(isint32(ctxt->instoffset)) return C_LCON; return C_DCON; case D_EXTERN: case D_STATIC: s = a->sym; - if(s == S) + if(s == nil) break; - t = s->type; - if(t == 0 || t == SXREF) { - diag("undefined external: %s in %s", - s->name, TNAME); - s->type = SDATA; - } - if(s->type == STEXT || s->type == SLEAF || s->type == SUNDEF) { - instoffset = s->value + a->offset; - return C_LCON; - } if(s->type == SCONST) { - instoffset = s->value + a->offset; - if(dlm) - return C_LCON; + ctxt->instoffset = s->value + a->offset; goto consize; } - if(!dlm){ - instoffset = s->value + a->offset - BIG; - if(instoffset >= -BIG && instoffset < BIG && instoffset != 0) - return C_SECON; - } - instoffset = s->value + a->offset + INITDAT; - if(dlm) - return C_LCON; + ctxt->instoffset = s->value + a->offset; /* not sure why this barfs */ return C_LCON; - /* - if(instoffset == 0) - return C_ZCON; - if(instoffset >= -0x8000 && instoffset <= 0xffff) - return C_SCON; - if((instoffset & 0xffff) == 0) - return C_UCON; - return C_LCON; - */ case D_AUTO: - instoffset = autosize + a->offset; - if(instoffset >= -BIG && instoffset < BIG) + ctxt->instoffset = ctxt->autosize + a->offset; + if(ctxt->instoffset >= -BIG && ctxt->instoffset < BIG) return C_SACON; return C_LACON; case D_PARAM: - instoffset = autosize + a->offset + 8L; - if(instoffset >= -BIG && instoffset < BIG) + ctxt->instoffset = ctxt->autosize + a->offset + 8L; + if(ctxt->instoffset >= -BIG && ctxt->instoffset < BIG) return C_SACON; return C_LACON; } @@ -728,8 +730,14 @@ aclass(Adr *a) return C_GOK; } -Optab* -oplook(Prog *p) +static void +prasm(Prog *p) +{ + print("%P\n", p); +} + +static Optab* +oplook(Link *ctxt, Prog *p) { int a1, a2, a3, a4, r; char *c1, *c3, *c4; @@ -740,19 +748,19 @@ oplook(Prog *p) return optab+(a1-1); a1 = p->from.class; if(a1 == 0) { - a1 = aclass(&p->from) + 1; + a1 = aclass(ctxt, &p->from) + 1; p->from.class = a1; } a1--; a3 = p->from3.class; if(a3 == 0) { - a3 = aclass(&p->from3) + 1; + a3 = aclass(ctxt, &p->from3) + 1; p->from3.class = a3; } a3--; a4 = p->to.class; if(a4 == 0) { - a4 = aclass(&p->to) + 1; + a4 = aclass(ctxt, &p->to) + 1; p->to.class = a4; } a4--; @@ -775,16 +783,15 @@ oplook(Prog *p) p->optab = (o-optab)+1; return o; } - diag("illegal combination %A %R %R %R %R", + ctxt->diag("illegal combination %A %^ %^ %^ %^", p->as, a1, a2, a3, a4); - if(1||!debug['a']) - prasm(p); + prasm(p); if(o == 0) - errorexit(); + o = optab; return o; } -int +static int cmp(int a, int b) { @@ -850,10 +857,10 @@ cmp(int a, int b) return 0; } -int -ocmp(void *a1, void *a2) +static int +ocmp(const void *a1, const void *a2) { - Optab *p1, *p2; + const Optab *p1, *p2; int n; p1 = a1; @@ -876,8 +883,8 @@ ocmp(void *a1, void *a2) return 0; } -void -buildop(void) +static void +buildop(Link *ctxt) { int i, n, r; @@ -898,8 +905,8 @@ buildop(void) switch(r) { default: - diag("unknown op in build: %A", r); - errorexit(); + ctxt->diag("unknown op in build: %A", r); + sysfatal("bad code"); case ADCBF: /* unary indexed: op (b+a); op (b) */ oprange[ADCBI] = oprange[r]; oprange[ADCBST] = oprange[r]; @@ -910,6 +917,7 @@ buildop(void) break; case AECOWX: /* indexed store: op s,(b+a); op s,(b) */ oprange[ASTWCCC] = oprange[r]; + oprange[ASTDCCC] = oprange[r]; break; case AREM: /* macro */ oprange[AREMCC] = oprange[r]; @@ -1188,6 +1196,7 @@ buildop(void) break; case AECIWX: oprange[ALWAR] = oprange[r]; + oprange[ALDAR] = oprange[r]; break; case ASYSCALL: /* just the op; flow of control */ oprange[ARFI] = oprange[r]; @@ -1234,13 +1243,17 @@ buildop(void) case ADWORD: case ANOP: case ATEXT: + case AUNDEF: + case AUSEFIELD: + case AFUNCDATA: + case APCDATA: + case ADUFFZERO: + case ADUFFCOPY: break; } } } -#include "l.h" - #define OPVCC(o,xo,oe,rc) (((o)<<26)|((xo)<<1)|((oe)<<10)|((rc)&1)) #define OPCC(o,xo,rc) OPVCC((o),(xo),0,(rc)) #define OP(o,xo) OPVCC((o),(xo),0,0) @@ -1293,18 +1306,30 @@ buildop(void) #define oclass(v) ((v).class-1) -long oprrr(int), opirr(int), opload(int), opstore(int), oploadx(int), opstorex(int); +// add R_ADDRPOWER relocation to symbol s for the two instructions o1 and o2. +static void +addaddrreloc(Link *ctxt, LSym *s, int *o1, int *o2) +{ + Reloc *rel; + + rel = addrel(ctxt->cursym); + rel->off = ctxt->pc; + rel->siz = 8; + rel->sym = s; + rel->add = ((uvlong)*o1<<32) | (uint32)*o2; + rel->type = R_ADDRPOWER; +} /* * 32-bit masks */ -int -getmask(uchar *m, ulong v) +static int +getmask(uchar *m, uint32 v) { int i; m[0] = m[1] = 0; - if(v != ~0L && v & (1<<31) && v & 1){ /* MB > ME */ + if(v != ~0U && v & (1<<31) && v & 1){ /* MB > ME */ if(getmask(m, ~v)){ i = m[0]; m[0] = m[1]+1; m[1] = i-1; return 1; @@ -1325,17 +1350,17 @@ getmask(uchar *m, ulong v) return 0; } -void -maskgen(Prog *p, uchar *m, ulong v) +static void +maskgen(Link *ctxt, Prog *p, uchar *m, uint32 v) { if(!getmask(m, v)) - diag("cannot generate mask #%lux\n%P", v, p); + ctxt->diag("cannot generate mask #%lux\n%P", v, p); } /* * 64-bit masks (rldic etc) */ -int +static int getmask64(uchar *m, uvlong v) { int i; @@ -1355,78 +1380,54 @@ getmask64(uchar *m, uvlong v) return 0; } -void -maskgen64(Prog *p, uchar *m, uvlong v) -{ - if(!getmask64(m, v)) - diag("cannot generate mask #%llux\n%P", v, p); -} - static void -reloc(Adr *a, long pc, int sext) +maskgen64(Link *ctxt, Prog *p, uchar *m, uvlong v) { - if(a->name == D_EXTERN || a->name == D_STATIC) - dynreloc(a->sym, pc, 1, 1, sext); + if(!getmask64(m, v)) + ctxt->diag("cannot generate mask #%llux\n%P", v, p); } -static ulong +static uint32 loadu32(int r, vlong d) { - long v; + int32 v; v = d>>16; if(isuint32(d)) return LOP_IRR(OP_ORIS, r, REGZERO, v); return AOP_IRR(OP_ADDIS, r, REGZERO, v); } - -int -asmout(Prog *p, Optab *o, int aflag) + +static void +asmout(Link *ctxt, Prog *p, Optab *o, int32 *out) { - long o1, o2, o3, o4, o5, v, t; + int32 o1, o2, o3, o4, o5, v, t; vlong d; - Prog *ct; int r, a; uchar mask[2]; + Reloc *rel; o1 = 0; o2 = 0; o3 = 0; o4 = 0; o5 = 0; + switch(o->type) { default: - if(aflag) - return 0; - diag("unknown type %d", o->type); - if(!debug['a']) - prasm(p); + ctxt->diag("unknown type %d", o->type); + prasm(p); break; case 0: /* pseudo ops */ - if(aflag) { - if(p->link) { - if(p->as == ATEXT) { - ct = curtext; - o2 = autosize; - curtext = p; - autosize = p->to.offset + 8; - o1 = asmout(p->link, oplook(p->link), aflag); - curtext = ct; - autosize = o2; - } else - o1 = asmout(p->link, oplook(p->link), aflag); - } - return o1; - } break; case 1: /* mov r1,r2 ==> OR Rs,Rs,Ra */ if(p->to.reg == REGZERO && p->from.type == D_CONST) { - v = regoff(&p->from); + v = regoff(ctxt, &p->from); if(r0iszero && v != 0) { - nerrors--; - diag("literal operation on R0\n%P", p); + //nerrors--; + ctxt->diag("literal operation on R0\n%P", p); } o1 = LOP_IRR(OP_ADDI, REGZERO, REGZERO, v); break; @@ -1438,17 +1439,17 @@ asmout(Prog *p, Optab *o, int aflag) r = p->reg; if(r == NREG) r = p->to.reg; - o1 = AOP_RRR(oprrr(p->as), p->to.reg, r, p->from.reg); + o1 = AOP_RRR(oprrr(ctxt, p->as), p->to.reg, r, p->from.reg); break; case 3: /* mov $soreg/addcon/ucon, r ==> addis/addi $i,reg',r */ - d = vregoff(&p->from); + d = vregoff(ctxt, &p->from); v = d; r = p->from.reg; if(r == NREG) r = o->param; if(r0iszero && p->to.reg == 0 && (r != 0 || v != 0)) - diag("literal operation on R0\n%P", p); + ctxt->diag("literal operation on R0\n%P", p); a = OP_ADDI; if(o->a1 == C_UCON) { v >>= 16; @@ -1462,65 +1463,63 @@ asmout(Prog *p, Optab *o, int aflag) break; case 4: /* add/mul $scon,[r1],r2 */ - v = regoff(&p->from); + v = regoff(ctxt, &p->from); r = p->reg; if(r == NREG) r = p->to.reg; if(r0iszero && p->to.reg == 0) - diag("literal operation on R0\n%P", p); - o1 = AOP_IRR(opirr(p->as), p->to.reg, r, v); + ctxt->diag("literal operation on R0\n%P", p); + o1 = AOP_IRR(opirr(ctxt, p->as), p->to.reg, r, v); break; case 5: /* syscall */ - if(aflag) - return 0; - o1 = oprrr(p->as); + o1 = oprrr(ctxt, p->as); break; case 6: /* logical op Rb,[Rs,]Ra; no literal */ r = p->reg; if(r == NREG) r = p->to.reg; - o1 = LOP_RRR(oprrr(p->as), p->to.reg, r, p->from.reg); + o1 = LOP_RRR(oprrr(ctxt, p->as), p->to.reg, r, p->from.reg); break; case 7: /* mov r, soreg ==> stw o(r) */ r = p->to.reg; if(r == NREG) r = o->param; - v = regoff(&p->to); + v = regoff(ctxt, &p->to); if(p->to.type == D_OREG && p->reg != NREG) { if(v) - diag("illegal indexed instruction\n%P", p); - o1 = AOP_RRR(opstorex(p->as), p->from.reg, p->reg, r); + ctxt->diag("illegal indexed instruction\n%P", p); + o1 = AOP_RRR(opstorex(ctxt, p->as), p->from.reg, p->reg, r); } else - o1 = AOP_IRR(opstore(p->as), p->from.reg, r, v); + o1 = AOP_IRR(opstore(ctxt, p->as), p->from.reg, r, v); break; case 8: /* mov soreg, r ==> lbz/lhz/lwz o(r) */ r = p->from.reg; if(r == NREG) r = o->param; - v = regoff(&p->from); + v = regoff(ctxt, &p->from); if(p->from.type == D_OREG && p->reg != NREG) { if(v) - diag("illegal indexed instruction\n%P", p); - o1 = AOP_RRR(oploadx(p->as), p->to.reg, p->reg, r); + ctxt->diag("illegal indexed instruction\n%P", p); + o1 = AOP_RRR(oploadx(ctxt, p->as), p->to.reg, p->reg, r); } else - o1 = AOP_IRR(opload(p->as), p->to.reg, r, v); + o1 = AOP_IRR(opload(ctxt, p->as), p->to.reg, r, v); break; case 9: /* movb soreg, r ==> lbz o(r),r2; extsb r2,r2 */ r = p->from.reg; if(r == NREG) r = o->param; - v = regoff(&p->from); + v = regoff(ctxt, &p->from); if(p->from.type == D_OREG && p->reg != NREG) { if(v) - diag("illegal indexed instruction\n%P", p); - o1 = AOP_RRR(oploadx(p->as), p->to.reg, p->reg, r); + ctxt->diag("illegal indexed instruction\n%P", p); + o1 = AOP_RRR(oploadx(ctxt, p->as), p->to.reg, p->reg, r); } else - o1 = AOP_IRR(opload(p->as), p->to.reg, r, v); + o1 = AOP_IRR(opload(ctxt, p->as), p->to.reg, r, v); o2 = LOP_RRR(OP_EXTSB, p->to.reg, p->to.reg, 0); break; @@ -1528,36 +1527,37 @@ asmout(Prog *p, Optab *o, int aflag) r = p->reg; if(r == NREG) r = p->to.reg; - o1 = AOP_RRR(oprrr(p->as), p->to.reg, p->from.reg, r); + o1 = AOP_RRR(oprrr(ctxt, p->as), p->to.reg, p->from.reg, r); break; case 11: /* br/bl lbra */ - if(aflag) - return 0; v = 0; - if(p->cond == UP){ - if(p->to.sym->type != SUNDEF) - diag("bad branch sym type"); - v = (ulong)p->to.sym->value >> (Roffset-2); - dynreloc(p->to.sym, p->pc, 0, 0, 0); + if(p->pcond) { + v = p->pcond->pc - p->pc; + if(v & 03) { + ctxt->diag("odd branch target address\n%P", p); + v &= ~03; + } + if(v < -(1L<<25) || v >= (1L<<24)) + ctxt->diag("branch too far\n%P", p); } - else if(p->cond) - v = p->cond->pc - p->pc; - if(v & 03) { - diag("odd branch target address\n%P", p); - v &= ~03; + o1 = OP_BR(opirr(ctxt, p->as), v, 0); + if(p->to.sym != nil) { + rel = addrel(ctxt->cursym); + rel->off = ctxt->pc; + rel->siz = 4; + rel->sym = p->to.sym; + v += p->to.offset; + rel->add = o1 | ((v & 0x03FFFFFC) >> 2); + rel->type = R_CALLPOWER; } - if(v < -(1L<<25) || v >= (1L<<24)) - diag("branch too far\n%P", p); - o1 = OP_BR(opirr(p->as), v, 0); break; case 12: /* movb r,r (extsb); movw r,r (extsw) */ if(p->to.reg == REGZERO && p->from.type == D_CONST) { - v = regoff(&p->from); + v = regoff(ctxt, &p->from); if(r0iszero && v != 0) { - nerrors--; - diag("literal operation on R0\n%P", p); + ctxt->diag("literal operation on R0\n%P", p); } o1 = LOP_IRR(OP_ADDI, REGZERO, REGZERO, v); break; @@ -1578,31 +1578,31 @@ asmout(Prog *p, Optab *o, int aflag) else if(p->as == AMOVWZ) o1 = OP_RLW(OP_RLDIC, p->to.reg, p->from.reg, 0, 0, 0) | (1<<5); /* MB=32 */ else - diag("internal: bad mov[bhw]z\n%P", p); + ctxt->diag("internal: bad mov[bhw]z\n%P", p); break; case 14: /* rldc[lr] Rb,Rs,$mask,Ra -- left, right give different masks */ r = p->reg; if(r == NREG) r = p->to.reg; - d = vregoff(&p->from3); - maskgen64(p, mask, d); + d = vregoff(ctxt, &p->from3); + maskgen64(ctxt, p, mask, d); switch(p->as){ case ARLDCL: case ARLDCLCC: a = mask[0]; /* MB */ if(mask[1] != 63) - diag("invalid mask for rotate: %llux (end != bit 63)\n%P", d, p); + ctxt->diag("invalid mask for rotate: %llux (end != bit 63)\n%P", d, p); break; case ARLDCR: case ARLDCRCC: a = mask[1]; /* ME */ if(mask[0] != 0) - diag("invalid mask for rotate: %llux (start != 0)\n%P", d, p); + ctxt->diag("invalid mask for rotate: %llux (start != 0)\n%P", d, p); break; default: - diag("unexpected op in rldc case\n%P", p); + ctxt->diag("unexpected op in rldc case\n%P", p); a = 0; } - o1 = LOP_RRR(oprrr(p->as), p->to.reg, r, p->from.reg); + o1 = LOP_RRR(oprrr(ctxt, p->as), p->to.reg, r, p->from.reg); o1 |= (a&31L)<<6; if(a & 0x20) o1 |= 1<<5; /* mb[5] is top bit */ @@ -1610,31 +1610,27 @@ asmout(Prog *p, Optab *o, int aflag) case 17: /* bc bo,bi,lbra (same for now) */ case 16: /* bc bo,bi,sbra */ - if(aflag) - return 0; a = 0; if(p->from.type == D_CONST) - a = regoff(&p->from); + a = regoff(ctxt, &p->from); r = p->reg; if(r == NREG) r = 0; v = 0; - if(p->cond) - v = p->cond->pc - p->pc; + if(p->pcond) + v = p->pcond->pc - p->pc; if(v & 03) { - diag("odd branch target address\n%P", p); + ctxt->diag("odd branch target address\n%P", p); v &= ~03; } if(v < -(1L<<16) || v >= (1L<<15)) - diag("branch too far\n%P", p); - o1 = OP_BC(opirr(p->as), a, r, v, 0); + ctxt->diag("branch too far\n%P", p); + o1 = OP_BC(opirr(ctxt, p->as), a, r, v, 0); break; case 15: /* br/bl (r) => mov r,lr; br/bl (lr) */ - if(aflag) - return 0; if(p->as == ABC || p->as == ABCL) - v = regoff(&p->to)&31L; + v = regoff(ctxt, &p->to)&31L; else v = 20; /* unconditional */ r = p->reg; @@ -1648,10 +1644,8 @@ asmout(Prog *p, Optab *o, int aflag) break; case 18: /* br/bl (lr/ctr); bc/bcl bo,bi,(lr/ctr) */ - if(aflag) - return 0; if(p->as == ABC || p->as == ABCL) - v = regoff(&p->from)&31L; + v = regoff(ctxt, &p->from)&31L; else v = 20; /* unconditional */ r = p->reg; @@ -1665,7 +1659,7 @@ asmout(Prog *p, Optab *o, int aflag) o1 = OPVCC(19, 16, 0, 0); break; default: - diag("bad optab entry (18): %d\n%P", p->to.class, p); + ctxt->diag("bad optab entry (18): %d\n%P", p->to.class, p); v = 0; } if(p->as == ABL || p->as == ABCL) @@ -1674,54 +1668,61 @@ asmout(Prog *p, Optab *o, int aflag) break; case 19: /* mov $lcon,r ==> cau+or */ - d = vregoff(&p->from); - o1 = loadu32(p->to.reg, d); - o2 = LOP_IRR(OP_ORI, p->to.reg, p->to.reg, (long)d); - if(dlm) - reloc(&p->from, p->pc, 0); + d = vregoff(ctxt, &p->from); + if(p->from.sym == nil) { + o1 = loadu32(p->to.reg, d); + o2 = LOP_IRR(OP_ORI, p->to.reg, p->to.reg, (int32)d); + } else { + o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, (d>>16)+(d&0x8000)?1:0); + o2 = AOP_IRR(OP_ADDI, p->to.reg, REGTMP, d); + addaddrreloc(ctxt, p->from.sym, &o1, &o2); + } + //if(dlm) reloc(&p->from, p->pc, 0); break; case 20: /* add $ucon,,r */ - v = regoff(&p->from); + v = regoff(ctxt, &p->from); r = p->reg; if(r == NREG) r = p->to.reg; if(p->as == AADD && (!r0iszero && p->reg == 0 || r0iszero && p->to.reg == 0)) - diag("literal operation on R0\n%P", p); - o1 = AOP_IRR(opirr(p->as+AEND), p->to.reg, r, v>>16); + ctxt->diag("literal operation on R0\n%P", p); + o1 = AOP_IRR(opirr(ctxt, p->as+AEND), p->to.reg, r, v>>16); break; case 22: /* add $lcon,r1,r2 ==> cau+or+add */ /* could do add/sub more efficiently */ if(p->to.reg == REGTMP || p->reg == REGTMP) - diag("cant synthesize large constant\n%P", p); - d = vregoff(&p->from); + ctxt->diag("cant synthesize large constant\n%P", p); + d = vregoff(ctxt, &p->from); o1 = loadu32(REGTMP, d); - o2 = LOP_IRR(OP_ORI, REGTMP, REGTMP, (long)d); + o2 = LOP_IRR(OP_ORI, REGTMP, REGTMP, (int32)d); r = p->reg; if(r == NREG) r = p->to.reg; - o3 = AOP_RRR(oprrr(p->as), p->to.reg, REGTMP, r); - if(dlm) - reloc(&p->from, p->pc, 0); + o3 = AOP_RRR(oprrr(ctxt, p->as), p->to.reg, REGTMP, r); + if(p->from.sym != nil) + ctxt->diag("%P is not supported", p); + //if(dlm) reloc(&p->from, p->pc, 0); break; case 23: /* and $lcon,r1,r2 ==> cau+or+and */ /* masks could be done using rlnm etc. */ if(p->to.reg == REGTMP || p->reg == REGTMP) - diag("cant synthesize large constant\n%P", p); - d = vregoff(&p->from); + ctxt->diag("cant synthesize large constant\n%P", p); + d = vregoff(ctxt, &p->from); o1 = loadu32(REGTMP, d); - o2 = LOP_IRR(OP_ORI, REGTMP, REGTMP, (long)d); + o2 = LOP_IRR(OP_ORI, REGTMP, REGTMP, (int32)d); r = p->reg; if(r == NREG) r = p->to.reg; - o3 = LOP_RRR(oprrr(p->as), p->to.reg, REGTMP, r); - if(dlm) - reloc(&p->from, p->pc, 0); + o3 = LOP_RRR(oprrr(ctxt, p->as), p->to.reg, REGTMP, r); + if(p->from.sym != nil) + ctxt->diag("%P is not supported", p); + //if(dlm) reloc(&p->from, p->pc, 0); break; /*24*/ case 25: /* sld[.] $sh,rS,rA -> rldicr[.] $sh,rS,mask(0,63-sh),rA; srd[.] -> rldicl */ - v = regoff(&p->from); + v = regoff(ctxt, &p->from); if(v < 0) v = 0; else if(v > 63) @@ -1740,7 +1741,7 @@ asmout(Prog *p, Optab *o, int aflag) o1 = OP_RLDICL; break; default: - diag("unexpected op in sldi case\n%P", p); + ctxt->diag("unexpected op in sldi case\n%P", p); a = 0; o1 = 0; } @@ -1756,8 +1757,8 @@ asmout(Prog *p, Optab *o, int aflag) case 26: /* mov $lsext/auto/oreg,,r2 ==> addis+addi */ if(p->to.reg == REGTMP) - diag("can't synthesize large constant\n%P", p); - v = regoff(&p->from); + ctxt->diag("can't synthesize large constant\n%P", p); + v = regoff(ctxt, &p->from); if(v & 0x8000L) v += 0x10000L; r = p->from.reg; @@ -1768,47 +1769,48 @@ asmout(Prog *p, Optab *o, int aflag) break; case 27: /* subc ra,$simm,rd => subfic rd,ra,$simm */ - v = regoff(&p->from3); + v = regoff(ctxt, &p->from3); r = p->from.reg; - o1 = AOP_IRR(opirr(p->as), p->to.reg, r, v); + o1 = AOP_IRR(opirr(ctxt, p->as), p->to.reg, r, v); break; case 28: /* subc r1,$lcon,r2 ==> cau+or+subfc */ if(p->to.reg == REGTMP || p->from.reg == REGTMP) - diag("can't synthesize large constant\n%P", p); - v = regoff(&p->from3); + ctxt->diag("can't synthesize large constant\n%P", p); + v = regoff(ctxt, &p->from3); o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, v>>16); o2 = LOP_IRR(OP_ORI, REGTMP, REGTMP, v); - o3 = AOP_RRR(oprrr(p->as), p->to.reg, p->from.reg, REGTMP); - if(dlm) - reloc(&p->from3, p->pc, 0); + o3 = AOP_RRR(oprrr(ctxt, p->as), p->to.reg, p->from.reg, REGTMP); + if(p->from.sym != nil) + ctxt->diag("%P is not supported", p); + //if(dlm) reloc(&p->from3, p->pc, 0); break; case 29: /* rldic[lr]? $sh,s,$mask,a -- left, right, plain give different masks */ - v = regoff(&p->from); - d = vregoff(&p->from3); - maskgen64(p, mask, d); + v = regoff(ctxt, &p->from); + d = vregoff(ctxt, &p->from3); + maskgen64(ctxt, p, mask, d); switch(p->as){ case ARLDC: case ARLDCCC: a = mask[0]; /* MB */ if(mask[1] != (63-v)) - diag("invalid mask for shift: %llux (shift %ld)\n%P", d, v, p); + ctxt->diag("invalid mask for shift: %llux (shift %ld)\n%P", d, v, p); break; case ARLDCL: case ARLDCLCC: a = mask[0]; /* MB */ if(mask[1] != 63) - diag("invalid mask for shift: %llux (shift %ld)\n%P", d, v, p); + ctxt->diag("invalid mask for shift: %llux (shift %ld)\n%P", d, v, p); break; case ARLDCR: case ARLDCRCC: a = mask[1]; /* ME */ if(mask[0] != 0) - diag("invalid mask for shift: %llux (shift %ld)\n%P", d, v, p); + ctxt->diag("invalid mask for shift: %llux (shift %ld)\n%P", d, v, p); break; default: - diag("unexpected op in rldic case\n%P", p); + ctxt->diag("unexpected op in rldic case\n%P", p); a = 0; } - o1 = AOP_RRR(opirr(p->as), p->reg, p->to.reg, (v&0x1F)); + o1 = AOP_RRR(opirr(ctxt, p->as), p->reg, p->to.reg, (v&0x1F)); o1 |= (a&31L)<<6; if(v & 0x20) o1 |= 1<<1; @@ -1817,12 +1819,12 @@ asmout(Prog *p, Optab *o, int aflag) break; case 30: /* rldimi $sh,s,$mask,a */ - v = regoff(&p->from); - d = vregoff(&p->from3); - maskgen64(p, mask, d); + v = regoff(ctxt, &p->from); + d = vregoff(ctxt, &p->from3); + maskgen64(ctxt, p, mask, d); if(mask[1] != (63-v)) - diag("invalid mask for shift: %llux (shift %ld)\n%P", d, v, p); - o1 = AOP_RRR(opirr(p->as), p->reg, p->to.reg, (v&0x1F)); + ctxt->diag("invalid mask for shift: %llux (shift %ld)\n%P", d, v, p); + o1 = AOP_RRR(opirr(ctxt, p->as), p->reg, p->to.reg, (v&0x1F)); o1 |= (mask[0]&31L)<<6; if(v & 0x20) o1 |= 1<<1; @@ -1831,130 +1833,140 @@ asmout(Prog *p, Optab *o, int aflag) break; case 31: /* dword */ - if(aflag) - return 0; - d = vregoff(&p->from); - o1 = d>>32; - o2 = d; + d = vregoff(ctxt, &p->from); + if(ctxt->arch->endian == BigEndian) { + o1 = d>>32; + o2 = d; + } else { + o1 = d; + o2 = d>>32; + } + if(p->from.sym != nil) { + rel = addrel(ctxt->cursym); + rel->off = ctxt->pc; + rel->siz = 8; + rel->sym = p->from.sym; + rel->add = p->from.offset; + rel->type = R_ADDR; + o1 = o2 = 0; + } break; case 32: /* fmul frc,fra,frd */ r = p->reg; if(r == NREG) r = p->to.reg; - o1 = AOP_RRR(oprrr(p->as), p->to.reg, r, 0)|((p->from.reg&31L)<<6); + o1 = AOP_RRR(oprrr(ctxt, p->as), p->to.reg, r, 0)|((p->from.reg&31L)<<6); break; case 33: /* fabs [frb,]frd; fmr. frb,frd */ r = p->from.reg; if(oclass(p->from) == C_NONE) r = p->to.reg; - o1 = AOP_RRR(oprrr(p->as), p->to.reg, 0, r); + o1 = AOP_RRR(oprrr(ctxt, p->as), p->to.reg, 0, r); break; case 34: /* FMADDx fra,frb,frc,frd (d=a*b+c); FSELx a<0? (d=b): (d=c) */ - o1 = AOP_RRR(oprrr(p->as), p->to.reg, p->from.reg, p->reg)|((p->from3.reg&31L)<<6); + o1 = AOP_RRR(oprrr(ctxt, p->as), p->to.reg, p->from.reg, p->reg)|((p->from3.reg&31L)<<6); break; case 35: /* mov r,lext/lauto/loreg ==> cau $(v>>16),sb,r'; store o(r') */ - v = regoff(&p->to); + v = regoff(ctxt, &p->to); if(v & 0x8000L) v += 0x10000L; r = p->to.reg; if(r == NREG) r = o->param; o1 = AOP_IRR(OP_ADDIS, REGTMP, r, v>>16); - o2 = AOP_IRR(opstore(p->as), p->from.reg, REGTMP, v); + o2 = AOP_IRR(opstore(ctxt, p->as), p->from.reg, REGTMP, v); break; case 36: /* mov bz/h/hz lext/lauto/lreg,r ==> lbz/lha/lhz etc */ - v = regoff(&p->from); + v = regoff(ctxt, &p->from); if(v & 0x8000L) v += 0x10000L; r = p->from.reg; if(r == NREG) r = o->param; o1 = AOP_IRR(OP_ADDIS, REGTMP, r, v>>16); - o2 = AOP_IRR(opload(p->as), p->to.reg, REGTMP, v); + o2 = AOP_IRR(opload(ctxt, p->as), p->to.reg, REGTMP, v); break; case 37: /* movb lext/lauto/lreg,r ==> lbz o(reg),r; extsb r */ - v = regoff(&p->from); + v = regoff(ctxt, &p->from); if(v & 0x8000L) v += 0x10000L; r = p->from.reg; if(r == NREG) r = o->param; o1 = AOP_IRR(OP_ADDIS, REGTMP, r, v>>16); - o2 = AOP_IRR(opload(p->as), p->to.reg, REGTMP, v); + o2 = AOP_IRR(opload(ctxt, p->as), p->to.reg, REGTMP, v); o3 = LOP_RRR(OP_EXTSB, p->to.reg, p->to.reg, 0); break; case 40: /* word */ - if(aflag) - return 0; - o1 = regoff(&p->from); + o1 = regoff(ctxt, &p->from); break; case 41: /* stswi */ - o1 = AOP_RRR(opirr(p->as), p->from.reg, p->to.reg, 0) | ((regoff(&p->from3)&0x7F)<<11); + o1 = AOP_RRR(opirr(ctxt, p->as), p->from.reg, p->to.reg, 0) | ((regoff(ctxt, &p->from3)&0x7F)<<11); break; case 42: /* lswi */ - o1 = AOP_RRR(opirr(p->as), p->to.reg, p->from.reg, 0) | ((regoff(&p->from3)&0x7F)<<11); + o1 = AOP_RRR(opirr(ctxt, p->as), p->to.reg, p->from.reg, 0) | ((regoff(ctxt, &p->from3)&0x7F)<<11); break; case 43: /* unary indexed source: dcbf (b); dcbf (a+b) */ r = p->reg; if(r == NREG) r = 0; - o1 = AOP_RRR(oprrr(p->as), 0, r, p->from.reg); + o1 = AOP_RRR(oprrr(ctxt, p->as), 0, r, p->from.reg); break; case 44: /* indexed store */ r = p->reg; if(r == NREG) r = 0; - o1 = AOP_RRR(opstorex(p->as), p->from.reg, r, p->to.reg); + o1 = AOP_RRR(opstorex(ctxt, p->as), p->from.reg, r, p->to.reg); break; case 45: /* indexed load */ r = p->reg; if(r == NREG) r = 0; - o1 = AOP_RRR(oploadx(p->as), p->to.reg, r, p->from.reg); + o1 = AOP_RRR(oploadx(ctxt, p->as), p->to.reg, r, p->from.reg); break; case 46: /* plain op */ - o1 = oprrr(p->as); + o1 = oprrr(ctxt, p->as); break; case 47: /* op Ra, Rd; also op [Ra,] Rd */ r = p->from.reg; if(r == NREG) r = p->to.reg; - o1 = AOP_RRR(oprrr(p->as), p->to.reg, r, 0); + o1 = AOP_RRR(oprrr(ctxt, p->as), p->to.reg, r, 0); break; case 48: /* op Rs, Ra */ r = p->from.reg; if(r == NREG) r = p->to.reg; - o1 = LOP_RRR(oprrr(p->as), p->to.reg, r, 0); + o1 = LOP_RRR(oprrr(ctxt, p->as), p->to.reg, r, 0); break; case 49: /* op Rb; op $n, Rb */ if(p->from.type != D_REG){ /* tlbie $L, rB */ - v = regoff(&p->from) & 1; - o1 = AOP_RRR(oprrr(p->as), 0, 0, p->to.reg) | (v<<21); + v = regoff(ctxt, &p->from) & 1; + o1 = AOP_RRR(oprrr(ctxt, p->as), 0, 0, p->to.reg) | (v<<21); }else - o1 = AOP_RRR(oprrr(p->as), 0, 0, p->from.reg); + o1 = AOP_RRR(oprrr(ctxt, p->as), 0, 0, p->from.reg); break; case 50: /* rem[u] r1[,r2],r3 */ r = p->reg; if(r == NREG) r = p->to.reg; - v = oprrr(p->as); + v = oprrr(ctxt, p->as); t = v & ((1<<10)|1); /* OE|Rc */ o1 = AOP_RRR(v&~t, REGTMP, r, p->from.reg); o2 = AOP_RRR(OP_MULLW, REGTMP, REGTMP, p->from.reg); @@ -1965,7 +1977,7 @@ asmout(Prog *p, Optab *o, int aflag) r = p->reg; if(r == NREG) r = p->to.reg; - v = oprrr(p->as); + v = oprrr(ctxt, p->as); t = v & ((1<<10)|1); /* OE|Rc */ o1 = AOP_RRR(v&~t, REGTMP, r, p->from.reg); o2 = AOP_RRR(OP_MULLD, REGTMP, REGTMP, p->from.reg); @@ -1973,8 +1985,8 @@ asmout(Prog *p, Optab *o, int aflag) break; case 52: /* mtfsbNx cr(n) */ - v = regoff(&p->from)&31L; - o1 = AOP_RRR(oprrr(p->as), v, 0, 0); + v = regoff(ctxt, &p->from)&31L; + o1 = AOP_RRR(oprrr(ctxt, p->as), v, 0, 0); break; case 53: /* mffsX ,fr1 */ @@ -1992,21 +2004,21 @@ asmout(Prog *p, Optab *o, int aflag) break; case 55: /* op Rb, Rd */ - o1 = AOP_RRR(oprrr(p->as), p->to.reg, 0, p->from.reg); + o1 = AOP_RRR(oprrr(ctxt, p->as), p->to.reg, 0, p->from.reg); break; case 56: /* sra $sh,[s,]a; srd $sh,[s,]a */ - v = regoff(&p->from); + v = regoff(ctxt, &p->from); r = p->reg; if(r == NREG) r = p->to.reg; - o1 = AOP_RRR(opirr(p->as), r, p->to.reg, v&31L); + o1 = AOP_RRR(opirr(ctxt, p->as), r, p->to.reg, v&31L); if(p->as == ASRAD && (v&0x20)) o1 |= 1<<1; /* mb[5] */ break; case 57: /* slw $sh,[s,]a -> rlwinm ... */ - v = regoff(&p->from); + v = regoff(ctxt, &p->from); r = p->reg; if(r == NREG) r = p->to.reg; @@ -2015,7 +2027,7 @@ asmout(Prog *p, Optab *o, int aflag) * qc has already complained. * if(v < 0 || v > 31) - diag("illegal shift %ld\n%P", v, p); + ctxt->diag("illegal shift %ld\n%P", v, p); */ if(v < 0) v = 0; @@ -2035,48 +2047,48 @@ asmout(Prog *p, Optab *o, int aflag) break; case 58: /* logical $andcon,[s],a */ - v = regoff(&p->from); + v = regoff(ctxt, &p->from); r = p->reg; if(r == NREG) r = p->to.reg; - o1 = LOP_IRR(opirr(p->as), p->to.reg, r, v); + o1 = LOP_IRR(opirr(ctxt, p->as), p->to.reg, r, v); break; case 59: /* or/and $ucon,,r */ - v = regoff(&p->from); + v = regoff(ctxt, &p->from); r = p->reg; if(r == NREG) r = p->to.reg; - o1 = LOP_IRR(opirr(p->as+AEND), p->to.reg, r, v>>16); /* oris, xoris, andis */ + o1 = LOP_IRR(opirr(ctxt, p->as+AEND), p->to.reg, r, v>>16); /* oris, xoris, andis */ break; case 60: /* tw to,a,b */ - r = regoff(&p->from)&31L; - o1 = AOP_RRR(oprrr(p->as), r, p->reg, p->to.reg); + r = regoff(ctxt, &p->from)&31L; + o1 = AOP_RRR(oprrr(ctxt, p->as), r, p->reg, p->to.reg); break; case 61: /* tw to,a,$simm */ - r = regoff(&p->from)&31L; - v = regoff(&p->to); - o1 = AOP_IRR(opirr(p->as), r, p->reg, v); + r = regoff(ctxt, &p->from)&31L; + v = regoff(ctxt, &p->to); + o1 = AOP_IRR(opirr(ctxt, p->as), r, p->reg, v); break; case 62: /* rlwmi $sh,s,$mask,a */ - v = regoff(&p->from); - maskgen(p, mask, regoff(&p->from3)); - o1 = AOP_RRR(opirr(p->as), p->reg, p->to.reg, v); + v = regoff(ctxt, &p->from); + maskgen(ctxt, p, mask, regoff(ctxt, &p->from3)); + o1 = AOP_RRR(opirr(ctxt, p->as), p->reg, p->to.reg, v); o1 |= ((mask[0]&31L)<<6)|((mask[1]&31L)<<1); break; case 63: /* rlwmi b,s,$mask,a */ - maskgen(p, mask, regoff(&p->from3)); - o1 = AOP_RRR(opirr(p->as), p->reg, p->to.reg, p->from.reg); + maskgen(ctxt, p, mask, regoff(ctxt, &p->from3)); + o1 = AOP_RRR(opirr(ctxt, p->as), p->reg, p->to.reg, p->from.reg); o1 |= ((mask[0]&31L)<<6)|((mask[1]&31L)<<1); break; case 64: /* mtfsf fr[, $m] {,fpcsr} */ if(p->from3.type != D_NONE) - v = regoff(&p->from3)&255L; + v = regoff(ctxt, &p->from3)&255L; else v = 255; o1 = OP_MTFSF | (v<<17) | (p->from.reg<<11); @@ -2084,8 +2096,8 @@ asmout(Prog *p, Optab *o, int aflag) case 65: /* MOVFL $imm,FPSCR(n) => mtfsfi crfd,imm */ if(p->to.reg == NREG) - diag("must specify FPSCR(n)\n%P", p); - o1 = OP_MTFSFI | ((p->to.reg&15L)<<23) | ((regoff(&p->from)&31L)<<12); + ctxt->diag("must specify FPSCR(n)\n%P", p); + o1 = OP_MTFSFI | ((p->to.reg&15L)<<23) | ((regoff(ctxt, &p->from)&31L)<<12); break; case 66: /* mov spr,r1; mov r1,spr, also dcr */ @@ -2110,7 +2122,7 @@ asmout(Prog *p, Optab *o, int aflag) case 67: /* mcrf crfD,crfS */ if(p->from.type != D_CREG || p->from.reg == NREG || p->to.type != D_CREG || p->to.reg == NREG) - diag("illegal CR field number\n%P", p); + ctxt->diag("illegal CR field number\n%P", p); o1 = AOP_RRR(OP_MCRF, ((p->to.reg&7L)<<2), ((p->from.reg&7)<<2), 0); break; @@ -2125,8 +2137,8 @@ asmout(Prog *p, Optab *o, int aflag) case 69: /* mtcrf CRM,rS */ if(p->from3.type != D_NONE) { if(p->to.reg != NREG) - diag("can't use both mask and CR(n)\n%P", p); - v = regoff(&p->from3) & 0xff; + ctxt->diag("can't use both mask and CR(n)\n%P", p); + v = regoff(ctxt, &p->from3) & 0xff; } else { if(p->to.reg == NREG) v = 0xff; /* CR */ @@ -2141,7 +2153,7 @@ asmout(Prog *p, Optab *o, int aflag) r = 0; else r = (p->reg&7)<<2; - o1 = AOP_RRR(oprrr(p->as), r, p->from.reg, p->to.reg); + o1 = AOP_RRR(oprrr(ctxt, p->as), r, p->from.reg, p->to.reg); break; case 71: /* cmp[l] r,i,cr*/ @@ -2149,50 +2161,77 @@ asmout(Prog *p, Optab *o, int aflag) r = 0; else r = (p->reg&7)<<2; - o1 = AOP_RRR(opirr(p->as), r, p->from.reg, 0) | (regoff(&p->to)&0xffff); + o1 = AOP_RRR(opirr(ctxt, p->as), r, p->from.reg, 0) | (regoff(ctxt, &p->to)&0xffff); break; case 72: /* slbmte (Rb+Rs -> slb[Rb]) -> Rs, Rb */ - o1 = AOP_RRR(oprrr(p->as), p->from.reg, 0, p->to.reg); + o1 = AOP_RRR(oprrr(ctxt, p->as), p->from.reg, 0, p->to.reg); break; case 73: /* mcrfs crfD,crfS */ if(p->from.type != D_FPSCR || p->from.reg == NREG || p->to.type != D_CREG || p->to.reg == NREG) - diag("illegal FPSCR/CR field number\n%P", p); + ctxt->diag("illegal FPSCR/CR field number\n%P", p); o1 = AOP_RRR(OP_MCRFS, ((p->to.reg&7L)<<2), ((p->from.reg&7)<<2), 0); break; + case 77: /* syscall $scon, syscall Rx */ + if(p->from.type == D_CONST) { + if(p->from.offset > BIG || p->from.offset < -BIG) + ctxt->diag("illegal syscall, sysnum too large: %P", p); + o1 = AOP_IRR(OP_ADDI, REGZERO, REGZERO, p->from.offset); + } else if(p->from.type == D_REG) { + o1 = LOP_RRR(OP_OR, REGZERO, p->from.reg, p->from.reg); + } else { + ctxt->diag("illegal syscall: %P", p); + o1 = 0x7fe00008; // trap always + } + o2 = oprrr(ctxt, p->as); + o3 = AOP_RRR(oprrr(ctxt, AXOR), REGZERO, REGZERO, REGZERO); // XOR R0, R0 + break; + + case 78: /* undef */ + o1 = 0; /* "An instruction consisting entirely of binary 0s is guaranteed + always to be an illegal instruction." */ + break; + /* relocation operations */ case 74: - v = regoff(&p->to); - o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, v>>16); - o2 = AOP_IRR(opstore(p->as), p->from.reg, REGTMP, v); - if(dlm) - reloc(&p->to, p->pc, 1); + v = regoff(ctxt, &p->to); + o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, (v>>16)+(v&0x8000)?1:0); + o2 = AOP_IRR(opstore(ctxt, p->as), p->from.reg, REGTMP, v); + addaddrreloc(ctxt, p->to.sym, &o1, &o2); + //if(dlm) reloc(&p->to, p->pc, 1); break; case 75: - v = regoff(&p->from); - o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, v>>16); - o2 = AOP_IRR(opload(p->as), p->to.reg, REGTMP, v); - if(dlm) - reloc(&p->from, p->pc, 1); + v = regoff(ctxt, &p->from); + o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, (v>>16)+(v&0x8000)?1:0); + o2 = AOP_IRR(opload(ctxt, p->as), p->to.reg, REGTMP, v); + addaddrreloc(ctxt, p->from.sym, &o1, &o2); + //if(dlm) reloc(&p->from, p->pc, 1); break; case 76: - v = regoff(&p->from); - o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, v>>16); - o2 = AOP_IRR(opload(p->as), p->to.reg, REGTMP, v); + v = regoff(ctxt, &p->from); + o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, (v>>16)+(v&0x8000)?1:0); + o2 = AOP_IRR(opload(ctxt, p->as), p->to.reg, REGTMP, v); + addaddrreloc(ctxt, p->from.sym, &o1, &o2); o3 = LOP_RRR(OP_EXTSB, p->to.reg, p->to.reg, 0); - if(dlm) - reloc(&p->from, p->pc, 1); + //if(dlm) reloc(&p->from, p->pc, 1); break; } - if(aflag) - return o1; + + out[0] = o1; + out[1] = o2; + out[2] = o3; + out[3] = o4; + out[4] = o5; + return; + +#if NOTDEF v = p->pc; switch(o->size) { default: @@ -2238,25 +2277,26 @@ asmout(Prog *p, Optab *o, int aflag) break; } return 0; +#endif } -vlong -vregoff(Adr *a) +static vlong +vregoff(Link *ctxt, Addr *a) { - instoffset = 0; - aclass(a); - return instoffset; + ctxt->instoffset = 0; + aclass(ctxt, a); + return ctxt->instoffset; } -long -regoff(Adr *a) +static int32 +regoff(Link *ctxt, Addr *a) { - return vregoff(a); + return vregoff(ctxt, a); } -long -oprrr(int a) +static int32 +oprrr(Link *ctxt, int a) { switch(a) { case AADD: return OPVCC(31,266,0,0); @@ -2531,12 +2571,12 @@ oprrr(int a) case AXOR: return OPVCC(31,316,0,0); case AXORCC: return OPVCC(31,316,0,1); } - diag("bad r/r opcode %A", a); + ctxt->diag("bad r/r opcode %A", a); return 0; } -long -opirr(int a) +static int32 +opirr(Link *ctxt, int a) { switch(a) { case AADD: return OPVCC(14,0,0,0); @@ -2602,15 +2642,15 @@ opirr(int a) case AXOR: return OPVCC(26,0,0,0); /* XORIL */ case AXOR+AEND: return OPVCC(27,0,0,0); /* XORIU */ } - diag("bad opcode i/r %A", a); + ctxt->diag("bad opcode i/r %A", a); return 0; } /* * load o(a),d */ -long -opload(int a) +static int32 +opload(Link *ctxt, int a) { switch(a) { case AMOVD: return OPVCC(58,0,0,0); /* ld */ @@ -2633,15 +2673,15 @@ opload(int a) case AMOVHZU: return OPVCC(41,0,0,0); case AMOVMW: return OPVCC(46,0,0,0); /* lmw */ } - diag("bad load opcode %A", a); + ctxt->diag("bad load opcode %A", a); return 0; } /* * indexed load a(b),d */ -long -oploadx(int a) +static int32 +oploadx(Link *ctxt, int a) { switch(a) { case AMOVWZ: return OPVCC(31,23,0,0); /* lwzx */ @@ -2664,19 +2704,20 @@ oploadx(int a) case AMOVHZU: return OPVCC(31,311,0,0); /* lhzux */ case AECIWX: return OPVCC(31,310,0,0); /* eciwx */ case ALWAR: return OPVCC(31,20,0,0); /* lwarx */ + case ALDAR: return OPVCC(31,84,0,0); case ALSW: return OPVCC(31,533,0,0); /* lswx */ case AMOVD: return OPVCC(31,21,0,0); /* ldx */ case AMOVDU: return OPVCC(31,53,0,0); /* ldux */ } - diag("bad loadx opcode %A", a); + ctxt->diag("bad loadx opcode %A", a); return 0; } /* * store s,o(d) */ -long -opstore(int a) +static int32 +opstore(Link *ctxt, int a) { switch(a) { case AMOVB: @@ -2700,15 +2741,15 @@ opstore(int a) case AMOVD: return OPVCC(62,0,0,0); /* std */ case AMOVDU: return OPVCC(62,0,0,1); /* stdu */ } - diag("unknown store opcode %A", a); + ctxt->diag("unknown store opcode %A", a); return 0; } /* * indexed store s,a(b) */ -long -opstorex(int a) +static int32 +opstorex(Link *ctxt, int a) { switch(a) { case AMOVB: @@ -2736,6 +2777,7 @@ opstorex(int a) case AMOVD: return OPVCC(31,149,0,0); /* stdx */ case AMOVDU: return OPVCC(31,181,0,0); /* stdux */ } - diag("unknown storex opcode %A", a); + ctxt->diag("unknown storex opcode %A", a); return 0; } + diff --git a/src/liblink/list9.c b/src/liblink/list9.c index f9de2bf11..3299d269a 100644 --- a/src/liblink/list9.c +++ b/src/liblink/list9.c @@ -27,29 +27,61 @@ // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN // THE SOFTWARE. -// +build ignore +#include +#include +#include +#include +#include "../cmd/9l/9.out.h" -#include "l.h" +enum +{ + STRINGSZ = 1000, +}; + +static int Aconv(Fmt*); +static int Dconv(Fmt*); +static int Pconv(Fmt*); +static int Rconv(Fmt*); +static int DSconv(Fmt*); +static int Mconv(Fmt*); +static int DRconv(Fmt*); + +// +// Format conversions +// %A int Opcodes (instruction mnemonics) +// +// %D Addr* Addresses (instruction operands) +// Flags: "%lD": seperate the high and low words of a constant by "-" +// +// %P Prog* Instructions +// +// %R int Registers +// +// %$ char* String constant addresses (for internal use only) +// %^ int C_* classes (for liblink internal use) + +#pragma varargck type "$" char* +#pragma varargck type "M" Addr* void -listinit(void) +listinit9(void) { - fmtinstall('A', Aconv); fmtinstall('D', Dconv); fmtinstall('P', Pconv); - fmtinstall('S', Sconv); - fmtinstall('N', Nconv); fmtinstall('R', Rconv); -} -void -prasm(Prog *p) -{ - print("%P\n", p); + // for liblink internal use + fmtinstall('^', DRconv); + + // for internal use + fmtinstall('$', DSconv); + fmtinstall('M', Mconv); } -int +static Prog* bigP; + +static int Pconv(Fmt *fp) { char str[STRINGSZ], *s; @@ -57,26 +89,36 @@ Pconv(Fmt *fp) int a; p = va_arg(fp->args, Prog*); - curp = p; + bigP = p; a = p->as; if(a == ADATA || a == AINIT || a == ADYNT) - sprint(str, "(%d) %A %D/%d,%D", p->line, a, &p->from, p->reg, &p->to); - else { + sprint(str, "%.5lld (%L) %A %D/%d,%D", p->pc, p->lineno, a, &p->from, p->reg, &p->to); + else if(a == ATEXT) { + if(p->reg != 0) + sprint(str, "%.5lld (%L) %A %D,%d,%lD", p->pc, p->lineno, a, &p->from, p->reg, &p->to); + else + sprint(str, "%.5lld (%L) %A %D,%lD", p->pc, p->lineno, a, &p->from, &p->to); + } else if(a == AGLOBL) { + if(p->reg != 0) + sprint(str, "%.5lld (%L) %A %D,%d,%D", p->pc, p->lineno, a, &p->from, p->reg, &p->to); + else + sprint(str, "%.5lld (%L) %A %D,%D", p->pc, p->lineno, a, &p->from, &p->to); + } else { s = str; if(p->mark & NOSCHED) s += sprint(s, "*"); if(p->reg == NREG && p->from3.type == D_NONE) - sprint(s, "(%d) %A %D,%D", p->line, a, &p->from, &p->to); + sprint(s, "%.5lld (%d) %A %D,%D", p->pc, p->lineno, a, &p->from, &p->to); else if(a != ATEXT && p->from.type == D_OREG) { - sprint(s, "(%d) %A %lld(R%d+R%d),%D", p->line, a, + sprint(s, "%.5lld (%d) %A %lld(R%d+R%d),%D", p->pc, p->lineno, a, p->from.offset, p->from.reg, p->reg, &p->to); } else if(p->to.type == D_OREG) { - sprint(s, "(%d) %A %D,%lld(R%d+R%d)", p->line, a, + sprint(s, "%.5lld (%d) %A %D,%lld(R%d+R%d)", p->pc, p->lineno, a, &p->from, p->to.offset, p->to.reg, p->reg); } else { - s += sprint(s, "(%d) %A %D", p->line, a, &p->from); + s += sprint(s, "%.5lld (%L) %A %D", p->pc, p->lineno, a, &p->from); if(p->reg != NREG) s += sprint(s, ",%c%d", p->from.type==D_FREG?'F':'R', p->reg); if(p->from3.type != D_NONE) @@ -87,7 +129,7 @@ Pconv(Fmt *fp) return fmtstrcpy(fp, str); } -int +static int Aconv(Fmt *fp) { char *s; @@ -96,55 +138,65 @@ Aconv(Fmt *fp) a = va_arg(fp->args, int); s = "???"; if(a >= AXXX && a < ALAST) - s = anames[a]; + s = anames9[a]; return fmtstrcpy(fp, s); } -int +static int Dconv(Fmt *fp) { char str[STRINGSZ]; - Adr *a; - long v; + Addr *a; + int32 v; - a = va_arg(fp->args, Adr*); - switch(a->type) { + a = va_arg(fp->args, Addr*); + if(fp->flags & FmtLong) { + if(a->type == D_CONST) + sprint(str, "$%d-%d", (int32)a->offset, (int32)(a->offset>>32)); + else { + // ATEXT dst is not constant + sprint(str, "!!%D", a); + } + goto ret; + } + + switch(a->type) { default: sprint(str, "GOK-type(%d)", a->type); break; case D_NONE: str[0] = 0; - if(a->name != D_NONE || a->reg != NREG || a->sym != S) - sprint(str, "%N(R%d)(NONE)", a, a->reg); + if(a->name != D_NONE || a->reg != NREG || a->sym != nil) + sprint(str, "%M(R%d)(NONE)", a, a->reg); break; case D_CONST: case D_DCONST: if(a->reg != NREG) - sprint(str, "$%N(R%d)", a, a->reg); + sprint(str, "$%M(R%d)", a, a->reg); else - sprint(str, "$%N", a); + sprint(str, "$%M", a); break; case D_OREG: if(a->reg != NREG) - sprint(str, "%N(R%d)", a, a->reg); + sprint(str, "%M(R%d)", a, a->reg); else - sprint(str, "%N", a); + sprint(str, "%M", a); break; case D_REG: sprint(str, "R%d", a->reg); - if(a->name != D_NONE || a->sym != S) - sprint(str, "%N(R%d)(REG)", a, a->reg); + if(a->name != D_NONE || a->sym != nil) + sprint(str, "%M(R%d)(REG)", a, a->reg); break; case D_FREG: sprint(str, "F%d", a->reg); - if(a->name != D_NONE || a->sym != S) - sprint(str, "%N(F%d)(REG)", a, a->reg); + if(a->name != D_NONE || a->sym != nil) + sprint(str, "%M(F%d)(REG)", a, a->reg); break; case D_CREG: @@ -152,12 +204,12 @@ Dconv(Fmt *fp) strcpy(str, "CR"); else sprint(str, "CR%d", a->reg); - if(a->name != D_NONE || a->sym != S) - sprint(str, "%N(C%d)(REG)", a, a->reg); + if(a->name != D_NONE || a->sym != nil) + sprint(str, "%M(C%d)(REG)", a, a->reg); break; case D_SPR: - if(a->name == D_NONE && a->sym == S) { + if(a->name == D_NONE && a->sym == nil) { switch((ulong)a->offset) { case D_XER: sprint(str, "XER"); break; case D_LR: sprint(str, "LR"); break; @@ -167,18 +219,18 @@ Dconv(Fmt *fp) break; } sprint(str, "SPR-GOK(%d)", a->reg); - if(a->name != D_NONE || a->sym != S) - sprint(str, "%N(SPR-GOK%d)(REG)", a, a->reg); + if(a->name != D_NONE || a->sym != nil) + sprint(str, "%M(SPR-GOK%d)(REG)", a, a->reg); break; case D_DCR: - if(a->name == D_NONE && a->sym == S) { + if(a->name == D_NONE && a->sym == nil) { sprint(str, "DCR(%lld)", a->offset); break; } sprint(str, "DCR-GOK(%d)", a->reg); - if(a->name != D_NONE || a->sym != S) - sprint(str, "%N(DCR-GOK%d)(REG)", a, a->reg); + if(a->name != D_NONE || a->sym != nil) + sprint(str, "%M(DCR-GOK%d)(REG)", a, a->reg); break; case D_OPT: @@ -197,57 +249,71 @@ Dconv(Fmt *fp) break; case D_BRANCH: - if(curp->cond != P) { - v = curp->cond->pc; - if(v >= INITTEXT) - v -= INITTEXT-HEADR; - if(a->sym != S) + if(bigP->pcond != nil) { + v = bigP->pcond->pc; + //if(v >= INITTEXT) + // v -= INITTEXT-HEADR; + if(a->sym != nil) sprint(str, "%s+%.5lux(BRANCH)", a->sym->name, v); else sprint(str, "%.5lux(BRANCH)", v); } else - if(a->sym != S) + if(a->sym != nil) sprint(str, "%s+%lld(APC)", a->sym->name, a->offset); else sprint(str, "%lld(APC)", a->offset); break; case D_FCONST: - sprint(str, "$%lux-%lux", a->ieee.h, a->ieee.l); + //sprint(str, "$%lux-%lux", a->ieee.h, a->ieee.l); + sprint(str, "$%.17g", a->u.dval); break; case D_SCONST: - sprint(str, "$\"%S\"", a->sval); + sprint(str, "$\"%$\"", a->u.sval); break; } + +ret: return fmtstrcpy(fp, str); } -int -Nconv(Fmt *fp) +static int +Mconv(Fmt *fp) { char str[STRINGSZ]; - Adr *a; - Sym *s; - long l; + Addr *a; + LSym *s; + int32 l; - a = va_arg(fp->args, Adr*); + a = va_arg(fp->args, Addr*); s = a->sym; - if(s == S) { + //if(s == nil) { + // l = a->offset; + // if((vlong)l != a->offset) + // sprint(str, "0x%llux", a->offset); + // else + // sprint(str, "%lld", a->offset); + // goto out; + //} + switch(a->name) { + default: + sprint(str, "GOK-name(%d)", a->name); + break; + + case D_NONE: l = a->offset; if((vlong)l != a->offset) sprint(str, "0x%llux", a->offset); else sprint(str, "%lld", a->offset); - goto out; - } - switch(a->name) { - default: - sprint(str, "GOK-name(%d)", a->name); break; case D_EXTERN: - sprint(str, "%s+%lld(SB)", s->name, a->offset); + if(a->offset != 0) + sprint(str, "%s+%lld(SB)", s->name, a->offset); + else + sprint(str, "%s(SB)", s->name, a->offset); break; case D_STATIC: @@ -255,19 +321,36 @@ Nconv(Fmt *fp) break; case D_AUTO: - sprint(str, "%s-%lld(SP)", s->name, -a->offset); + if(s == nil) + sprint(str, "%lld(SP)", -a->offset); + else + sprint(str, "%s-%lld(SP)", s->name, -a->offset); break; case D_PARAM: - sprint(str, "%s+%lld(FP)", s->name, a->offset); + if(s == nil) + sprint(str, "%lld(FP)", a->offset); + else + sprint(str, "%s+%lld(FP)", s->name, a->offset); break; } -out: +//out: return fmtstrcpy(fp, str); } -int +static int Rconv(Fmt *fp) +{ + char str[STRINGSZ]; + int r; + + r = va_arg(fp->args, int); + sprint(str, "r%d", r); + return fmtstrcpy(fp, str); +} + +static int +DRconv(Fmt *fp) { char *s; int a; @@ -275,19 +358,19 @@ Rconv(Fmt *fp) a = va_arg(fp->args, int); s = "C_??"; if(a >= C_NONE && a <= C_NCLASS) - s = cnames[a]; + s = cnames9[a]; return fmtstrcpy(fp, s); } -int -Sconv(Fmt *fp) +static int +DSconv(Fmt *fp) { int i, c; char str[STRINGSZ], *p, *a; a = va_arg(fp->args, char*); p = str; - for(i=0; i= 'a' && c <= 'z' || c >= 'A' && c <= 'Z' || @@ -319,24 +402,3 @@ Sconv(Fmt *fp) *p = 0; return fmtstrcpy(fp, str); } - -void -diag(char *fmt, ...) -{ - char buf[STRINGSZ], *tn; - va_list arg; - - tn = "??none??"; - if(curtext != P && curtext->from.sym != S) - tn = curtext->from.sym->name; - va_start(arg, fmt); - vseprint(buf, buf+sizeof(buf), fmt, arg); - va_end(arg); - print("%s: %s\n", tn, buf); - - nerrors++; - if(nerrors > 10) { - print("too many errors\n"); - errorexit(); - } -} diff --git a/src/liblink/obj9.c b/src/liblink/obj9.c index 0e869fb53..63f5b59b0 100644 --- a/src/liblink/obj9.c +++ b/src/liblink/obj9.c @@ -27,58 +27,222 @@ // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN // THE SOFTWARE. -// +build ignore +#include +#include +#include +#include +#include "../cmd/9l/9.out.h" +#include "../pkg/runtime/stack.h" + +static Prog zprg = { + .as = AGOK, + .reg = NREG, + .from = { + .name = D_NONE, + .type = D_NONE, + .reg = NREG, + }, + .from3 = { + .name = D_NONE, + .type = D_NONE, + .reg = NREG, + }, + .to = { + .name = D_NONE, + .type = D_NONE, + .reg = NREG, + }, +}; + +static int +symtype(Addr *a) +{ + return a->name; +} + +static int +isdata(Prog *p) +{ + return p->as == ADATA || p->as == AGLOBL; +} + +static int +iscall(Prog *p) +{ + return p->as == ABL; +} + +static int +datasize(Prog *p) +{ + return p->reg; +} + +static int +textflag(Prog *p) +{ + return p->reg; +} + +static void +settextflag(Prog *p, int f) +{ + p->reg = f; +} + +static void +progedit(Link *ctxt, Prog *p) +{ + char literal[64]; + LSym *s; + + USED(ctxt); + + p->from.class = 0; + p->to.class = 0; + + // Rewrite BR/BL to symbol as D_BRANCH. + switch(p->as) { + case ABR: + case ABL: + case ARETURN: + case ADUFFZERO: + case ADUFFCOPY: + if(p->to.sym != nil) + p->to.type = D_BRANCH; + break; + } + + // Rewrite float constants to values stored in memory. + switch(p->as) { + case AFMOVS: + if(p->from.type == D_FCONST) { + int32 i32; + float32 f32; + f32 = p->from.u.dval; + memmove(&i32, &f32, 4); + sprint(literal, "$f32.%08ux", (uint32)i32); + s = linklookup(ctxt, literal, 0); + s->size = 4; + p->from.type = D_OREG; + p->from.sym = s; + p->from.name = D_EXTERN; + p->from.offset = 0; + } + break; + case AFMOVD: + if(p->from.type == D_FCONST) { + int64 i64; + memmove(&i64, &p->from.u.dval, 8); + sprint(literal, "$f64.%016llux", (uvlong)i64); + s = linklookup(ctxt, literal, 0); + s->size = 8; + p->from.type = D_OREG; + p->from.sym = s; + p->from.name = D_EXTERN; + p->from.offset = 0; + } + break; + case AMOVD: + if(p->from.type == D_CONST && p->from.name == D_NONE && (int64)(uint32)p->from.offset != p->from.offset) { + sprint(literal, "$i64.%016llux", (uvlong)p->from.offset); + s = linklookup(ctxt, literal, 0); + s->size = 8; + p->from.type = D_OREG; + p->from.sym = s; + p->from.name = D_EXTERN; + p->from.offset = 0; + } + } + + // Rewrite SUB constants into ADD. + switch(p->as) { + case ASUBC: + if(p->from.type == D_CONST) { + p->from.offset = -p->from.offset; + p->as = AADDC; + } + break; -#include "l.h" + case ASUBCCC: + if(p->from.type == D_CONST) { + p->from.offset = -p->from.offset; + p->as = AADDCCC; + } + break; + + case ASUB: + if(p->from.type == D_CONST) { + p->from.offset = -p->from.offset; + p->as = AADD; + } + break; + } +} + +static Prog* stacksplit(Link*, Prog*, int32, int); + +static void +parsetextconst(vlong arg, vlong *textstksiz, vlong *textarg) +{ + *textstksiz = arg & 0xffffffffLL; + if(*textstksiz & 0x80000000LL) + *textstksiz = -(-*textstksiz & 0xffffffffLL); + + *textarg = (arg >> 32) & 0xffffffffLL; + if(*textarg & 0x80000000LL) + *textarg = 0; + *textarg = (*textarg+7) & ~7LL; +} -void -noops(void) +static void +addstacksplit(Link *ctxt, LSym *cursym) { - Prog *p, *p1, *q, *q1; - int o, mov, aoffset, curframe, curbecome, maxbecome; + Prog *p, *q, *q1; + int o, mov, aoffset; + vlong textstksiz, textarg; + int32 autoffset, autosize; + + if(ctxt->symmorestack[0] == nil) { + ctxt->symmorestack[0] = linklookup(ctxt, "runtime.morestack", 0); + ctxt->symmorestack[1] = linklookup(ctxt, "runtime.morestack_noctxt", 0); + // TODO(minux): add morestack short-cuts with small fixed frame-size. + } + + ctxt->cursym = cursym; + + if(cursym->text == nil || cursym->text->link == nil) + return; + + p = cursym->text; + parsetextconst(p->to.offset, &textstksiz, &textarg); + autoffset = textstksiz; + if(autoffset < 0) + autoffset = 0; + + cursym->args = p->to.offset>>32; + cursym->locals = textstksiz; /* * find leaf subroutines - * become sizes - * frame sizes * strip NOPs * expand RET * expand BECOME pseudo */ - if(debug['v']) - Bprint(&bso, "%5.2f noops\n", cputime()); - Bflush(&bso); - - curframe = 0; - curbecome = 0; - maxbecome = 0; - curtext = 0; - q = P; - for(p = firstp; p != P; p = p->link) { - - /* find out how much arg space is used in this TEXT */ - if(p->to.type == D_OREG && p->to.reg == REGSP) - if(p->to.offset > curframe) - curframe = p->to.offset; + if(ctxt->debugvlog) + Bprint(ctxt->bso, "%5.2f noops\n", cputime()); + Bflush(ctxt->bso); + q = nil; + for(p = cursym->text; p != nil; p = p->link) { switch(p->as) { /* too hard, just leave alone */ case ATEXT: - if(curtext && curtext->from.sym) { - curtext->from.sym->frame = curframe; - curtext->from.sym->become = curbecome; - if(curbecome > maxbecome) - maxbecome = curbecome; - } - curframe = 0; - curbecome = 0; - q = p; p->mark |= LABEL|LEAF|SYNC; if(p->link) p->link->mark |= LABEL; - curtext = p; break; case ANOR: @@ -183,8 +347,9 @@ noops(void) case ABL: case ABCL: - if(curtext != P) - curtext->mark &= ~LEAF; + case ADUFFZERO: + case ADUFFCOPY: + cursym->text->mark &= ~LEAF; case ABC: case ABEQ: @@ -196,21 +361,20 @@ noops(void) case ABR: case ABVC: case ABVS: - p->mark |= BRANCH; q = p; - q1 = p->cond; - if(q1 != P) { + q1 = p->pcond; + if(q1 != nil) { while(q1->as == ANOP) { q1 = q1->link; - p->cond = q1; + p->pcond = q1; } if(!(q1->mark & LEAF)) q1->mark |= LABEL; } else p->mark |= LABEL; q1 = p->link; - if(q1 != P) + if(q1 != nil) q1->mark |= LABEL; continue; @@ -221,13 +385,8 @@ noops(void) continue; case ARETURN: - /* special form of RETURN is BECOME */ - if(p->from.type == D_CONST) - if(p->from.offset > curbecome) - curbecome = p->from.offset; - q = p; - if(p->link != P) + if(p->link != nil) p->link->mark |= LABEL; continue; @@ -242,106 +401,76 @@ noops(void) continue; } } - if(curtext && curtext->from.sym) { - curtext->from.sym->frame = curframe; - curtext->from.sym->become = curbecome; - if(curbecome > maxbecome) - maxbecome = curbecome; - } - - if(debug['b']) - print("max become = %d\n", maxbecome); - xdefine("ALEFbecome", STEXT, maxbecome); - - curtext = 0; - for(p = firstp; p != P; p = p->link) { - switch(p->as) { - case ATEXT: - curtext = p; - break; - - case ABL: /* ABCL? */ - if(curtext != P && curtext->from.sym != S && curtext->to.offset >= 0) { - o = maxbecome - curtext->from.sym->frame; - if(o <= 0) - break; - /* calling a become or calling a variable */ - if(p->to.sym == S || p->to.sym->become) { - curtext->to.offset += o; - if(debug['b']) { - curp = p; - print("%D calling %D increase %d\n", - &curtext->from, &p->to, o); - } - } - } - break; - } - } - curtext = P; - for(p = firstp; p != P; p = p->link) { + autosize = 0; + for(p = cursym->text; p != nil; p = p->link) { o = p->as; switch(o) { case ATEXT: mov = AMOVD; aoffset = 0; - curtext = p; - autosize = p->to.offset + 8; + autosize = textstksiz + 8; if((p->mark & LEAF) && autosize <= 8) autosize = 0; else if(autosize & 4) autosize += 4; - p->to.offset = autosize - 8; + p->to.offset = (p->to.offset & (0xffffffffull<<32)) | (uint32)(autosize-8); q = p; if(autosize) { /* use MOVDU to adjust R1 when saving R31, if autosize is small */ - if(!(curtext->mark & LEAF) && autosize >= -BIG && autosize <= BIG) { + if(!(cursym->text->mark & LEAF) && autosize >= -BIG && autosize <= BIG) { mov = AMOVDU; aoffset = -autosize; } else { - q = prg(); + q = ctxt->arch->prg(); q->as = AADD; - q->line = p->line; + q->lineno = p->lineno; q->from.type = D_CONST; q->from.offset = -autosize; q->to.type = D_REG; q->to.reg = REGSP; + q->spadj = +autosize; q->link = p->link; p->link = q; } } else - if(!(curtext->mark & LEAF)) { - if(debug['v']) - Bprint(&bso, "save suppressed in: %s\n", - curtext->from.sym->name); - curtext->mark |= LEAF; + if(!(cursym->text->mark & LEAF)) { + if(ctxt->debugvlog) { + Bprint(ctxt->bso, "save suppressed in: %s\n", + cursym->name); + Bflush(ctxt->bso); + } + cursym->text->mark |= LEAF; } - if(curtext->mark & LEAF) { - if(curtext->from.sym) - curtext->from.sym->type = SLEAF; + if(cursym->text->mark & LEAF) { + cursym->leaf = 1; break; } - q1 = prg(); + if(!(p->reg & NOSPLIT)) + p = stacksplit(ctxt, p, autosize, !(cursym->text->reg&NEEDCTXT)); // emit split check + + q1 = ctxt->arch->prg(); q1->as = mov; - q1->line = p->line; + q1->lineno = p->lineno; q1->from.type = D_REG; q1->from.reg = REGTMP; q1->to.type = D_OREG; q1->to.offset = aoffset; q1->to.reg = REGSP; + if(q1->as == AMOVDU) + q1->spadj = -aoffset; q1->link = q->link; q->link = q1; - q1 = prg(); + q1 = ctxt->arch->prg(); q1->as = AMOVD; - q1->line = p->line; + q1->lineno = p->lineno; q1->from.type = D_SPR; q1->from.offset = D_LR; q1->to.type = D_REG; @@ -352,9 +481,11 @@ noops(void) break; case ARETURN: - if(p->from.type == D_CONST) - goto become; - if(curtext->mark & LEAF) { + if(p->from.type == D_CONST) { + ctxt->diag("using BECOME (%P) is not supported!", p); + break; + } + if(cursym->text->mark & LEAF) { if(!autosize) { p->as = ABR; p->from = zprg.from; @@ -369,13 +500,15 @@ noops(void) p->from.offset = autosize; p->to.type = D_REG; p->to.reg = REGSP; + p->spadj = -autosize; - q = prg(); + q = ctxt->arch->prg(); q->as = ABR; - q->line = p->line; + q->lineno = p->lineno; q->to.type = D_SPR; q->to.offset = D_LR; q->mark |= BRANCH; + q->spadj = +autosize; q->link = p->link; p->link = q; @@ -389,9 +522,9 @@ noops(void) p->to.type = D_REG; p->to.reg = REGTMP; - q = prg(); + q = ctxt->arch->prg(); q->as = AMOVD; - q->line = p->line; + q->lineno = p->lineno; q->from.type = D_REG; q->from.reg = REGTMP; q->to.type = D_SPR; @@ -402,111 +535,50 @@ noops(void) p = q; if(autosize) { - q = prg(); + q = ctxt->arch->prg(); q->as = AADD; - q->line = p->line; + q->lineno = p->lineno; q->from.type = D_CONST; q->from.offset = autosize; q->to.type = D_REG; q->to.reg = REGSP; + q->spadj = -autosize; q->link = p->link; p->link = q; } - q1 = prg(); + q1 = ctxt->arch->prg(); q1->as = ABR; - q1->line = p->line; + q1->lineno = p->lineno; q1->to.type = D_SPR; q1->to.offset = D_LR; q1->mark |= BRANCH; + q1->spadj = +autosize; q1->link = q->link; q->link = q1; break; - become: - if(curtext->mark & LEAF) { - - q = prg(); - q->line = p->line; - q->as = ABR; - q->from = zprg.from; - q->to = p->to; - q->cond = p->cond; - q->link = p->link; - q->mark |= BRANCH; - p->link = q; - - p->as = AADD; - p->from = zprg.from; - p->from.type = D_CONST; - p->from.offset = autosize; - p->to = zprg.to; - p->to.type = D_REG; - p->to.reg = REGSP; - - break; - } - q = prg(); - q->line = p->line; - q->as = ABR; - q->from = zprg.from; - q->to = p->to; - q->cond = p->cond; - q->mark |= BRANCH; - q->link = p->link; - p->link = q; - - q = prg(); - q->line = p->line; - q->as = AADD; - q->from.type = D_CONST; - q->from.offset = autosize; - q->to.type = D_REG; - q->to.reg = REGSP; - q->link = p->link; - p->link = q; - - q = prg(); - q->line = p->line; - q->as = AMOVD; - q->line = p->line; - q->from.type = D_REG; - q->from.reg = REGTMP; - q->to.type = D_SPR; - q->to.offset = D_LR; - q->link = p->link; - p->link = q; - - p->as = AMOVD; - p->from = zprg.from; - p->from.type = D_OREG; - p->from.offset = 0; - p->from.reg = REGSP; - p->to = zprg.to; - p->to.type = D_REG; - p->to.reg = REGTMP; - - break; } } +#if 0 // instruction scheduling if(debug['Q'] == 0) return; - curtext = P; - q = P; /* p - 1 */ + curtext = nil; + q = nil; /* p - 1 */ q1 = firstp; /* top of block */ o = 0; /* count of instructions */ - for(p = firstp; p != P; p = p1) { + for(p = firstp; p != nil; p = p1) { p1 = p->link; o++; if(p->mark & NOSCHED){ if(q1 != p){ sched(q1, q); } - for(; p != P; p = p->link){ + for(; p != nil; p = p->link){ if(!(p->mark & NOSCHED)) break; q = p; @@ -534,236 +606,34 @@ noops(void) } q = p; } +#endif } -void -addnop(Prog *p) +static Prog* +stacksplit(Link *ctxt, Prog *p, int32 framesize, int noctxt) { - Prog *q; - - q = prg(); - q->as = AOR; - q->line = p->line; - q->from.type = D_REG; - q->from.reg = REGZERO; - q->to.type = D_REG; - q->to.reg = REGZERO; - - q->link = p->link; - p->link = q; + // TODO(minux): add stack split prologue + USED(ctxt); USED(p); USED(framesize); USED(noctxt); + return p; } -#include "l.h" +static void xfol(Link*, Prog*, Prog**); -void -dodata(void) +static void +follow(Link *ctxt, LSym *s) { - int i, t; - Sym *s; - Prog *p, *p1; - vlong orig, orig1, v; - - if(debug['v']) - Bprint(&bso, "%5.2f dodata\n", cputime()); - Bflush(&bso); - for(p = datap; p != P; p = p->link) { - s = p->from.sym; - if(p->as == ADYNT || p->as == AINIT) - s->value = dtype; - if(s->type == SBSS) - s->type = SDATA; - if(s->type != SDATA) - diag("initialize non-data (%d): %s\n%P", - s->type, s->name, p); - v = p->from.offset + p->reg; - if(v > s->value) - diag("initialize bounds (%lld): %s\n%P", - s->value, s->name, p); - } - - /* - * pass 1 - * assign 'small' variables to data segment - * (rational is that data segment is more easily - * addressed through offset on REGSB) - */ - orig = 0; - for(i=0; ilink) { - t = s->type; - if(t != SDATA && t != SBSS) - continue; - v = s->value; - if(v == 0) { - diag("%s: no size", s->name); - v = 1; - } - v = rnd(v, 4); - s->value = v; - if(v > MINSIZ) - continue; - if(v >= 8) - orig = rnd(orig, 8); - s->value = orig; - orig += v; - s->type = SDATA1; - } - orig1 = orig; - - /* - * pass 2 - * assign 'data' variables to data segment - */ - for(i=0; ilink) { - t = s->type; - if(t != SDATA) { - if(t == SDATA1) - s->type = SDATA; - continue; - } - v = s->value; - if(v >= 8) - orig = rnd(orig, 8); - s->value = orig; - orig += v; - s->type = SDATA1; - } - - if(orig) - orig = rnd(orig, 8); - datsize = orig; + Prog *firstp, *lastp; - /* - * pass 3 - * everything else to bss segment - */ - for(i=0; ilink) { - if(s->type != SBSS) - continue; - v = s->value; - if(v >= 8) - orig = rnd(orig, 8); - s->value = orig; - orig += v; - } - if(orig) - orig = rnd(orig, 8); - bsssize = orig-datsize; - - /* - * pass 4 - * add literals to all large values. - * at this time: - * small data is allocated DATA - * large data is allocated DATA1 - * large bss is allocated BSS - * the new literals are loaded between - * small data and large data. - */ - orig = 0; - for(p = firstp; p != P; p = p->link) { - if(p->as != AMOVW) - continue; - if(p->from.type != D_CONST) - continue; - if(s = p->from.sym) { - t = s->type; - if(t != SDATA && t != SDATA1 && t != SBSS) - continue; - t = p->from.name; - if(t != D_EXTERN && t != D_STATIC) - continue; - v = s->value + p->from.offset; - if(v >= 0 && v <= 0xffff) - continue; - if(!strcmp(s->name, "setSB")) - continue; - /* size should be 19 max */ - if(strlen(s->name) >= 10) /* has loader address */ - sprint(literal, "$%p.%llux", s, p->from.offset); - else - sprint(literal, "$%s.%d.%llux", s->name, s->version, p->from.offset); - } else { - if(p->from.name != D_NONE) - continue; - if(p->from.reg != NREG) - continue; - v = p->from.offset; - if(v >= -0x7fff-1 && v <= 0x7fff) - continue; - if(!(v & 0xffff)) - continue; - if(v) - continue; /* quicker to build it than load it */ - /* size should be 9 max */ - sprint(literal, "$%llux", v); - } - s = lookup(literal, 0); - if(s->type == 0) { - s->type = SDATA; - s->value = orig1+orig; - orig += 4; - p1 = prg(); - p1->as = ADATA; - p1->line = p->line; - p1->from.type = D_OREG; - p1->from.sym = s; - p1->from.name = D_EXTERN; - p1->reg = 4; - p1->to = p->from; - p1->link = datap; - datap = p1; - } - if(s->type != SDATA) - diag("literal not data: %s", s->name); - p->from.type = D_OREG; - p->from.sym = s; - p->from.name = D_EXTERN; - p->from.offset = 0; - continue; - } - while(orig & 7) - orig++; - /* - * pass 5 - * re-adjust offsets - */ - for(i=0; ilink) { - t = s->type; - if(t == SBSS) { - s->value += orig; - continue; - } - if(t == SDATA1) { - s->type = SDATA; - s->value += orig; - continue; - } - } - datsize += orig; - xdefine("setSB", SDATA, 0+BIG); - xdefine("bdata", SDATA, 0); - xdefine("edata", SDATA, datsize); - xdefine("end", SBSS, datsize+bsssize); - xdefine("etext", STEXT, 0); -} - -void -undef(void) -{ - int i; - Sym *s; + ctxt->cursym = s; - for(i=0; ilink) - if(s->type == SXREF) - diag("%s: not defined", s->name); + firstp = ctxt->arch->prg(); + lastp = firstp; + xfol(ctxt, s->text, &lastp); + lastp->link = nil; + s->text = firstp->link; } -int +static int relinv(int a) { @@ -783,49 +653,30 @@ relinv(int a) return 0; } -void -follow(void) -{ - - if(debug['v']) - Bprint(&bso, "%5.2f follow\n", cputime()); - Bflush(&bso); - - firstp = prg(); - lastp = firstp; - - xfol(textp); - - firstp = firstp->link; - lastp->link = P; -} - -void -xfol(Prog *p) +static void +xfol(Link *ctxt, Prog *p, Prog **last) { Prog *q, *r; int a, b, i; loop: - if(p == P) + if(p == nil) return; a = p->as; - if(a == ATEXT) - curtext = p; if(a == ABR) { - q = p->cond; + q = p->pcond; if((p->mark&NOSCHED) || q && (q->mark&NOSCHED)){ p->mark |= FOLL; - lastp->link = p; - lastp = p; + (*last)->link = p; + *last = p; p = p->link; - xfol(p); + xfol(ctxt, p, last); p = q; if(p && !(p->mark & FOLL)) goto loop; return; } - if(q != P) { + if(q != nil) { p->mark |= FOLL; p = q; if(!(p->mark & FOLL)) @@ -834,7 +685,7 @@ loop: } if(p->mark & FOLL) { for(i=0,q=p; i<4; i++,q=q->link) { - if(q == lastp || (q->mark&NOSCHED)) + if(q == *last || (q->mark&NOSCHED)) break; b = 0; /* set */ a = q->as; @@ -844,51 +695,51 @@ loop: } if(a == ABR || a == ARETURN || a == ARFI || a == ARFCI || a == ARFID || a == AHRFID) goto copy; - if(!q->cond || (q->cond->mark&FOLL)) + if(!q->pcond || (q->pcond->mark&FOLL)) continue; b = relinv(a); if(!b) continue; copy: for(;;) { - r = prg(); + r = ctxt->arch->prg(); *r = *p; if(!(r->mark&FOLL)) print("cant happen 1\n"); r->mark |= FOLL; if(p != q) { p = p->link; - lastp->link = r; - lastp = r; + (*last)->link = r; + *last = r; continue; } - lastp->link = r; - lastp = r; + (*last)->link = r; + *last = r; if(a == ABR || a == ARETURN || a == ARFI || a == ARFCI || a == ARFID || a == AHRFID) return; r->as = b; - r->cond = p->link; - r->link = p->cond; + r->pcond = p->link; + r->link = p->pcond; if(!(r->link->mark&FOLL)) - xfol(r->link); - if(!(r->cond->mark&FOLL)) + xfol(ctxt, r->link, last); + if(!(r->pcond->mark&FOLL)) print("cant happen 2\n"); return; } } a = ABR; - q = prg(); + q = ctxt->arch->prg(); q->as = a; - q->line = p->line; + q->lineno = p->lineno; q->to.type = D_BRANCH; q->to.offset = p->pc; - q->cond = p; + q->pcond = p; p = q; } p->mark |= FOLL; - lastp->link = p; - lastp = p; + (*last)->link = p; + *last = p; if(a == ABR || a == ARETURN || a == ARFI || a == ARFCI || a == ARFID || a == AHRFID){ if(p->mark & NOSCHED){ p = p->link; @@ -896,11 +747,11 @@ loop: } return; } - if(p->cond != P) - if(a != ABL && p->link != P) { - xfol(p->link); - p = p->cond; - if(p == P || (p->mark&FOLL)) + if(p->pcond != nil) + if(a != ABL && p->link != nil) { + xfol(ctxt, p->link, last); + p = p->pcond; + if(p == nil || (p->mark&FOLL)) return; goto loop; } @@ -908,474 +759,104 @@ loop: goto loop; } -void -patch(void) -{ - long c; - Prog *p, *q; - Sym *s; - int a; - vlong vexit; - - if(debug['v']) - Bprint(&bso, "%5.2f patch\n", cputime()); - Bflush(&bso); - mkfwd(); - s = lookup("exit", 0); - vexit = s->value; - for(p = firstp; p != P; p = p->link) { - a = p->as; - if(a == ATEXT) - curtext = p; - if((a == ABL || a == ARETURN) && p->to.sym != S) { - s = p->to.sym; - if(s->type != STEXT && s->type != SUNDEF) { - diag("undefined: %s\n%P", s->name, p); - s->type = STEXT; - s->value = vexit; - } - if(s->type == SUNDEF){ - p->to.offset = 0; - p->cond = UP; - } - else - p->to.offset = s->value; - p->to.type = D_BRANCH; - } - if(p->to.type != D_BRANCH || p->cond == UP) - continue; - c = p->to.offset; - for(q = firstp; q != P;) { - if(q->forwd != P) - if(c >= q->forwd->pc) { - q = q->forwd; - continue; - } - if(c == q->pc) - break; - q = q->link; - } - if(q == P) { - diag("branch out of range %ld\n%P", c, p); - p->to.type = D_NONE; - } - p->cond = q; - } - - for(p = firstp; p != P; p = p->link) { - if(p->as == ATEXT) - curtext = p; - p->mark = 0; /* initialization for follow */ - if(p->cond != P && p->cond != UP) { - p->cond = brloop(p->cond); - if(p->cond != P) - if(p->to.type == D_BRANCH) - p->to.offset = p->cond->pc; - } - } -} - -#define LOG 5 -void -mkfwd(void) -{ - Prog *p; - long dwn[LOG], cnt[LOG], i; - Prog *lst[LOG]; - - for(i=0; ilink) { - if(p->as == ATEXT) - curtext = p; - i--; - if(i < 0) - i = LOG-1; - p->forwd = P; - dwn[i]--; - if(dwn[i] <= 0) { - dwn[i] = cnt[i]; - if(lst[i] != P) - lst[i]->forwd = p; - lst[i] = p; - } - } -} - -Prog* -brloop(Prog *p) -{ - Prog *q; - int c; - - for(c=0; p!=P;) { - if(p->as != ABR || (p->mark&NOSCHED)) - return p; - q = p->cond; - if(q <= p) { - c++; - if(q == p || c > 5000) - break; - } - p = q; - } - return P; -} - -vlong -atolwhex(char *s) -{ - vlong n; - int f; - - n = 0; - f = 0; - while(*s == ' ' || *s == '\t') - s++; - if(*s == '-' || *s == '+') { - if(*s++ == '-') - f = 1; - while(*s == ' ' || *s == '\t') - s++; - } - if(s[0]=='0' && s[1]){ - if(s[1]=='x' || s[1]=='X'){ - s += 2; - for(;;){ - if(*s >= '0' && *s <= '9') - n = n*16 + *s++ - '0'; - else if(*s >= 'a' && *s <= 'f') - n = n*16 + *s++ - 'a' + 10; - else if(*s >= 'A' && *s <= 'F') - n = n*16 + *s++ - 'A' + 10; - else - break; - } - } else - while(*s >= '0' && *s <= '7') - n = n*8 + *s++ - '0'; - } else - while(*s >= '0' && *s <= '9') - n = n*10 + *s++ - '0'; - if(f) - n = -n; - return n; -} - -vlong -rnd(vlong v, long r) -{ - vlong c; - - if(r <= 0) - return v; - v += r - 1; - c = v % r; - if(c < 0) - c += r; - v -= c; - return v; -} - -void -import(void) -{ - int i; - Sym *s; - - for(i = 0; i < NHASH; i++) - for(s = hash[i]; s != S; s = s->link) - if(s->sig != 0 && s->type == SXREF && (nimports == 0 || s->subtype == SIMPORT)){ - undefsym(s); - Bprint(&bso, "IMPORT: %s sig=%lux v=%lld\n", s->name, s->sig, s->value); - if(debug['S']) - s->sig = 0; - } -} - -void -ckoff(Sym *s, vlong v) -{ - if(v < 0 || v >= 1<name); -} - static Prog* -newdata(Sym *s, int o, int w, int t) +prg(void) { Prog *p; - p = prg(); - p->link = datap; - datap = p; - p->as = ADATA; - p->reg = w; - p->from.type = D_OREG; - p->from.name = t; - p->from.sym = s; - p->from.offset = o; - p->to.type = D_CONST; - p->to.name = D_NONE; + p = emallocz(sizeof(*p)); + *p = zprg; return p; } -void -export(void) -{ - int i, j, n, off, nb, sv, ne; - Sym *s, *et, *str, **esyms; - Prog *p; - char buf[NSNAME], *t; - - n = 0; - for(i = 0; i < NHASH; i++) - for(s = hash[i]; s != S; s = s->link) - if(s->type != SXREF && s->type != SUNDEF && (nexports == 0 && s->sig != 0 || s->subtype == SEXPORT || allexport)) - n++; - esyms = malloc(n*sizeof(Sym*)); - ne = n; - n = 0; - for(i = 0; i < NHASH; i++) - for(s = hash[i]; s != S; s = s->link) - if(s->type != SXREF && s->type != SUNDEF && (nexports == 0 && s->sig != 0 || s->subtype == SEXPORT || allexport)) - esyms[n++] = s; - for(i = 0; i < ne-1; i++) - for(j = i+1; j < ne; j++) - if(strcmp(esyms[i]->name, esyms[j]->name) > 0){ - s = esyms[i]; - esyms[i] = esyms[j]; - esyms[j] = s; - } - - nb = 0; - off = 0; - et = lookup(EXPTAB, 0); - if(et->type != 0 && et->type != SXREF) - diag("%s already defined", EXPTAB); - et->type = SDATA; - str = lookup(".string", 0); - if(str->type == 0) - str->type = SDATA; - sv = str->value; - for(i = 0; i < ne; i++){ - s = esyms[i]; - Bprint(&bso, "EXPORT: %s sig=%lux t=%d\n", s->name, s->sig, s->type); - - /* signature */ - p = newdata(et, off, sizeof(long), D_EXTERN); - off += sizeof(long); - p->to.offset = s->sig; - - /* address */ - p = newdata(et, off, sizeof(long), D_EXTERN); - off += sizeof(long); /* TO DO: bug */ - p->to.name = D_EXTERN; - p->to.sym = s; - - /* string */ - t = s->name; - n = strlen(t)+1; - for(;;){ - buf[nb++] = *t; - sv++; - if(nb >= NSNAME){ - p = newdata(str, sv-NSNAME, NSNAME, D_STATIC); - p->to.type = D_SCONST; - memmove(p->to.sval, buf, NSNAME); - nb = 0; - } - if(*t++ == 0) - break; - } - - /* name */ - p = newdata(et, off, sizeof(long), D_EXTERN); - off += sizeof(long); - p->to.name = D_STATIC; - p->to.sym = str; - p->to.offset = sv-n; - } - - if(nb > 0){ - p = newdata(str, sv-nb, nb, D_STATIC); - p->to.type = D_SCONST; - memmove(p->to.sval, buf, nb); - } - - for(i = 0; i < 3; i++){ - newdata(et, off, sizeof(long), D_EXTERN); - off += sizeof(long); - } - et->value = off; - if(sv == 0) - sv = 1; - str->value = sv; - exports = ne; - free(esyms); -} - -enum{ - ABSD = 0, - ABSU = 1, - RELD = 2, - RELU = 3, +LinkArch linkpower64 = { + .name = "power64", + .thechar = '9', + .endian = BigEndian, + + .addstacksplit = addstacksplit, + .assemble = span9, + .datasize = datasize, + .follow = follow, + .iscall = iscall, + .isdata = isdata, + .prg = prg, + .progedit = progedit, + .settextflag = settextflag, + .symtype = symtype, + .textflag = textflag, + + .minlc = 4, + .ptrsize = 8, + .regsize = 8, + + .D_ADDR = D_ADDR, + .D_AUTO = D_AUTO, + .D_BRANCH = D_BRANCH, + .D_CONST = D_CONST, + .D_EXTERN = D_EXTERN, + .D_FCONST = D_FCONST, + .D_NONE = D_NONE, + .D_PARAM = D_PARAM, + .D_SCONST = D_SCONST, + .D_STATIC = D_STATIC, + + .ACALL = ABL, + .ADATA = ADATA, + .AEND = AEND, + .AFUNCDATA = AFUNCDATA, + .AGLOBL = AGLOBL, + .AJMP = ABR, + .ANOP = ANOP, + .APCDATA = APCDATA, + .ARET = ARETURN, + .ATEXT = ATEXT, + .ATYPE = ATYPE, + .AUSEFIELD = AUSEFIELD, }; -int modemap[8] = { 0, 1, -1, 2, 3, 4, 5, 6}; - -typedef struct Reloc Reloc; - -struct Reloc -{ - int n; - int t; - uchar *m; - ulong *a; +LinkArch linkpower64le = { + .name = "power64le", + .thechar = '9', + .endian = LittleEndian, + + .addstacksplit = addstacksplit, + .assemble = span9, + .datasize = datasize, + .follow = follow, + .iscall = iscall, + .isdata = isdata, + .prg = prg, + .progedit = progedit, + .settextflag = settextflag, + .symtype = symtype, + .textflag = textflag, + + .minlc = 4, + .ptrsize = 8, + .regsize = 8, + + .D_ADDR = D_ADDR, + .D_AUTO = D_AUTO, + .D_BRANCH = D_BRANCH, + .D_CONST = D_CONST, + .D_EXTERN = D_EXTERN, + .D_FCONST = D_FCONST, + .D_NONE = D_NONE, + .D_PARAM = D_PARAM, + .D_SCONST = D_SCONST, + .D_STATIC = D_STATIC, + + .ACALL = ABL, + .ADATA = ADATA, + .AEND = AEND, + .AFUNCDATA = AFUNCDATA, + .AGLOBL = AGLOBL, + .AJMP = ABR, + .ANOP = ANOP, + .APCDATA = APCDATA, + .ARET = ARETURN, + .ATEXT = ATEXT, + .ATYPE = ATYPE, + .AUSEFIELD = AUSEFIELD, }; - -Reloc rels; - -static void -grow(Reloc *r) -{ - int t; - uchar *m, *nm; - ulong *a, *na; - - t = r->t; - r->t += 64; - m = r->m; - a = r->a; - r->m = nm = malloc(r->t*sizeof(uchar)); - r->a = na = malloc(r->t*sizeof(ulong)); - memmove(nm, m, t*sizeof(uchar)); - memmove(na, a, t*sizeof(ulong)); - free(m); - free(a); -} - -void -dynreloc(Sym *s, long v, int abs, int split, int sext) -{ - int i, k, n; - uchar *m; - ulong *a; - Reloc *r; - - if(v&3) - diag("bad relocation address"); - v >>= 2; - if(s->type == SUNDEF) - k = abs ? ABSU : RELU; - else - k = abs ? ABSD : RELD; - if(split) - k += 4; - if(sext) - k += 2; - /* Bprint(&bso, "R %s a=%ld(%lx) %d\n", s->name, a, a, k); */ - k = modemap[k]; - r = &rels; - n = r->n; - if(n >= r->t) - grow(r); - m = r->m; - a = r->a; - for(i = n; i > 0; i--){ - if(v < a[i-1]){ /* happens occasionally for data */ - m[i] = m[i-1]; - a[i] = a[i-1]; - } - else - break; - } - m[i] = k; - a[i] = v; - r->n++; -} - -static int -sput(char *s) -{ - char *p; - - p = s; - while(*s) - cput(*s++); - cput(0); - return s-p+1; -} - -void -asmdyn() -{ - int i, n, t, c; - Sym *s; - ulong la, ra, *a; - vlong off; - uchar *m; - Reloc *r; - - cflush(); - off = seek(cout, 0, 1); - lput(0); - t = 0; - lput(imports); - t += 4; - for(i = 0; i < NHASH; i++) - for(s = hash[i]; s != S; s = s->link) - if(s->type == SUNDEF){ - lput(s->sig); - t += 4; - t += sput(s->name); - } - - la = 0; - r = &rels; - n = r->n; - m = r->m; - a = r->a; - lput(n); - t += 4; - for(i = 0; i < n; i++){ - ra = *a-la; - if(*a < la) - diag("bad relocation order"); - if(ra < 256) - c = 0; - else if(ra < 65536) - c = 1; - else - c = 2; - cput((c<<6)|*m++); - t++; - if(c == 0){ - cput(ra); - t++; - } - else if(c == 1){ - wput(ra); - t += 2; - } - else{ - lput(ra); - t += 4; - } - la = *a++; - } - - cflush(); - seek(cout, off, 0); - lput(t); - - if(debug['v']){ - Bprint(&bso, "import table entries = %d\n", imports); - Bprint(&bso, "export table entries = %d\n", exports); - } -} -- cgit v1.2.1 From 4d0a2b27416e2cc87be30d198489d55db120d48b Mon Sep 17 00:00:00 2001 From: Shenghou Ma Date: Thu, 7 Aug 2014 18:41:09 -0400 Subject: [dev.power64] liblink: handle $i64. symbols, add debug output for -S -v, show rel addend in hex for RISC arches LGTM=rsc R=rsc, iant CC=golang-codereviews https://codereview.appspot.com/127770043 --- src/liblink/objfile.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'src/liblink') diff --git a/src/liblink/objfile.c b/src/liblink/objfile.c index 22c9199d5..3b78571b7 100644 --- a/src/liblink/objfile.c +++ b/src/liblink/objfile.c @@ -138,6 +138,8 @@ writeobj(Link *ctxt, Biobuf *b) edata = nil; for(pl = ctxt->plist; pl != nil; pl = pl->link) { for(p = pl->firstpc; p != nil; p = plink) { + if(ctxt->debugasm && ctxt->debugvlog) + print("obj: %p %P\n", p, p); plink = p->link; p->link = nil; @@ -322,7 +324,10 @@ writesym(Link *ctxt, Biobuf *b, LSym *s) name = ""; if(r->sym != nil) name = r->sym->name; - Bprint(ctxt->bso, "\trel %d+%d t=%d %s+%lld\n", (int)r->off, r->siz, r->type, name, (vlong)r->add); + if(ctxt->arch->thechar == '5' || ctxt->arch->thechar == '9') + Bprint(ctxt->bso, "\trel %d+%d t=%d %s+%llux\n", (int)r->off, r->siz, r->type, name, (vlong)r->add); + else + Bprint(ctxt->bso, "\trel %d+%d t=%d %s+%lld\n", (int)r->off, r->siz, r->type, name, (vlong)r->add); } } @@ -725,7 +730,7 @@ rdsym(Link *ctxt, Biobuf *f, char *pkg) s->type = SRODATA; adduint32(ctxt, s, i32); s->reachable = 0; - } else if(strncmp(s->name, "$f64.", 5) == 0) { + } else if(strncmp(s->name, "$f64.", 5) == 0 || strncmp(s->name, "$i64.", 5) == 0) { int64 i64; i64 = strtoull(s->name+5, nil, 16); s->type = SRODATA; -- cgit v1.2.1 From 066d5dbbec0cfbf73326128acd10198d60fbe4e3 Mon Sep 17 00:00:00 2001 From: Shenghou Ma Date: Tue, 12 Aug 2014 20:57:45 -0400 Subject: [dev.power64] liblink: support stack split, long conditional branches LGTM=rsc R=rsc, iant CC=golang-codereviews https://codereview.appspot.com/123300043 --- src/liblink/asm9.c | 48 +++++++---- src/liblink/list9.c | 5 +- src/liblink/obj9.c | 236 +++++++++++++++++++++++++++++++++++++++++++++------- 3 files changed, 243 insertions(+), 46 deletions(-) (limited to 'src/liblink') diff --git a/src/liblink/asm9.c b/src/liblink/asm9.c index 647e6f178..886edf347 100644 --- a/src/liblink/asm9.c +++ b/src/liblink/asm9.c @@ -307,6 +307,7 @@ static Optab optab[] = { { ABR, C_NONE, C_NONE, C_NONE, C_LR, 18, 4, 0 }, { ABR, C_NONE, C_NONE, C_NONE, C_CTR, 18, 4, 0 }, + { ABR, C_REG, C_NONE, C_NONE, C_CTR, 18, 4, 0 }, { ABR, C_NONE, C_NONE, C_NONE, C_ZOREG, 15, 8, 0 }, { ABC, C_NONE, C_REG, C_NONE, C_LR, 18, 4, 0 }, @@ -436,6 +437,8 @@ static Optab optab[] = { { ADUFFZERO, C_NONE, C_NONE, C_NONE, C_LBRA, 11, 4, 0 }, // same as ABR/ABL { ADUFFCOPY, C_NONE, C_NONE, C_NONE, C_LBRA, 11, 4, 0 }, // same as ABR/ABL + { ANOP, C_NONE, C_NONE, C_NONE, C_NONE, 0, 0, 0 }, + { AXXX, C_NONE, C_NONE, C_NONE, C_NONE, 0, 4, 0 }, }; @@ -475,10 +478,10 @@ static char xcmp[C_NCLASS][C_NCLASS]; void span9(Link *ctxt, LSym *cursym) { - Prog *p; + Prog *p, *q; Optab *o; int m, bflag; - vlong c; + vlong c, otxt; int32 out[6], i, j; uchar *bp, *cast; @@ -515,38 +518,39 @@ span9(Link *ctxt, LSym *cursym) * generate extra passes putting branches * around jmps to fix. this is rare. */ + bflag = 1; while(bflag) { if(ctxt->debugvlog) Bprint(ctxt->bso, "%5.2f span1\n", cputime()); bflag = 0; c = 0; - for(p = cursym->text; p != nil; p = p->link) { + for(p = cursym->text->link; p != nil; p = p->link) { p->pc = c; o = oplook(ctxt, p); -/* very large branches + // very large conditional branches if((o->type == 16 || o->type == 17) && p->pcond) { otxt = p->pcond->pc - c; - if(otxt < -(1L<<16)+10 || otxt >= (1L<<15)-10) { - q = prg(); + if(otxt < -(1L<<15)+10 || otxt >= (1L<<15)-10) { + q = ctxt->arch->prg(); q->link = p->link; p->link = q; q->as = ABR; q->to.type = D_BRANCH; q->pcond = p->pcond; p->pcond = q; - q = prg(); + q = ctxt->arch->prg(); q->link = p->link; p->link = q; q->as = ABR; q->to.type = D_BRANCH; q->pcond = q->link->link; - addnop(p->link); - addnop(p); + //addnop(p->link); + //addnop(p); bflag = 1; } } -*/ + m = o->size; if(m == 0) { if(p->as != ANOP && p->as != AFUNCDATA && p->as != APCDATA) @@ -1398,6 +1402,14 @@ loadu32(int r, vlong d) return AOP_IRR(OP_ADDIS, r, REGZERO, v); } +static uint16 +high16adjusted(int32 d) +{ + if(d & 0x8000) + return (d>>16) + 1; + return d>>16; +} + static void asmout(Link *ctxt, Prog *p, Optab *o, int32 *out) { @@ -1548,7 +1560,11 @@ asmout(Link *ctxt, Prog *p, Optab *o, int32 *out) rel->siz = 4; rel->sym = p->to.sym; v += p->to.offset; - rel->add = o1 | ((v & 0x03FFFFFC) >> 2); + if(v & 03) { + ctxt->diag("odd branch target address\n%P", p); + v &= ~03; + } + rel->add = o1 | (v & 0x03FFFFFC); rel->type = R_CALLPOWER; } break; @@ -1673,7 +1689,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, int32 *out) o1 = loadu32(p->to.reg, d); o2 = LOP_IRR(OP_ORI, p->to.reg, p->to.reg, (int32)d); } else { - o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, (d>>16)+(d&0x8000)?1:0); + o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, high16adjusted(d)); o2 = AOP_IRR(OP_ADDI, p->to.reg, REGTMP, d); addaddrreloc(ctxt, p->from.sym, &o1, &o2); } @@ -2199,7 +2215,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, int32 *out) case 74: v = regoff(ctxt, &p->to); - o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, (v>>16)+(v&0x8000)?1:0); + o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, high16adjusted(v)); o2 = AOP_IRR(opstore(ctxt, p->as), p->from.reg, REGTMP, v); addaddrreloc(ctxt, p->to.sym, &o1, &o2); //if(dlm) reloc(&p->to, p->pc, 1); @@ -2207,7 +2223,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, int32 *out) case 75: v = regoff(ctxt, &p->from); - o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, (v>>16)+(v&0x8000)?1:0); + o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, high16adjusted(v)); o2 = AOP_IRR(opload(ctxt, p->as), p->to.reg, REGTMP, v); addaddrreloc(ctxt, p->from.sym, &o1, &o2); //if(dlm) reloc(&p->from, p->pc, 1); @@ -2215,7 +2231,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, int32 *out) case 76: v = regoff(ctxt, &p->from); - o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, (v>>16)+(v&0x8000)?1:0); + o1 = AOP_IRR(OP_ADDIS, REGTMP, REGZERO, high16adjusted(v)); o2 = AOP_IRR(opload(ctxt, p->as), p->to.reg, REGTMP, v); addaddrreloc(ctxt, p->from.sym, &o1, &o2); o3 = LOP_RRR(OP_EXTSB, p->to.reg, p->to.reg, 0); @@ -2589,6 +2605,8 @@ opirr(Link *ctxt, int a) case ABR: return OPVCC(18,0,0,0); case ABL: return OPVCC(18,0,0,0) | 1; + case ADUFFZERO: return OPVCC(18,0,0,0) | 1; + case ADUFFCOPY: return OPVCC(18,0,0,0) | 1; case ABC: return OPVCC(16,0,0,0); case ABCL: return OPVCC(16,0,0,0) | 1; diff --git a/src/liblink/list9.c b/src/liblink/list9.c index 3299d269a..9700a1684 100644 --- a/src/liblink/list9.c +++ b/src/liblink/list9.c @@ -345,7 +345,10 @@ Rconv(Fmt *fp) int r; r = va_arg(fp->args, int); - sprint(str, "r%d", r); + if(r < NREG) + sprint(str, "r%d", r); + else + sprint(str, "f%d", r-NREG); return fmtstrcpy(fp, str); } diff --git a/src/liblink/obj9.c b/src/liblink/obj9.c index 63f5b59b0..90145a46f 100644 --- a/src/liblink/obj9.c +++ b/src/liblink/obj9.c @@ -33,6 +33,7 @@ #include #include "../cmd/9l/9.out.h" #include "../pkg/runtime/stack.h" +#include "../pkg/runtime/funcdata.h" static Prog zprg = { .as = AGOK, @@ -417,6 +418,9 @@ addstacksplit(Link *ctxt, LSym *cursym) autosize += 4; p->to.offset = (p->to.offset & (0xffffffffull<<32)) | (uint32)(autosize-8); + if(!(p->reg & NOSPLIT)) + p = stacksplit(ctxt, p, autosize, !(cursym->text->reg&NEEDCTXT)); // emit split check + q = p; if(autosize) { /* use MOVDU to adjust R1 when saving R31, if autosize is small */ @@ -424,7 +428,7 @@ addstacksplit(Link *ctxt, LSym *cursym) mov = AMOVDU; aoffset = -autosize; } else { - q = ctxt->arch->prg(); + q = appendp(ctxt, p); q->as = AADD; q->lineno = p->lineno; q->from.type = D_CONST; @@ -432,9 +436,6 @@ addstacksplit(Link *ctxt, LSym *cursym) q->to.type = D_REG; q->to.reg = REGSP; q->spadj = +autosize; - - q->link = p->link; - p->link = q; } } else if(!(cursym->text->mark & LEAF)) { @@ -451,33 +452,54 @@ addstacksplit(Link *ctxt, LSym *cursym) break; } - if(!(p->reg & NOSPLIT)) - p = stacksplit(ctxt, p, autosize, !(cursym->text->reg&NEEDCTXT)); // emit split check - - q1 = ctxt->arch->prg(); - q1->as = mov; - q1->lineno = p->lineno; - q1->from.type = D_REG; - q1->from.reg = REGTMP; - q1->to.type = D_OREG; - q1->to.offset = aoffset; - q1->to.reg = REGSP; - if(q1->as == AMOVDU) - q1->spadj = -aoffset; + q = appendp(ctxt, q); + q->as = AMOVD; + q->lineno = p->lineno; + q->from.type = D_SPR; + q->from.offset = D_LR; + q->to.type = D_REG; + q->to.reg = REGTMP; - q1->link = q->link; - q->link = q1; + q = appendp(ctxt, q); + q->as = mov; + q->lineno = p->lineno; + q->from.type = D_REG; + q->from.reg = REGTMP; + q->to.type = D_OREG; + q->to.offset = aoffset; + q->to.reg = REGSP; + if(q->as == AMOVDU) + q->spadj = -aoffset; + + if(cursym->text->reg & WRAPPER) { + // g->panicwrap += autosize; + // MOVWZ panicwrap_offset(g), R3 + // ADD $autosize, R3 + // MOVWZ R3, panicwrap_offset(g) + p = appendp(ctxt, q); + p->as = AMOVWZ; + p->from.type = D_OREG; + p->from.reg = REGG; + p->from.offset = 2*ctxt->arch->ptrsize; + p->to.type = D_REG; + p->to.reg = 3; - q1 = ctxt->arch->prg(); - q1->as = AMOVD; - q1->lineno = p->lineno; - q1->from.type = D_SPR; - q1->from.offset = D_LR; - q1->to.type = D_REG; - q1->to.reg = REGTMP; + p = appendp(ctxt, p); + p->as = AADD; + p->from.type = D_CONST; + p->from.offset = autosize; + p->to.type = D_REG; + p->to.reg = 3; + + p = appendp(ctxt, p); + p->as = AMOVWZ; + p->from.type = D_REG; + p->from.reg = 3; + p->to.type = D_OREG; + p->to.reg = REGG; + p->to.offset = 2*ctxt->arch->ptrsize; + } - q1->link = q->link; - q->link = q1; break; case ARETURN: @@ -485,6 +507,11 @@ addstacksplit(Link *ctxt, LSym *cursym) ctxt->diag("using BECOME (%P) is not supported!", p); break; } + if(p->to.sym) { // retjmp + p->as = ABR; + p->to.type = D_BRANCH; + break; + } if(cursym->text->mark & LEAF) { if(!autosize) { p->as = ABR; @@ -612,8 +639,157 @@ addstacksplit(Link *ctxt, LSym *cursym) static Prog* stacksplit(Link *ctxt, Prog *p, int32 framesize, int noctxt) { - // TODO(minux): add stack split prologue - USED(ctxt); USED(p); USED(framesize); USED(noctxt); + int32 arg; + Prog *q, *q1; + + // MOVD g_stackguard(g), R3 + p = appendp(ctxt, p); + p->as = AMOVD; + p->from.type = D_OREG; + p->from.reg = REGG; + p->to.type = D_REG; + p->to.reg = 3; + + q = nil; + if(framesize <= StackSmall) { + // small stack: SP < stackguard + // CMP stackguard, SP + p = appendp(ctxt, p); + p->as = ACMPU; + p->from.type = D_REG; + p->from.reg = 3; + p->to.type = D_REG; + p->to.reg = REGSP; + } else if(framesize <= StackBig) { + // large stack: SP-framesize < stackguard-StackSmall + // ADD $-framesize, SP, R4 + // CMP stackguard, R4 + p = appendp(ctxt, p); + p->as = AADD; + p->from.type = D_CONST; + p->from.offset = -framesize; + p->reg = REGSP; + p->to.type = D_REG; + p->to.reg = 4; + + p = appendp(ctxt, p); + p->as = ACMPU; + p->from.type = D_REG; + p->from.reg = 3; + p->to.type = D_REG; + p->to.reg = 4; + } else { + // Such a large stack we need to protect against wraparound. + // If SP is close to zero: + // SP-stackguard+StackGuard <= framesize + (StackGuard-StackSmall) + // The +StackGuard on both sides is required to keep the left side positive: + // SP is allowed to be slightly below stackguard. See stack.h. + // + // Preemption sets stackguard to StackPreempt, a very large value. + // That breaks the math above, so we have to check for that explicitly. + // // stackguard is R3 + // CMP R3, $StackPreempt + // BEQ label-of-call-to-morestack + // ADD $StackGuard, SP, R4 + // SUB R3, R4 + // MOVD $(framesize+(StackGuard-StackSmall)), R31 + // CMP R4, R31 + p = appendp(ctxt, p); + p->as = ACMP; + p->from.type = D_REG; + p->from.reg = 3; + p->to.type = D_CONST; + p->to.offset = StackPreempt; + + q = p = appendp(ctxt, p); + p->as = ABEQ; + p->to.type = D_BRANCH; + + p = appendp(ctxt, p); + p->as = AADD; + p->from.type = D_CONST; + p->from.offset = StackGuard; + p->reg = REGSP; + p->to.type = D_REG; + p->to.reg = 4; + + p = appendp(ctxt, p); + p->as = ASUB; + p->from.type = D_REG; + p->from.reg = 3; + p->to.type = D_REG; + p->to.reg = 4; + + p = appendp(ctxt, p); + p->as = AMOVD; + p->from.type = D_CONST; + p->from.offset = framesize + StackGuard - StackSmall; + p->to.type = D_REG; + p->to.reg = REGTMP; + + p = appendp(ctxt, p); + p->as = ACMPU; + p->from.type = D_REG; + p->from.reg = 4; + p->to.type = D_REG; + p->to.reg = REGTMP; + } + + // q1: BLT done + q1 = p = appendp(ctxt, p); + p->as = ABLT; + p->to.type = D_BRANCH; + + // MOVD $framesize, R3 + p = appendp(ctxt, p); + p->as = AMOVD; + p->from.type = D_CONST; + p->from.offset = framesize; + p->to.type = D_REG; + p->to.reg = 3; + if(q) + q->pcond = p; + + // MOVD $args, R4 + p = appendp(ctxt, p); + p->as = AMOVD; + p->from.type = D_CONST; + arg = (ctxt->cursym->text->to.offset >> 32) & 0xffffffffull; + if(arg == 1) // special marker for known 0 + arg = 0; + else if(arg == ArgsSizeUnknown) + ctxt->diag("%s: arg size unknown, but split stack", ctxt->cursym->name); + if(arg&3) // ???? + ctxt->diag("misaligned argument size in stack split: %d", arg); + p->from.offset = arg; + p->to.type = D_REG; + p->to.reg = 4; + + // MOVD LR, R5 + p = appendp(ctxt, p); + p->as = AMOVD; + p->from.type = D_SPR; + p->from.offset = D_LR; + p->to.type = D_REG; + p->to.reg = 5; + + // BL runtime.morestack(SB) + p = appendp(ctxt, p); + p->as = ABL; + p->to.type = D_BRANCH; + p->to.sym = ctxt->symmorestack[noctxt]; + + // BR start + p = appendp(ctxt, p); + p->as = ABR; + p->to.type = D_BRANCH; + p->pcond = ctxt->cursym->text->link; + + // placeholder for q1's jump target + p = appendp(ctxt, p); + p->as = ANOP; // zero-width place holder + q1->pcond = p; + return p; } -- cgit v1.2.1 From 54f65304ca15c1a396f8faa03170803f0addc3bd Mon Sep 17 00:00:00 2001 From: Shenghou Ma Date: Tue, 12 Aug 2014 21:56:20 -0400 Subject: [dev.power64] liblink: disable stack split for now LGTM=rsc R=rsc, iant CC=golang-codereviews https://codereview.appspot.com/122460043 --- src/liblink/obj9.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/liblink') diff --git a/src/liblink/obj9.c b/src/liblink/obj9.c index 90145a46f..321e2c9bf 100644 --- a/src/liblink/obj9.c +++ b/src/liblink/obj9.c @@ -639,6 +639,9 @@ addstacksplit(Link *ctxt, LSym *cursym) static Prog* stacksplit(Link *ctxt, Prog *p, int32 framesize, int noctxt) { + // TODO(minux) + return p; + int32 arg; Prog *q, *q1; -- cgit v1.2.1 From 47b1e82d6cab6de9ef3f404f49820c837915e365 Mon Sep 17 00:00:00 2001 From: Shenghou Ma Date: Wed, 13 Aug 2014 01:22:47 -0400 Subject: [dev.power64] liblink: rewrite MOVD $con(Ra), Rb into ADD $con, Ra, Rb; fix stack split prologue LGTM=rsc R=rsc, iant CC=golang-codereviews https://codereview.appspot.com/129050043 --- src/liblink/obj9.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) (limited to 'src/liblink') diff --git a/src/liblink/obj9.c b/src/liblink/obj9.c index 321e2c9bf..960083bf9 100644 --- a/src/liblink/obj9.c +++ b/src/liblink/obj9.c @@ -179,6 +179,15 @@ progedit(Link *ctxt, Prog *p) } break; } + + if(p->from.type == D_CONST && p->from.reg != NREG) { + if(p->as == AMOVD && p->to.type == D_REG) { + p->as = AADD; + p->reg = p->from.reg; + p->from.reg = NREG; + } else + ctxt->diag("invalid instruction: %P", p); + } } static Prog* stacksplit(Link*, Prog*, int32, int); @@ -639,9 +648,6 @@ addstacksplit(Link *ctxt, LSym *cursym) static Prog* stacksplit(Link *ctxt, Prog *p, int32 framesize, int noctxt) { - // TODO(minux) - return p; - int32 arg; Prog *q, *q1; @@ -696,7 +702,7 @@ stacksplit(Link *ctxt, Prog *p, int32 framesize, int noctxt) // ADD $StackGuard, SP, R4 // SUB R3, R4 // MOVD $(framesize+(StackGuard-StackSmall)), R31 - // CMP R4, R31 + // CMPU R31, R4 p = appendp(ctxt, p); p->as = ACMP; p->from.type = D_REG; @@ -733,9 +739,9 @@ stacksplit(Link *ctxt, Prog *p, int32 framesize, int noctxt) p = appendp(ctxt, p); p->as = ACMPU; p->from.type = D_REG; - p->from.reg = 4; + p->from.reg = REGTMP; p->to.type = D_REG; - p->to.reg = REGTMP; + p->to.reg = 4; } // q1: BLT done @@ -762,7 +768,7 @@ stacksplit(Link *ctxt, Prog *p, int32 framesize, int noctxt) arg = 0; else if(arg == ArgsSizeUnknown) ctxt->diag("%s: arg size unknown, but split stack", ctxt->cursym->name); - if(arg&3) // ???? + if(arg&7) ctxt->diag("misaligned argument size in stack split: %d", arg); p->from.offset = arg; p->to.type = D_REG; -- cgit v1.2.1 From f14ac88830638f1031ed0339d4db6e7e635385e6 Mon Sep 17 00:00:00 2001 From: Russ Cox Date: Wed, 13 Aug 2014 18:14:13 -0400 Subject: [dev.power64] liblink: fix handling of MOVD with large constants LGTM=minux R=golang-codereviews, minux CC=golang-codereviews https://codereview.appspot.com/122540043 Committer: Shenghou Ma --- src/liblink/asm9.c | 15 +++++++++------ src/liblink/obj9.c | 9 --------- 2 files changed, 9 insertions(+), 15 deletions(-) (limited to 'src/liblink') diff --git a/src/liblink/asm9.c b/src/liblink/asm9.c index 886edf347..f1889a92c 100644 --- a/src/liblink/asm9.c +++ b/src/liblink/asm9.c @@ -488,12 +488,12 @@ span9(Link *ctxt, LSym *cursym) p = cursym->text; if(p == nil || p->link == nil) // handle external functions and ELF section symbols return; - + ctxt->cursym = cursym; + ctxt->autosize = (int32)(p->to.offset & 0xffffffffll) + 8; + if(oprange[AANDN].start == nil) buildop(ctxt); - ctxt->cursym = cursym; - bflag = 0; c = 0; p->pc = c; @@ -571,12 +571,10 @@ span9(Link *ctxt, LSym *cursym) if(ctxt->tlsg == nil) ctxt->tlsg = linklookup(ctxt, "runtime.tlsg", 0); - p = cursym->text; - ctxt->autosize = (int32)(p->to.offset & 0xffffffffll) + 8; symgrow(ctxt, cursym, cursym->size); bp = cursym->p; - for(p = p->link; p != nil; p = p->link) { + for(p = cursym->text->link; p != nil; p = p->link) { ctxt->pc = p->pc; ctxt->curp = p; o = oplook(ctxt, p); @@ -1464,12 +1462,17 @@ asmout(Link *ctxt, Prog *p, Optab *o, int32 *out) ctxt->diag("literal operation on R0\n%P", p); a = OP_ADDI; if(o->a1 == C_UCON) { + if((d&0xffff) != 0) + sysfatal("invalid handling of %P", p); v >>= 16; if(r == REGZERO && isuint32(d)){ o1 = LOP_IRR(OP_ORIS, p->to.reg, REGZERO, v); break; } a = OP_ADDIS; + } else { + if((int16)d != d) + sysfatal("invalid handling of %P", p); } o1 = AOP_IRR(a, p->to.reg, r, v); break; diff --git a/src/liblink/obj9.c b/src/liblink/obj9.c index 960083bf9..3405fce47 100644 --- a/src/liblink/obj9.c +++ b/src/liblink/obj9.c @@ -179,15 +179,6 @@ progedit(Link *ctxt, Prog *p) } break; } - - if(p->from.type == D_CONST && p->from.reg != NREG) { - if(p->as == AMOVD && p->to.type == D_REG) { - p->as = AADD; - p->reg = p->from.reg; - p->from.reg = NREG; - } else - ctxt->diag("invalid instruction: %P", p); - } } static Prog* stacksplit(Link*, Prog*, int32, int); -- cgit v1.2.1 From e456ae86a6951a4c367019c2387cf4c9615f132a Mon Sep 17 00:00:00 2001 From: Russ Cox Date: Wed, 13 Aug 2014 18:32:54 -0400 Subject: [dev.power64] liblink: fix handling of $nnn(reg) LGTM=minux R=minux CC=golang-codereviews https://codereview.appspot.com/126180043 --- src/liblink/asm9.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/liblink') diff --git a/src/liblink/asm9.c b/src/liblink/asm9.c index f1889a92c..352fba915 100644 --- a/src/liblink/asm9.c +++ b/src/liblink/asm9.c @@ -677,6 +677,11 @@ aclass(Link *ctxt, Addr *a) switch(a->name) { case D_NONE: ctxt->instoffset = a->offset; + if(a->reg != NREG) { + if(-BIG <= ctxt->instoffset && ctxt->instoffset <= BIG) + return C_SACON; + return C_LACON; + } consize: if(ctxt->instoffset >= 0) { if(ctxt->instoffset == 0) @@ -769,6 +774,7 @@ oplook(Link *ctxt, Prog *p) a2 = C_NONE; if(p->reg != NREG) a2 = C_REG; +//print("oplook %P %d %d %d %d\n", p, a1, a2, a3, a4); r = p->as; o = oprange[r].start; if(o == 0) @@ -1423,6 +1429,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, int32 *out) o4 = 0; o5 = 0; +//print("%P => case %d\n", p, o->type); switch(o->type) { default: ctxt->diag("unknown type %d", o->type); -- cgit v1.2.1 From a7d370d73398dc75e8191e7eccf7b9398b0dadf1 Mon Sep 17 00:00:00 2001 From: Russ Cox Date: Thu, 14 Aug 2014 11:57:10 -0400 Subject: [dev.power64] liblink: fix $large(SP) for floating point load/store Fixes test/cmplxdivide. LGTM=minux R=minux CC=golang-codereviews https://codereview.appspot.com/128190045 --- src/liblink/asm9.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) (limited to 'src/liblink') diff --git a/src/liblink/asm9.c b/src/liblink/asm9.c index 352fba915..56582fe27 100644 --- a/src/liblink/asm9.c +++ b/src/liblink/asm9.c @@ -320,18 +320,18 @@ static Optab optab[] = { { AFMOVD, C_SAUTO,C_NONE, C_NONE, C_FREG, 8, 4, REGSP }, { AFMOVD, C_SOREG,C_NONE, C_NONE, C_FREG, 8, 4, REGZERO }, - { AFMOVD, C_LEXT, C_NONE, C_NONE, C_FREG, 8, 4, REGSB }, - { AFMOVD, C_LAUTO,C_NONE, C_NONE, C_FREG, 8, 4, REGSP }, - { AFMOVD, C_LOREG,C_NONE, C_NONE, C_FREG, 8, 4, REGZERO }, + { AFMOVD, C_LEXT, C_NONE, C_NONE, C_FREG, 36, 8, REGSB }, + { AFMOVD, C_LAUTO,C_NONE, C_NONE, C_FREG, 36, 8, REGSP }, + { AFMOVD, C_LOREG,C_NONE, C_NONE, C_FREG, 36, 8, REGZERO }, { AFMOVD, C_ADDR, C_NONE, C_NONE, C_FREG, 75, 8, 0 }, { AFMOVD, C_FREG, C_NONE, C_NONE, C_SEXT, 7, 4, REGSB }, { AFMOVD, C_FREG, C_NONE, C_NONE, C_SAUTO, 7, 4, REGSP }, { AFMOVD, C_FREG, C_NONE, C_NONE, C_SOREG, 7, 4, REGZERO }, - { AFMOVD, C_FREG, C_NONE, C_NONE, C_LEXT, 7, 4, REGSB }, - { AFMOVD, C_FREG, C_NONE, C_NONE, C_LAUTO, 7, 4, REGSP }, - { AFMOVD, C_FREG, C_NONE, C_NONE, C_LOREG, 7, 4, REGZERO }, + { AFMOVD, C_FREG, C_NONE, C_NONE, C_LEXT, 35, 8, REGSB }, + { AFMOVD, C_FREG, C_NONE, C_NONE, C_LAUTO, 35, 8, REGSP }, + { AFMOVD, C_FREG, C_NONE, C_NONE, C_LOREG, 35, 8, REGZERO }, { AFMOVD, C_FREG, C_NONE, C_NONE, C_ADDR, 74, 8, 0 }, { ASYNC, C_NONE, C_NONE, C_NONE, C_NONE, 46, 4, 0 }, @@ -1491,6 +1491,8 @@ asmout(Link *ctxt, Prog *p, Optab *o, int32 *out) r = p->to.reg; if(r0iszero && p->to.reg == 0) ctxt->diag("literal operation on R0\n%P", p); + if((int16)v != v) + sysfatal("mishandled instruction %P", p); o1 = AOP_IRR(opirr(ctxt, p->as), p->to.reg, r, v); break; @@ -1514,8 +1516,11 @@ asmout(Link *ctxt, Prog *p, Optab *o, int32 *out) if(v) ctxt->diag("illegal indexed instruction\n%P", p); o1 = AOP_RRR(opstorex(ctxt, p->as), p->from.reg, p->reg, r); - } else + } else { + if((int16)v != v) + sysfatal("mishandled instruction %P", p); o1 = AOP_IRR(opstore(ctxt, p->as), p->from.reg, r, v); + } break; case 8: /* mov soreg, r ==> lbz/lhz/lwz o(r) */ @@ -1527,8 +1532,11 @@ asmout(Link *ctxt, Prog *p, Optab *o, int32 *out) if(v) ctxt->diag("illegal indexed instruction\n%P", p); o1 = AOP_RRR(oploadx(ctxt, p->as), p->to.reg, p->reg, r); - } else + } else { + if((int16)v != v) + sysfatal("mishandled instruction %P", p); o1 = AOP_IRR(opload(ctxt, p->as), p->to.reg, r, v); + } break; case 9: /* movb soreg, r ==> lbz o(r),r2; extsb r2,r2 */ -- cgit v1.2.1 From a78e6cc8d5fffdc680350684a9c0d92d4eaf6328 Mon Sep 17 00:00:00 2001 From: Shenghou Ma Date: Fri, 15 Aug 2014 15:31:54 -0400 Subject: [dev.power64] liblink: fix g->panicwrap update code generation LGTM=rsc R=golang-codereviews, rsc CC=golang-codereviews https://codereview.appspot.com/123400043 --- src/liblink/obj9.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'src/liblink') diff --git a/src/liblink/obj9.c b/src/liblink/obj9.c index 3405fce47..28793676c 100644 --- a/src/liblink/obj9.c +++ b/src/liblink/obj9.c @@ -512,6 +512,36 @@ addstacksplit(Link *ctxt, LSym *cursym) p->to.type = D_BRANCH; break; } + if(cursym->text->reg & WRAPPER) { + // g->panicwrap -= autosize; + // MOVWZ panicwrap_offset(g), R3 + // ADD $-autosize, R3 + // MOVWZ R3, panicwrap_offset(g) + p->as = AMOVWZ; + p->from.type = D_OREG; + p->from.reg = REGG; + p->from.offset = 2*ctxt->arch->ptrsize; + p->to.type = D_REG; + p->to.reg = 3; + p = appendp(ctxt, p); + + p->as = AADD; + p->from.type = D_CONST; + p->from.offset = -autosize; + p->to.type = D_REG; + p->to.reg = 3; + p = appendp(ctxt, p); + + p->as = AMOVWZ; + p->from.type = D_REG; + p->from.reg = 3; + p->to.type = D_OREG; + p->to.reg = REGG; + p->to.offset = 2*ctxt->arch->ptrsize; + p = appendp(ctxt, p); + + p->as = ARETURN; + } if(cursym->text->mark & LEAF) { if(!autosize) { p->as = ABR; -- cgit v1.2.1 From ebe8a09fb603d9510cb982a6c11a3e1638f7f8fb Mon Sep 17 00:00:00 2001 From: Russ Cox Date: Mon, 18 Aug 2014 22:24:15 -0400 Subject: [dev.power64] liblink: recognize add instruction as adjusting SP LGTM=minux R=minux CC=golang-codereviews https://codereview.appspot.com/128360043 Committer: Shenghou Ma --- src/liblink/list9.c | 2 ++ src/liblink/obj9.c | 4 ++++ 2 files changed, 6 insertions(+) (limited to 'src/liblink') diff --git a/src/liblink/list9.c b/src/liblink/list9.c index 9700a1684..9e205b7a9 100644 --- a/src/liblink/list9.c +++ b/src/liblink/list9.c @@ -125,6 +125,8 @@ Pconv(Fmt *fp) s += sprint(s, ",%D", &p->from3); sprint(s, ",%D", &p->to); } + if(p->spadj != 0) + return fmtprint(fp, "%s # spadj=%d", str, p->spadj); } return fmtstrcpy(fp, str); } diff --git a/src/liblink/obj9.c b/src/liblink/obj9.c index 28793676c..d0c14dfb5 100644 --- a/src/liblink/obj9.c +++ b/src/liblink/obj9.c @@ -617,6 +617,10 @@ addstacksplit(Link *ctxt, LSym *cursym) q->link = q1; break; + case AADD: + if(p->to.type == D_REG && p->to.reg == REGSP && p->from.type == D_CONST) + p->spadj = -p->from.offset; + break; } } -- cgit v1.2.1